void board_clock_init(si_t *sih) { uint32 armclock = 0, ddrclock = 0, axiclock = 0; char *nvstr; char *end; if (cpu_turbo_mode) { printf("CPU Turbo Mode\n"); nvstr = strdup("1000,533"); } else nvstr = nvram_safe_get("clkfreq"); /* ARM clock speed override */ if (nvstr) { printf("clkfreq: %s\n", nvstr); armclock = bcm_strtoul(nvstr, &end, 0) * 1000000; if (cpu_turbo_mode) KFREE(nvstr); if (*end == ',') { nvstr = ++end; ddrclock = bcm_strtoul(nvstr, &end, 0) * 1000000; if (*end == ',') { nvstr = ++end; axiclock = bcm_strtoul(nvstr, &end, 0) * 1000000; } } } if (!armclock) armclock = 800 * 1000000; /* To accommodate old sdram_ncdl usage to store DDR clock; * should be removed if sdram_ncdl is used for some other purpose. */ if ((nvstr = nvram_get("sdram_ncdl"))) { uint32 ncdl = bcm_strtoul(nvstr, NULL, 0); if (ncdl && (ncdl * 1000000) != ddrclock) { ddrclock = ncdl * 1000000; } } /* Set current ARM clock speed */ si_arm_setclock(sih, armclock, ddrclock, axiclock); /* Update cfe_cpu_speed */ board_cfe_cpu_speed_upd(sih); }
/* * board_console_init() * * Add the console device and set it to be the primary * console. * * Input parameters: * nothing * * Return value: * nothing */ void board_console_init(void) { #if !CFG_MINIMAL_SIZE cfe_set_console(CFE_BUFFER_CONSOLE); #endif /* Initialize SB access */ sih = si_kattach(SI_OSH); ASSERT(sih); /* Set this to a default value, since nvram_reset needs to use it in OSL_DELAY */ board_cfe_cpu_speed_upd(sih); #if !CFG_SIM board_pinmux_init(sih); /* Check whether NVRAM reset needs be done */ if (nvram_reset((void *)sih) > 0) restore_defaults = 1; #endif /* * init gpio mode for leds and reset button */ recovery_button_init(); leds_gpio_init(); /* Initialize NVRAM access accordingly. In case of invalid NVRAM, load defaults */ if (nvram_init((void *)sih) > 0) restore_defaults = 1; #if CFG_SIM restore_defaults = 0; #else /* !CFG_SIM */ if (!restore_defaults) board_clock_init(sih); board_power_init(sih); #endif /* !CFG_SIM */ board_cpu_init(sih); /* Initialize UARTs */ si_serial_init(sih, board_console_add); if (cfe_finddev("uart0")) cfe_set_console("uart0"); }
/* * board_console_init() * * Add the console device and set it to be the primary * console. * * Input parameters: * nothing * * Return value: * nothing */ void board_console_init(void) { #if !CFG_MINIMAL_SIZE cfe_set_console(CFE_BUFFER_CONSOLE); #endif /* Initialize SB access */ sih = si_kattach(SI_OSH); ASSERT(sih); /* Set this to a default value, since nvram_reset needs to use it in OSL_DELAY */ board_cfe_cpu_speed_upd(sih); #if !CFG_SIM board_pinmux_init(sih); /* Check whether NVRAM reset needs be done */ if (nvram_reset((void *)sih) > 0) restore_defaults = 1; #endif /* Initialize NVRAM access accordingly. In case of invalid NVRAM, load defaults */ if (nvram_init((void *)sih) > 0) restore_defaults = 1; #if CFG_SIM restore_defaults = 0; #else /* !CFG_SIM */ if (!restore_defaults) board_clock_init(sih); board_power_init(sih); #endif /* !CFG_SIM */ board_cpu_init(sih); /* Initialize UARTs */ si_serial_init(sih, board_console_add); if (cfe_finddev("uart0")) cfe_set_console("uart0"); printf("Detect CPU turbo button... "); detect_turbo_button(); if (cpu_turbo_mode && atoi(nvram_safe_get("btn_led_mode"))) board_clock_init(sih); }