/* Kill pixel - set execution mask to zero for those pixels which
* fail.
*/
static void emit_kil( struct brw_wm_compile *c,
struct brw_reg *arg0)
{
struct brw_compile *p = &c->func;
struct intel_context *intel = &p->brw->intel;
struct brw_reg pixelmask;
GLuint i, j;
if (intel->gen >= 6)
pixelmask = retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UW);
else
pixelmask = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
for (i = 0; i < 4; i++) {
/* Check if we've already done the comparison for this reg
* -- common when someone does KIL TEMP.wwww.
*/
for (j = 0; j < i; j++) {
if (memcmp(&arg0[j], &arg0[i], sizeof(arg0[0])) == 0)
break;
}
if (j != i)
continue;
brw_push_insn_state(p);
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_GE, arg0[i], brw_imm_f(0));
brw_set_predicate_control_flag_value(p, 0xff);
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
brw_AND(p, pixelmask, brw_flag_reg(), pixelmask);
brw_pop_insn_state(p);
}
}
static void emit_min(struct brw_wm_compile *c,
struct prog_instruction *inst)
{
struct brw_compile *p = &c->func;
GLuint mask = inst->DstReg.WriteMask;
struct brw_reg src0, src1, dst;
int i;
brw_push_insn_state(p);
for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
dst = get_dst_reg(c, inst, i, 1);
src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
brw_MOV(p, dst, src0);
brw_set_saturate(p, 0);
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, src1, src0);
brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
brw_MOV(p, dst, src1);
brw_set_saturate(p, 0);
brw_set_predicate_control_flag_value(p, 0xff);
}
}
brw_pop_insn_state(p);
}
static void merge_edgeflags( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_reg tmp0 = get_element_ud(c->reg.tmp0, 0);
brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
brw_CMP(p,
vec1(brw_null_reg()),
BRW_CONDITIONAL_EQ,
tmp0,
brw_imm_ud(_3DPRIM_POLYGON));
/* Get away with using reg.vertex because we know that this is not
* a _3DPRIM_TRISTRIP_REVERSE:
*/
brw_IF(p, BRW_EXECUTE_1);
{
brw_set_conditionalmod(p, BRW_CONDITIONAL_EQ);
brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<8));
brw_MOV(p, byte_offset(c->reg.vertex[0],
brw_varying_to_offset(&c->vue_map,
VARYING_SLOT_EDGE)),
brw_imm_f(0));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
brw_set_conditionalmod(p, BRW_CONDITIONAL_EQ);
brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9));
brw_MOV(p, byte_offset(c->reg.vertex[2],
brw_varying_to_offset(&c->vue_map,
VARYING_SLOT_EDGE)),
brw_imm_f(0));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
}
brw_ENDIF(p);
}
static void emit_unfilled_primitives( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
/* Direction culling has already been done.
*/
if (c->key.fill_ccw != c->key.fill_cw &&
c->key.fill_ccw != CLIP_CULL &&
c->key.fill_cw != CLIP_CULL)
{
brw_CMP(p,
vec1(brw_null_reg()),
BRW_CONDITIONAL_GE,
get_element(c->reg.dir, 2),
brw_imm_f(0));
brw_IF(p, BRW_EXECUTE_1);
{
emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
}
brw_ELSE(p);
{
emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
}
brw_ENDIF(p);
}
else if (c->key.fill_cw != CLIP_CULL) {
emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
}
else if (c->key.fill_ccw != CLIP_CULL) {
emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
}
}
static void cull_direction( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
GLuint conditional;
assert (!(c->key.fill_ccw == CLIP_CULL &&
c->key.fill_cw == CLIP_CULL));
if (c->key.fill_ccw == CLIP_CULL)
conditional = BRW_CONDITIONAL_GE;
else
conditional = BRW_CONDITIONAL_L;
brw_CMP(p,
vec1(brw_null_reg()),
conditional,
get_element(c->reg.dir, 2),
brw_imm_f(0));
brw_IF(p, BRW_EXECUTE_1);
{
brw_clip_kill_thread(c);
}
brw_ENDIF(p);
}
void brw_emit_unfilled_clip( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
c->need_direction = ((c->key.offset_ccw || c->key.offset_cw) ||
(c->key.fill_ccw != c->key.fill_cw) ||
c->key.fill_ccw == CLIP_CULL ||
c->key.fill_cw == CLIP_CULL ||
c->key.copy_bfc_cw ||
c->key.copy_bfc_ccw);
brw_clip_tri_alloc_regs(c, 3 + c->key.nr_userclip + 6);
brw_clip_tri_init_vertices(c);
brw_clip_init_ff_sync(c);
assert(brw_clip_have_varying(c, VARYING_SLOT_EDGE));
if (c->key.fill_ccw == CLIP_CULL &&
c->key.fill_cw == CLIP_CULL) {
brw_clip_kill_thread(c);
return;
}
merge_edgeflags(c);
/* Need to use the inlist indirection here:
*/
if (c->need_direction)
compute_tri_direction(c);
if (c->key.fill_ccw == CLIP_CULL ||
c->key.fill_cw == CLIP_CULL)
cull_direction(c);
if (c->key.offset_ccw ||
c->key.offset_cw)
compute_offset(c);
if (c->key.copy_bfc_ccw ||
c->key.copy_bfc_cw)
copy_bfc(c);
/* Need to do this whether we clip or not:
*/
if (c->has_flat_shading)
brw_clip_tri_flat_shade(c);
brw_clip_init_clipmask(c);
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, c->reg.planemask, brw_imm_ud(0));
brw_IF(p, BRW_EXECUTE_1);
{
brw_clip_init_planes(c);
brw_clip_tri(c);
check_nr_verts(c);
}
brw_ENDIF(p);
emit_unfilled_primitives(c);
brw_clip_kill_thread(c);
}
void brw_clip_tri_flat_shade( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_instruction *is_poly;
struct brw_reg tmp0 = c->reg.loopcount; /* handy temporary */
brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
brw_CMP(p,
vec1(brw_null_reg()),
BRW_CONDITIONAL_EQ,
tmp0,
brw_imm_ud(_3DPRIM_POLYGON));
is_poly = brw_IF(p, BRW_EXECUTE_1);
{
brw_clip_copy_colors(c, 1, 0);
brw_clip_copy_colors(c, 2, 0);
}
is_poly = brw_ELSE(p, is_poly);
{
brw_clip_copy_colors(c, 0, 2);
brw_clip_copy_colors(c, 1, 2);
}
brw_ENDIF(p, is_poly);
}
static void do_twoside_color( struct brw_sf_compile *c )
{
struct brw_compile *p = &c->func;
GLuint backface_conditional = c->key.frontface_ccw ? BRW_CONDITIONAL_G : BRW_CONDITIONAL_L;
/* Already done in clip program:
*/
if (c->key.primitive == SF_UNFILLED_TRIS)
return;
/* If the vertex shader provides backface color, do the selection. The VS
* promises to set up the front color if the backface color is provided, but
* it may contain junk if never written to.
*/
if (!(have_attr(c, VARYING_SLOT_COL0) && have_attr(c, VARYING_SLOT_BFC0)) &&
!(have_attr(c, VARYING_SLOT_COL1) && have_attr(c, VARYING_SLOT_BFC1)))
return;
/* Need to use BRW_EXECUTE_4 and also do an 4-wide compare in order
* to get all channels active inside the IF. In the clipping code
* we run with NoMask, so it's not an option and we can use
* BRW_EXECUTE_1 for all comparisions.
*/
brw_CMP(p, vec4(brw_null_reg()), backface_conditional, c->det, brw_imm_f(0));
brw_IF(p, BRW_EXECUTE_4);
{
switch (c->nr_verts) {
case 3: copy_bfc(c, c->vert[2]);
case 2: copy_bfc(c, c->vert[1]);
case 1: copy_bfc(c, c->vert[0]);
}
}
brw_ENDIF(p);
}
static void emit_lit( struct brw_compile *p,
const struct brw_reg *dst,
GLuint mask,
const struct brw_reg *arg0 )
{
assert((mask & WRITEMASK_XW) == 0);
if (mask & WRITEMASK_Y) {
brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
brw_MOV(p, dst[1], arg0[0]);
brw_set_saturate(p, 0);
}
if (mask & WRITEMASK_Z) {
emit_math2(p, BRW_MATH_FUNCTION_POW,
&dst[2],
WRITEMASK_X | (mask & SATURATE),
&arg0[1],
&arg0[3]);
}
/* Ordinarily you'd use an iff statement to skip or shortcircuit
* some of the POW calculations above, but 16-wide iff statements
* seem to lock c1 hardware, so this is a nasty workaround:
*/
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_LE, arg0[0], brw_imm_f(0));
{
if (mask & WRITEMASK_Y)
brw_MOV(p, dst[1], brw_imm_f(0));
if (mask & WRITEMASK_Z)
brw_MOV(p, dst[2], brw_imm_f(0));
}
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
}
/* Sets the destination channels to 1.0 or 0.0 according to glFrontFacing. */
void emit_frontfacing(struct brw_compile *p,
const struct brw_reg *dst,
GLuint mask)
{
struct brw_reg r1_6ud = retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD);
GLuint i;
if (!(mask & WRITEMASK_XYZW))
return;
for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
brw_MOV(p, dst[i], brw_imm_f(0.0));
}
}
/* bit 31 is "primitive is back face", so checking < (1 << 31) gives
* us front face
*/
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, r1_6ud, brw_imm_ud(1 << 31));
for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
brw_MOV(p, dst[i], brw_imm_f(1.0));
}
}
brw_set_predicate_control_flag_value(p, 0xff);
}
void brw_clip_tri_flat_shade( struct brw_clip_compile *c )
{
struct brw_codegen *p = &c->func;
struct brw_reg tmp0 = c->reg.loopcount; /* handy temporary */
brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
brw_CMP(p,
vec1(brw_null_reg()),
BRW_CONDITIONAL_EQ,
tmp0,
brw_imm_ud(_3DPRIM_POLYGON));
brw_IF(p, BRW_EXECUTE_1);
{
brw_clip_copy_flatshaded_attributes(c, 1, 0);
brw_clip_copy_flatshaded_attributes(c, 2, 0);
}
brw_ELSE(p);
{
if (c->key.pv_first) {
brw_CMP(p,
vec1(brw_null_reg()),
BRW_CONDITIONAL_EQ,
tmp0,
brw_imm_ud(_3DPRIM_TRIFAN));
brw_IF(p, BRW_EXECUTE_1);
{
brw_clip_copy_flatshaded_attributes(c, 0, 1);
brw_clip_copy_flatshaded_attributes(c, 2, 1);
}
brw_ELSE(p);
{
brw_clip_copy_flatshaded_attributes(c, 1, 0);
brw_clip_copy_flatshaded_attributes(c, 2, 0);
}
brw_ENDIF(p);
}
else {
brw_clip_copy_flatshaded_attributes(c, 0, 2);
brw_clip_copy_flatshaded_attributes(c, 1, 2);
}
}
brw_ENDIF(p);
}
static void copy_bfc( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
GLuint conditional;
/* Do we have any colors to copy?
*/
if (!(brw_clip_have_varying(c, VARYING_SLOT_COL0) &&
brw_clip_have_varying(c, VARYING_SLOT_BFC0)) &&
!(brw_clip_have_varying(c, VARYING_SLOT_COL1) &&
brw_clip_have_varying(c, VARYING_SLOT_BFC1)))
return;
/* In some wierd degnerate cases we can end up testing the
* direction twice, once for culling and once for bfc copying. Oh
* well, that's what you get for setting wierd GL state.
*/
if (c->key.copy_bfc_ccw)
conditional = BRW_CONDITIONAL_GE;
else
conditional = BRW_CONDITIONAL_L;
brw_CMP(p,
vec1(brw_null_reg()),
conditional,
get_element(c->reg.dir, 2),
brw_imm_f(0));
brw_IF(p, BRW_EXECUTE_1);
{
GLuint i;
for (i = 0; i < 3; i++) {
if (brw_clip_have_varying(c, VARYING_SLOT_COL0) &&
brw_clip_have_varying(c, VARYING_SLOT_BFC0))
brw_MOV(p,
byte_offset(c->reg.vertex[i],
brw_varying_to_offset(&c->vue_map,
VARYING_SLOT_COL0)),
byte_offset(c->reg.vertex[i],
brw_varying_to_offset(&c->vue_map,
VARYING_SLOT_BFC0)));
if (brw_clip_have_varying(c, VARYING_SLOT_COL1) &&
brw_clip_have_varying(c, VARYING_SLOT_BFC1))
brw_MOV(p,
byte_offset(c->reg.vertex[i],
brw_varying_to_offset(&c->vue_map,
VARYING_SLOT_COL1)),
byte_offset(c->reg.vertex[i],
brw_varying_to_offset(&c->vue_map,
VARYING_SLOT_BFC1)));
}
}
brw_ENDIF(p);
}
static void maybe_do_clip_tri( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, c->reg.planemask, brw_imm_ud(0));
brw_IF(p, BRW_EXECUTE_1);
{
do_clip_tri(c);
}
brw_ENDIF(p);
}
static void check_nr_verts( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.nr_verts, brw_imm_d(3));
brw_IF(p, BRW_EXECUTE_1);
{
brw_clip_kill_thread(c);
}
brw_ENDIF(p);
}
void emit_sign(struct brw_compile *p,
const struct brw_reg *dst,
GLuint mask,
const struct brw_reg *arg0)
{
GLuint i;
for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
brw_MOV(p, dst[i], brw_imm_f(0.0));
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, arg0[i], brw_imm_f(0));
brw_MOV(p, dst[i], brw_imm_f(-1.0));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_G, arg0[i], brw_imm_f(0));
brw_MOV(p, dst[i], brw_imm_f(1.0));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
}
}
}
static void copy_bfc( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_instruction *ccw;
GLuint conditional;
/* Do we have any colors to copy?
*/
if (!(c->offset[VERT_RESULT_COL0] && c->offset[VERT_RESULT_BFC0]) &&
!(c->offset[VERT_RESULT_COL1] && c->offset[VERT_RESULT_BFC1]))
return;
/* In some wierd degnerate cases we can end up testing the
* direction twice, once for culling and once for bfc copying. Oh
* well, that's what you get for setting wierd GL state.
*/
if (c->key.copy_bfc_ccw)
conditional = BRW_CONDITIONAL_GE;
else
conditional = BRW_CONDITIONAL_L;
brw_CMP(p,
vec1(brw_null_reg()),
conditional,
get_element(c->reg.dir, 2),
brw_imm_f(0));
ccw = brw_IF(p, BRW_EXECUTE_1);
{
GLuint i;
for (i = 0; i < 3; i++) {
if (c->offset[VERT_RESULT_COL0] && c->offset[VERT_RESULT_BFC0])
brw_MOV(p,
byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_COL0]),
byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_BFC0]));
if (c->offset[VERT_RESULT_COL1] && c->offset[VERT_RESULT_BFC1])
brw_MOV(p,
byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_COL1]),
byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_BFC1]));
}
}
brw_ENDIF(p, ccw);
}
static void emit_sop( struct brw_compile *p,
const struct brw_reg *dst,
GLuint mask,
GLuint cond,
const struct brw_reg *arg0,
const struct brw_reg *arg1 )
{
GLuint i;
for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
brw_MOV(p, dst[i], brw_imm_f(0));
brw_CMP(p, brw_null_reg(), cond, arg0[i], arg1[i]);
brw_MOV(p, dst[i], brw_imm_f(1.0));
brw_set_predicate_control_flag_value(p, 0xff);
}
}
}
/* Kill pixel - set execution mask to zero for those pixels which
* fail.
*/
static void emit_kil( struct brw_wm_compile *c,
struct brw_reg *arg0)
{
struct brw_compile *p = &c->func;
struct brw_reg r0uw = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
GLuint i;
/* XXX - usually won't need 4 compares!
*/
for (i = 0; i < 4; i++) {
brw_push_insn_state(p);
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_GE, arg0[i], brw_imm_f(0));
brw_set_predicate_control_flag_value(p, 0xff);
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
brw_AND(p, r0uw, brw_flag_reg(), r0uw);
brw_pop_insn_state(p);
}
}
void emit_min(struct brw_compile *p,
const struct brw_reg *dst,
GLuint mask,
const struct brw_reg *arg0,
const struct brw_reg *arg1)
{
GLuint i;
for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, arg0[i], arg1[i]);
brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
brw_SEL(p, dst[i], arg0[i], arg1[i]);
brw_set_saturate(p, 0);
brw_set_predicate_control_flag_value(p, 0xff);
}
}
}
static void emit_points(struct brw_clip_compile *c,
bool do_offset )
{
struct brw_compile *p = &c->func;
const struct brw_context *brw = p->brw;
struct brw_indirect v0 = brw_indirect(0, 0);
struct brw_indirect v0ptr = brw_indirect(2, 0);
brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
brw_DO(p, BRW_EXECUTE_1);
{
brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
/* draw if edgeflag != 0
*/
brw_CMP(p,
vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
deref_1f(v0, brw_varying_to_offset(&c->vue_map,
VARYING_SLOT_EDGE)),
brw_imm_f(0));
brw_IF(p, BRW_EXECUTE_1);
{
if (do_offset)
apply_one_offset(c, v0);
brw_clip_emit_vue(c, v0, BRW_URB_WRITE_ALLOCATE_COMPLETE,
(_3DPRIM_POINTLIST << URB_WRITE_PRIM_TYPE_SHIFT)
| URB_WRITE_PRIM_START | URB_WRITE_PRIM_END);
}
brw_ENDIF(p);
brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
brw_inst_set_cond_modifier(brw, brw_last_inst, BRW_CONDITIONAL_NZ);
}
brw_WHILE(p);
brw_inst_set_pred_control(brw, brw_last_inst, BRW_PREDICATE_NORMAL);
}
/*
GLfloat iz = 1.0 / dir.z;
GLfloat ac = dir.x * iz;
GLfloat bc = dir.y * iz;
offset = ctx->Polygon.OffsetUnits * DEPTH_SCALE;
offset += MAX2( abs(ac), abs(bc) ) * ctx->Polygon.OffsetFactor;
offset *= MRD;
*/
static void compute_offset( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_reg off = c->reg.offset;
struct brw_reg dir = c->reg.dir;
brw_math_invert(p, get_element(off, 2), get_element(dir, 2));
brw_MUL(p, vec2(off), dir, get_element(off, 2));
brw_CMP(p,
vec1(brw_null_reg()),
BRW_CONDITIONAL_GE,
brw_abs(get_element(off, 0)),
brw_abs(get_element(off, 1)));
brw_SEL(p, vec1(off), brw_abs(get_element(off, 0)), brw_abs(get_element(off, 1)));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
brw_MUL(p, vec1(off), off, brw_imm_f(c->key.offset_factor));
brw_ADD(p, vec1(off), off, brw_imm_f(c->key.offset_units));
}
void emit_sop(struct brw_compile *p,
const struct brw_reg *dst,
GLuint mask,
GLuint cond,
const struct brw_reg *arg0,
const struct brw_reg *arg1)
{
GLuint i;
for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
brw_push_insn_state(p);
brw_CMP(p, brw_null_reg(), cond, arg0[i], arg1[i]);
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
brw_MOV(p, dst[i], brw_imm_f(0));
brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
brw_MOV(p, dst[i], brw_imm_f(1.0));
brw_pop_insn_state(p);
}
}
}
static void emit_points(struct brw_clip_compile *c,
bool do_offset )
{
struct brw_compile *p = &c->func;
struct brw_indirect v0 = brw_indirect(0, 0);
struct brw_indirect v0ptr = brw_indirect(2, 0);
brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
brw_DO(p, BRW_EXECUTE_1);
{
brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
/* draw if edgeflag != 0
*/
brw_CMP(p,
vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
deref_1f(v0, brw_vert_result_to_offset(&c->vue_map,
VARYING_SLOT_EDGE)),
brw_imm_f(0));
brw_IF(p, BRW_EXECUTE_1);
{
if (do_offset)
apply_one_offset(c, v0);
brw_clip_emit_vue(c, v0, 1, 0,
(_3DPRIM_POINTLIST << URB_WRITE_PRIM_TYPE_SHIFT)
| URB_WRITE_PRIM_START | URB_WRITE_PRIM_END);
}
brw_ENDIF(p);
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
}
brw_WHILE(p);
}
static void do_twoside_color( struct brw_sf_compile *c )
{
struct brw_compile *p = &c->func;
GLuint backface_conditional = c->key.frontface_ccw ? BRW_CONDITIONAL_G : BRW_CONDITIONAL_L;
/* Already done in clip program:
*/
if (c->key.primitive == SF_UNFILLED_TRIS)
return;
/* XXX: What happens if BFC isn't present? This could only happen
* for user-supplied vertex programs, as t_vp_build.c always does
* the right thing.
*/
if (!(have_attr(c, VERT_RESULT_COL0) && have_attr(c, VERT_RESULT_BFC0)) &&
!(have_attr(c, VERT_RESULT_COL1) && have_attr(c, VERT_RESULT_BFC1)))
return;
/* Need to use BRW_EXECUTE_4 and also do an 4-wide compare in order
* to get all channels active inside the IF. In the clipping code
* we run with NoMask, so it's not an option and we can use
* BRW_EXECUTE_1 for all comparisions.
*/
brw_push_insn_state(p);
brw_CMP(p, vec4(brw_null_reg()), backface_conditional, c->det, brw_imm_f(0));
brw_IF(p, BRW_EXECUTE_4);
{
switch (c->nr_verts) {
case 3:
copy_bfc(c, c->vert[2]);
case 2:
copy_bfc(c, c->vert[1]);
case 1:
copy_bfc(c, c->vert[0]);
}
}
brw_ENDIF(p);
brw_pop_insn_state(p);
}
static void emit_points(struct brw_clip_compile *c,
GLboolean do_offset )
{
struct brw_compile *p = &c->func;
struct brw_instruction *loop;
struct brw_instruction *draw_point;
struct brw_indirect v0 = brw_indirect(0, 0);
struct brw_indirect v0ptr = brw_indirect(2, 0);
brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
loop = brw_DO(p, BRW_EXECUTE_1);
{
brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
/* draw if edgeflag != 0
*/
brw_CMP(p,
vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
deref_1f(v0, c->offset[VERT_RESULT_EDGE]),
brw_imm_f(0));
draw_point = brw_IF(p, BRW_EXECUTE_1);
{
if (do_offset)
apply_one_offset(c, v0);
brw_clip_emit_vue(c, v0, 1, 0, (_3DPRIM_POINTLIST << 2) | R02_PRIM_START | R02_PRIM_END);
}
brw_ENDIF(p, draw_point);
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
}
brw_WHILE(p, loop);
}
void brw_clip_tri_init_vertices( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_reg tmp0 = c->reg.loopcount; /* handy temporary */
struct brw_instruction *is_rev;
/* Initial list of indices for incoming vertexes:
*/
brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
brw_CMP(p,
vec1(brw_null_reg()),
BRW_CONDITIONAL_EQ,
tmp0,
brw_imm_ud(_3DPRIM_TRISTRIP_REVERSE));
/* XXX: Is there an easier way to do this? Need to reverse every
* second tristrip element: Can ignore sometimes?
*/
is_rev = brw_IF(p, BRW_EXECUTE_1);
{
brw_MOV(p, get_element(c->reg.inlist, 0), brw_address(c->reg.vertex[1]) );
brw_MOV(p, get_element(c->reg.inlist, 1), brw_address(c->reg.vertex[0]) );
if (c->need_direction)
brw_MOV(p, c->reg.dir, brw_imm_f(-1));
}
is_rev = brw_ELSE(p, is_rev);
{
brw_MOV(p, get_element(c->reg.inlist, 0), brw_address(c->reg.vertex[0]) );
brw_MOV(p, get_element(c->reg.inlist, 1), brw_address(c->reg.vertex[1]) );
if (c->need_direction)
brw_MOV(p, c->reg.dir, brw_imm_f(1));
}
brw_ENDIF(p, is_rev);
brw_MOV(p, get_element(c->reg.inlist, 2), brw_address(c->reg.vertex[2]) );
brw_MOV(p, brw_vec8_grf(c->reg.outlist.nr, 0), brw_imm_f(0));
brw_MOV(p, c->reg.nr_verts, brw_imm_ud(3));
}
/**
* Sets VERT_RESULT_FOGC.Y for gl_FrontFacing
*
* This is currently executed if the fragment program uses VERT_RESULT_FOGC
* at all, but this could be eliminated with a scan of the FP contents.
*/
static void
do_front_facing( struct brw_sf_compile *c )
{
struct brw_compile *p = &c->func;
int i;
if (!have_attr(c, VERT_RESULT_FOGC))
return;
brw_push_insn_state(p);
brw_CMP(p, brw_null_reg(),
c->key.frontface_ccw ? BRW_CONDITIONAL_G : BRW_CONDITIONAL_L,
c->det, brw_imm_f(0));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
for (i = 0; i < 3; i++) {
struct brw_reg fogc = get_vert_attr(c, c->vert[i],FRAG_ATTRIB_FOGC);
brw_MOV(p, get_element(fogc, 1), brw_imm_f(0));
brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
brw_MOV(p, get_element(fogc, 1), brw_imm_f(1));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
}
brw_pop_insn_state(p);
}
static void emit_sop(struct brw_wm_compile *c,
struct prog_instruction *inst, GLuint cond)
{
struct brw_compile *p = &c->func;
GLuint mask = inst->DstReg.WriteMask;
struct brw_reg dst, src0, src1;
int i;
for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
dst = get_dst_reg(c, inst, i, 1);
src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
brw_push_insn_state(p);
brw_CMP(p, brw_null_reg(), cond, src0, src1);
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
brw_MOV(p, dst, brw_imm_f(0.0));
brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
brw_MOV(p, dst, brw_imm_f(1.0));
brw_pop_insn_state(p);
}
}
}
/**
* Loads the clip distance for a vertex into `dst`, and ends with
* a comparison of it to zero with the condition `cond`.
*
* - If using a fixed plane, the distance is dot(hpos, plane).
* - If using a user clip plane, the distance is directly available in the vertex.
*/
static inline void
load_clip_distance(struct brw_clip_compile *c, struct brw_indirect vtx,
struct brw_reg dst, GLuint hpos_offset, int cond)
{
struct brw_codegen *p = &c->func;
dst = vec4(dst);
brw_AND(p, vec1(brw_null_reg()), c->reg.vertex_src_mask, brw_imm_ud(1));
brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
brw_IF(p, BRW_EXECUTE_1);
{
struct brw_indirect temp_ptr = brw_indirect(7, 0);
brw_ADD(p, get_addr_reg(temp_ptr), get_addr_reg(vtx), c->reg.clipdistance_offset);
brw_MOV(p, vec1(dst), deref_1f(temp_ptr, 0));
}
brw_ELSE(p);
{
brw_MOV(p, dst, deref_4f(vtx, hpos_offset));
brw_DP4(p, dst, dst, c->reg.plane_equation);
}
brw_ENDIF(p);
brw_CMP(p, brw_null_reg(), cond, vec1(dst), brw_imm_f(0.0f));
}
/**
* Generate the geometry shader program used on Gen6 to perform stream output
* (transform feedback).
*/
void
gen6_sol_program(struct brw_gs_compile *c, struct brw_gs_prog_key *key,
unsigned num_verts, bool check_edge_flags)
{
struct brw_compile *p = &c->func;
c->prog_data.svbi_postincrement_value = num_verts;
brw_gs_alloc_regs(c, num_verts, true);
brw_gs_initialize_header(c);
if (key->num_transform_feedback_bindings > 0) {
unsigned vertex, binding;
struct brw_reg destination_indices_uw =
vec8(retype(c->reg.destination_indices, BRW_REGISTER_TYPE_UW));
/* Note: since we use the binding table to keep track of buffer offsets
* and stride, the GS doesn't need to keep track of a separate pointer
* into each buffer; it uses a single pointer which increments by 1 for
* each vertex. So we use SVBI0 for this pointer, regardless of whether
* transform feedback is in interleaved or separate attribs mode.
*
* Make sure that the buffers have enough room for all the vertices.
*/
brw_ADD(p, get_element_ud(c->reg.temp, 0),
get_element_ud(c->reg.SVBI, 0), brw_imm_ud(num_verts));
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE,
get_element_ud(c->reg.temp, 0),
get_element_ud(c->reg.SVBI, 4));
brw_IF(p, BRW_EXECUTE_1);
/* Compute the destination indices to write to. Usually we use SVBI[0]
* + (0, 1, 2). However, for odd-numbered triangles in tristrips, the
* vertices come down the pipeline in reversed winding order, so we need
* to flip the order when writing to the transform feedback buffer. To
* ensure that flatshading accuracy is preserved, we need to write them
* in order SVBI[0] + (0, 2, 1) if we're using the first provoking
* vertex convention, and in order SVBI[0] + (1, 0, 2) if we're using
* the last provoking vertex convention.
*
* Note: since brw_imm_v can only be used in instructions in
* packed-word execution mode, and SVBI is a double-word, we need to
* first move the appropriate immediate constant ((0, 1, 2), (0, 2, 1),
* or (1, 0, 2)) to the destination_indices register, and then add SVBI
* using a separate instruction. Also, since the immediate constant is
* expressed as packed words, and we need to load double-words into
* destination_indices, we need to intersperse zeros to fill the upper
* halves of each double-word.
*/
brw_MOV(p, destination_indices_uw,
brw_imm_v(0x00020100)); /* (0, 1, 2) */
if (num_verts == 3) {
/* Get primitive type into temp register. */
brw_AND(p, get_element_ud(c->reg.temp, 0),
get_element_ud(c->reg.R0, 2), brw_imm_ud(0x1f));
/* Test if primitive type is TRISTRIP_REVERSE. We need to do this as
* an 8-wide comparison so that the conditional MOV that follows
* moves all 8 words correctly.
*/
brw_CMP(p, vec8(brw_null_reg()), BRW_CONDITIONAL_EQ,
get_element_ud(c->reg.temp, 0),
brw_imm_ud(_3DPRIM_TRISTRIP_REVERSE));
/* If so, then overwrite destination_indices_uw with the appropriate
* reordering.
*/
brw_MOV(p, destination_indices_uw,
brw_imm_v(key->pv_first ? 0x00010200 /* (0, 2, 1) */
: 0x00020001)); /* (1, 0, 2) */
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
}
brw_ADD(p, c->reg.destination_indices,
c->reg.destination_indices, get_element_ud(c->reg.SVBI, 0));
/* For each vertex, generate code to output each varying using the
* appropriate binding table entry.
*/
for (vertex = 0; vertex < num_verts; ++vertex) {
/* Set up the correct destination index for this vertex */
brw_MOV(p, get_element_ud(c->reg.header, 5),
get_element_ud(c->reg.destination_indices, vertex));
for (binding = 0; binding < key->num_transform_feedback_bindings;
++binding) {
unsigned char varying =
key->transform_feedback_bindings[binding];
unsigned char slot = c->vue_map.varying_to_slot[varying];
/* From the Sandybridge PRM, Volume 2, Part 1, Section 4.5.1:
*
* "Prior to End of Thread with a URB_WRITE, the kernel must
* ensure that all writes are complete by sending the final
* write as a committed write."
*/
bool final_write =
binding == key->num_transform_feedback_bindings - 1 &&
vertex == num_verts - 1;
struct brw_reg vertex_slot = c->reg.vertex[vertex];
vertex_slot.nr += slot / 2;
vertex_slot.subnr = (slot % 2) * 16;
/* gl_PointSize is stored in VARYING_SLOT_PSIZ.w. */
vertex_slot.dw1.bits.swizzle = varying == VARYING_SLOT_PSIZ
? BRW_SWIZZLE_WWWW : key->transform_feedback_swizzles[binding];
brw_set_access_mode(p, BRW_ALIGN_16);
brw_MOV(p, stride(c->reg.header, 4, 4, 1),
retype(vertex_slot, BRW_REGISTER_TYPE_UD));
brw_set_access_mode(p, BRW_ALIGN_1);
brw_svb_write(p,
final_write ? c->reg.temp : brw_null_reg(), /* dest */
1, /* msg_reg_nr */
c->reg.header, /* src0 */
SURF_INDEX_SOL_BINDING(binding), /* binding_table_index */
final_write); /* send_commit_msg */
}
}
brw_ENDIF(p);
/* Now, reinitialize the header register from R0 to restore the parts of
* the register that we overwrote while streaming out transform feedback
* data.
*/
brw_gs_initialize_header(c);
/* Finally, wait for the write commit to occur so that we can proceed to
* other things safely.
*
* From the Sandybridge PRM, Volume 4, Part 1, Section 3.3:
*
* The write commit does not modify the destination register, but
* merely clears the dependency associated with the destination
* register. Thus, a simple “mov” instruction using the register as a
* source is sufficient to wait for the write commit to occur.
*/
brw_MOV(p, c->reg.temp, c->reg.temp);
}
brw_gs_ff_sync(c, 1);
/* If RASTERIZER_DISCARD is enabled, we have nothing further to do, so
* release the URB that was just allocated, and terminate the thread.
*/
if (key->rasterizer_discard) {
brw_gs_terminate(c);
return;
}
brw_gs_overwrite_header_dw2_from_r0(c);
switch (num_verts) {
case 1:
brw_gs_offset_header_dw2(c, URB_WRITE_PRIM_START | URB_WRITE_PRIM_END);
brw_gs_emit_vue(c, c->reg.vertex[0], true);
break;
case 2:
brw_gs_offset_header_dw2(c, URB_WRITE_PRIM_START);
brw_gs_emit_vue(c, c->reg.vertex[0], false);
brw_gs_offset_header_dw2(c, URB_WRITE_PRIM_END - URB_WRITE_PRIM_START);
brw_gs_emit_vue(c, c->reg.vertex[1], true);
break;
case 3:
if (check_edge_flags) {
/* Only emit vertices 0 and 1 if this is the first triangle of the
* polygon. Otherwise they are redundant.
*/
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
get_element_ud(c->reg.R0, 2),
brw_imm_ud(BRW_GS_EDGE_INDICATOR_0));
brw_IF(p, BRW_EXECUTE_1);
}
brw_gs_offset_header_dw2(c, URB_WRITE_PRIM_START);
brw_gs_emit_vue(c, c->reg.vertex[0], false);
brw_gs_offset_header_dw2(c, -URB_WRITE_PRIM_START);
brw_gs_emit_vue(c, c->reg.vertex[1], false);
if (check_edge_flags) {
brw_ENDIF(p);
/* Only emit vertex 2 in PRIM_END mode if this is the last triangle
* of the polygon. Otherwise leave the primitive incomplete because
* there are more polygon vertices coming.
*/
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
get_element_ud(c->reg.R0, 2),
brw_imm_ud(BRW_GS_EDGE_INDICATOR_1));
brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
}
brw_gs_offset_header_dw2(c, URB_WRITE_PRIM_END);
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
brw_gs_emit_vue(c, c->reg.vertex[2], true);
break;
}
}
