void bsp_work_area_initialize(void) { Heap_Area areas[AREA_COUNT_MAX]; size_t area_count; #ifdef BSP_FDT_IS_SUPPORTED const void *fdt; size_t i; #endif areas[0].begin = bsp_section_work_begin; areas[0].size = (uintptr_t) bsp_section_work_size; area_count = 1; #ifdef BSP_FDT_IS_SUPPORTED fdt = bsp_fdt_get(); adjust_memory_size(fdt, &areas[0]); area_count = remove_reserved_memory(fdt, areas, area_count); for (i = 0; i < area_count; ++i) { arm_cp15_set_translation_table_entries( areas[i].begin, (void *) ((uintptr_t) areas[i].begin + areas[i].size), ARMV7_MMU_READ_WRITE_CACHED ); } #endif bsp_work_area_initialize_with_table(areas, area_count); }
static uint32_t discover_processors(void) { #if defined(HAS_UBOOT) return QORIQ_CPU_COUNT; #elif defined(U_BOOT_USE_FDT) const void *fdt = bsp_fdt_get(); int cpus = fdt_path_offset(fdt, "/cpus"); int node = fdt_first_subnode(fdt, cpus); uint32_t cpu = 0; uintptr_t last = 0; uintptr_t begin = last - 1; while (node >= 0) { int len; fdt64_t *addr_fdt = (fdt64_t *) fdt_getprop(fdt, node, "cpu-release-addr", &len); if ( addr_fdt != NULL && cpu < RTEMS_ARRAY_SIZE(qoriq_start_spin_table_addr) ) { uintptr_t addr = (uintptr_t) fdt64_to_cpu(*addr_fdt); if (addr < begin) { begin = addr; } if (addr > last) { last = addr; } qoriq_start_spin_table_addr[cpu] = (qoriq_start_spin_table *) addr; ++cpu; } node = fdt_next_subnode(fdt, node); } return cpu * QORIQ_THREAD_COUNT; #endif }
int i2c_bus_register_imx(const char *bus_path, const char *alias_or_path) { const void *fdt; const char *path; int node; imx_i2c_bus *bus; int eno; fdt = bsp_fdt_get(); path = fdt_get_alias(fdt, alias_or_path); if (path == NULL) { path = alias_or_path; } node = fdt_path_offset(fdt, path); if (node < 0) { rtems_set_errno_and_return_minus_one(ENXIO); } bus = (imx_i2c_bus *) i2c_bus_alloc_and_init(sizeof(*bus)); if (bus == NULL){ return -1; } bus->regs = imx_get_reg_of_node(fdt, node); bus->irq = imx_get_irq_of_node(fdt, node, 0); eno = imx_i2c_init(bus); if (eno != 0) { (*bus->base.destroy)(&bus->base); rtems_set_errno_and_return_minus_one(eno); } bus->base.transfer = imx_i2c_transfer; bus->base.set_clock = imx_i2c_set_clock; bus->base.destroy = imx_i2c_destroy; return i2c_bus_register(&bus->base, bus_path); }
static uint32_t discover_processors(void) { const void *fdt = bsp_fdt_get(); int cpus = fdt_path_offset(fdt, "/cpus"); int node = fdt_first_subnode(fdt, cpus); uint32_t cpu = 0; while (node >= 0 && cpu < RTEMS_ARRAY_SIZE(qoriq_start_spin_table_addr)) { int len; fdt64_t *addr_fdt = (fdt64_t *) fdt_getprop(fdt, node, "cpu-release-addr", &len); if (addr_fdt != NULL) { uintptr_t addr = (uintptr_t) fdt64_to_cpu(*addr_fdt); qoriq_start_spin_table_addr[cpu] = (qoriq_start_spin_table *) addr; } ++cpu; node = fdt_next_subnode(fdt, node); } return cpu * QORIQ_THREAD_COUNT; }