/* * Given an exception number and a pointer to saved registers, * return a GDB signal value. */ int bsp_get_signal(int exc_nr, void *saved_regs) { int sig = TARGET_SIGNAL_TRAP; ex_regs_t *regs = (ex_regs_t *)saved_regs; switch (exc_nr) { case BSP_CORE_EXC_UNDEFINED_INSTRUCTION: { union arm_insn inst; if (bsp_memory_read((void *)regs->_pc, 0, ARM_INST_SIZE * 8, 1, &(inst.word)) != 0) { /* * We were able to read this address. It must be a valid address. */ if (inst.word == BREAKPOINT_INSN) sig = TARGET_SIGNAL_TRAP; } else sig = TARGET_SIGNAL_ILL; } break; case BSP_CORE_EXC_SOFTWARE_INTERRUPT: sig = TARGET_SIGNAL_TRAP; break; case BSP_CORE_EXC_PREFETCH_ABORT: sig = TARGET_SIGNAL_BUS; break; case BSP_CORE_EXC_DATA_ABORT: sig = TARGET_SIGNAL_BUS; break; case BSP_CORE_EXC_ADDRESS_ERROR_26_BIT: sig = TARGET_SIGNAL_BUS; break; case BSP_CORE_EXC_IRQ: sig = TARGET_SIGNAL_INT; break; case BSP_CORE_EXC_FIQ: sig = TARGET_SIGNAL_INT; break; default: sig = TARGET_SIGNAL_TRAP; break; } return sig; }
int read_memory (mem_addr_t *src, int size, int amt, char *dst) { #if defined(HAVE_BSP) && !defined(USE_ECOS_HAL_SAFE_MEMORY) return (bsp_memory_read((unsigned char *)src->addr, MEM_ADDR_ASI(src), size << 3, amt, dst) != amt); #else int totamt = size * amt; return (totamt != __read_mem_safe (dst, (void*)src->addr, totamt)); #endif }