size_t plDDSurface::calcTotalBufferSize() const {
size_t oneBuffer = calcBufferSize(fWidth, fHeight);
if ((fFlags & DDSD_MIPMAPCOUNT) != 0) {
unsigned int w = fWidth, h = fHeight;
for (unsigned int i=1; i<fMipmapCount; i++) {
w = (w > 1) ? w >> 1 : 1;
h = (h > 1) ? h >> 1 : 1;
oneBuffer += calcBufferSize(w, h);
}
}
void Benchmark::Seeker::configure(unsigned int sectorSize, unsigned int stepSize, enum seeker_return_mode returnMode) {
this->sectorSize = sectorSize;
this->stepSize = stepSize;
this->returnMode = returnMode;
this->buffer = (char*)memalign(blockSize,calcBufferSize(sectorSize));
if (buffer == NULL) {
perror("ERROR MEMALIGN");
}
this->iterations = diskSize / stepSize;
}
FxBool
hwcAllocBuffers(hwcBoardInfo *bInfo, FxU32 nColBuffers, FxU32 nAuxBuffers)
{
#define FN_NAME "hwcAllocBuffers"
FxU32 bufStride, bufSize;
if (bInfo->vidInfo.initialized == FXFALSE) {
sprintf(errorString, "%s: Called before video initialization\n", FN_NAME);
return FXFALSE;
}
GDBG_INFO(80, "%s(0x%x, 0x%x, 0x%x)\n", FN_NAME, bInfo, nColBuffers, nAuxBuffers);
/* I've decided on > 2 instead of == 3 because we may support more
than 3 buffers in the future, and want 4 to set the
triple-buffering bit in dramInit1, also */
bInfo->vidInfo.tripleBuffering = (nColBuffers > 2);
bInfo->vidInfo.stride = bufStride =
calcBufferStride(driInfo.screenWidth, bInfo->vidInfo.tiled);
/* We want to place the FIFO after the tram but before the color
buffers with some pad */
bufSize = calcBufferSize(driInfo.screenWidth, driInfo.screenHeight,
bInfo->vidInfo.tiled);
bInfo->buffInfo.bufStride = bufStride;
bInfo->buffInfo.bufSize = bufSize;
if (bInfo->vidInfo.tiled) {
bInfo->buffInfo.bufStrideInTiles = (bufStride >> 7);
bInfo->buffInfo.bufSizeInTiles =
calcBufferSizeInTiles(driInfo.screenWidth, driInfo.screenHeight);
bInfo->buffInfo.bufHeightInTiles =
calcBufferHeightInTiles(driInfo.screenHeight);
}
