void ccci_magic_checker(void) { if (req_pool.magic_header != REQ_MAGIC_HEADER || req_pool.magic_footer != REQ_MAGIC_FOOTER) { CCCI_INF_MSG(-1, BM, "req_pool magic error!\n"); ccci_mem_dump(-1, &req_pool, sizeof(struct ccci_req_queue)); dump_stack(); } if (skb_pool_16.magic_header != SKB_MAGIC_HEADER || skb_pool_16.magic_footer != SKB_MAGIC_FOOTER) { CCCI_INF_MSG(-1, BM, "skb_pool_16 magic error!\n"); ccci_mem_dump(-1, &skb_pool_16, sizeof(struct ccci_skb_queue)); dump_stack(); } if (skb_pool_1_5K.magic_header != SKB_MAGIC_HEADER || skb_pool_1_5K.magic_footer != SKB_MAGIC_FOOTER) { CCCI_INF_MSG(-1, BM, "skb_pool_1_5K magic error!\n"); ccci_mem_dump(-1, &skb_pool_1_5K, sizeof(struct ccci_skb_queue)); dump_stack(); } if (skb_pool_4K.magic_header != SKB_MAGIC_HEADER || skb_pool_4K.magic_footer != SKB_MAGIC_FOOTER) { CCCI_INF_MSG(-1, BM, "skb_pool_4K magic error!\n"); ccci_mem_dump(-1, &skb_pool_4K, sizeof(struct ccci_skb_queue)); dump_stack(); } }
void reset_md1_md3_pccif(struct ccci_modem *md) { unsigned int tx_channel = 0; int i; struct md_ccif_ctrl *md_ctrl = (struct md_ccif_ctrl *)md->private_data; struct md_hw_info *hw_info = md_ctrl->hw_info; /* clear occupied channel */ while (tx_channel < 16) { if (ccif_read32(hw_info->md1_pccif_base, PCCIF_BUSY) & (1<<tx_channel)) ccif_write32(hw_info->md1_pccif_base, PCCIF_TCHNUM, tx_channel); if (ccif_read32(hw_info->md3_pccif_base, PCCIF_BUSY) & (1<<tx_channel)) ccif_write32(hw_info->md3_pccif_base, PCCIF_TCHNUM, tx_channel); tx_channel++; } /* clear un-ached channel *. ccif_write32(hw_info->md1_pccif_base, PCCIF_ACK, ccif_read32(hw_info->md3_pccif_base, PCCIF_BUSY)); ccif_write32(hw_info->md3_pccif_base, PCCIF_ACK, ccif_read32(hw_info->md1_pccif_base, PCCIF_BUSY)); /* clear SRAM */ for (i = 0; i < PCCIF_SRAM_SIZE/sizeof(unsigned int); i++) { ccif_write32(hw_info->md1_pccif_base, PCCIF_CHDATA + i*sizeof(unsigned int), 0); ccif_write32(hw_info->md3_pccif_base, PCCIF_CHDATA + i*sizeof(unsigned int), 0); } pr_debug("[C2K] Dump MD1 PCCIF\n"); ccci_mem_dump(-1, hw_info->md1_pccif_base, 0x300); pr_debug("[C2K] Dump MD3 PCCIF\n"); ccci_mem_dump(-1, hw_info->md3_pccif_base, 0x300); }
void ccci_skb_enqueue(struct ccci_skb_queue *queue, struct sk_buff *newsk) { unsigned long flags; spin_lock_irqsave(&queue->skb_list.lock, flags); if (queue->skb_list.qlen < queue->max_len) { __skb_queue_tail(&queue->skb_list, newsk); if (queue->skb_list.qlen > queue->max_history) queue->max_history = queue->skb_list.qlen; } else { #if 0 if (queue->pre_filled) { CCCI_ERR_MSG(0, BM, "skb queue too long, max=%d\n", queue->max_len); #else if (1) { #endif #ifdef CCCI_MEM_BM_DEBUG if (ccci_skb_addr_checker(newsk)) { CCCI_INF_MSG(-1, BM, "ccci_skb_enqueue:ccci_skb_addr_checker failed!\n"); ccci_mem_dump(-1, queue, sizeof(struct ccci_skb_queue)); dump_stack(); } #endif dev_kfree_skb_any(newsk); } else { __skb_queue_tail(&queue->skb_list, newsk); } } spin_unlock_irqrestore(&queue->skb_list.lock, flags); } void ccci_skb_queue_init(struct ccci_skb_queue *queue, unsigned int skb_size, unsigned int max_len, char fill_now) { int i; queue->magic_header = SKB_MAGIC_HEADER; queue->magic_footer = SKB_MAGIC_FOOTER; #ifdef CCCI_WP_DEBUG if (((unsigned long)queue) == ((unsigned long)(&skb_pool_16))) { CCCI_INF_MSG(-1, BM, "ccci_skb_queue_init: add hwp skb_pool_16.magic_footer=%p!\n", &queue->magic_footer); enable_watchpoint(&queue->magic_footer); } #endif skb_queue_head_init(&queue->skb_list); queue->max_len = max_len; if (fill_now) { for (i = 0; i < queue->max_len; i++) { struct sk_buff *skb = __alloc_skb_from_kernel(skb_size, GFP_KERNEL); if (skb != NULL) skb_queue_tail(&queue->skb_list, skb); } queue->pre_filled = 1; } else { queue->pre_filled = 0; } queue->max_history = 0; }
void md_cd_dump_debug_register(struct ccci_modem *md) { struct md_cd_ctrl *md_ctrl = (struct md_cd_ctrl *)md->private_data; md_cd_lock_cldma_clock_src(1); CCCI_INF_MSG(md->index, TAG, "Dump MD Bus status %x\n", MD_BUS_STATUS_BASE); ccci_mem_dump(md->index,md_ctrl->md_bus_status, MD_BUS_STATUS_LENGTH); CCCI_INF_MSG(md->index, TAG, "Dump MD PC monitor %x\n", MD_PC_MONITOR_BASE); ccci_write32(md_ctrl->md_pc_monitor, 0, 0x80000000); // stop MD PCMon ccci_mem_dump(md->index, md_ctrl->md_pc_monitor, MD_PC_MONITOR_LENGTH); ccci_write32(md_ctrl->md_pc_monitor, 0, 0x1); // restart MD PCMon CCCI_INF_MSG(md->index, TAG, "Dump MD TOPSM status %x\n", MD_TOPSM_STATUS_BASE); ccci_mem_dump(md->index, md_ctrl->md_topsm_status, MD_TOPSM_STATUS_LENGTH); CCCI_INF_MSG(md->index, TAG, "Dump MD OST status %x\n", MD_OST_STATUS_BASE); ccci_mem_dump(md->index, md_ctrl->md_ost_status, MD_OST_STATUS_LENGTH); md_cd_lock_cldma_clock_src(0); }
void md_cd_dump_debug_register(struct ccci_modem *md) { struct md_cd_ctrl *md_ctrl = (struct md_cd_ctrl *)md->private_data; unsigned int reg_value; md_cd_lock_modem_clock_src(1); CCCI_INF_MSG(md->index, TAG, "Dump MD Bus status %x\n", MD_BUS_STATUS_BASE); ccci_mem_dump(md->index,md_ctrl->md_bus_status, MD_BUS_STATUS_LENGTH); CCCI_INF_MSG(md->index, TAG, "Dump MD PC monitor %x\n", MD_PC_MONITOR_BASE); // stop MD PCMon reg_value = ccci_read32(md_ctrl->md_pc_monitor,0); reg_value &= ~(0x1<<21); ccci_write32(md_ctrl->md_pc_monitor, 0, reg_value); // clear bit[21] ccci_write32((md_ctrl->md_pc_monitor+4), 0, 0x80000000); // stop MD PCMon ccci_mem_dump(md->index, md_ctrl->md_pc_monitor, MD_PC_MONITOR_LENGTH); ccci_write32(md_ctrl->md_pc_monitor+4, 0, 0x1); // restart MD PCMon CCCI_INF_MSG(md->index, TAG, "Dump MD TOPSM status %x\n", MD_TOPSM_STATUS_BASE); ccci_mem_dump(md->index, md_ctrl->md_topsm_status, MD_TOPSM_STATUS_LENGTH); CCCI_INF_MSG(md->index, TAG, "Dump MD OST status %x\n", MD_OST_STATUS_BASE); ccci_mem_dump(md->index, md_ctrl->md_ost_status, MD_OST_STATUS_LENGTH); CCCI_INF_MSG(md->index, TAG, "Dump MD PLL %x\n", MD_PLL_BASE); ccci_mem_dump(md->index, md_ctrl->md_pll, MD_PLL_LENGTH); md_cd_lock_modem_clock_src(0); }
void ccci_dump_req(struct ccci_request *req) { /* int i, len; if(req && req->skb) { len = req->skb->len; printk("[ccci dump(%d)]", len); for(i=0; i<len && len<32; i++) { printk("%02X ", *(req->skb->data+i)); } printk("\n"); } */ ccci_mem_dump(req->skb->data, req->skb->len>32?32:req->skb->len); }
struct sk_buff *ccci_skb_dequeue(struct ccci_skb_queue *queue) { unsigned long flags; struct sk_buff *result; #ifdef CCCI_MEM_BM_DEBUG if (queue->magic_header != SKB_MAGIC_HEADER || queue->magic_footer != SKB_MAGIC_FOOTER) { CCCI_ERR_MSG(-1, BM, "ccci_skb_dequeue: queue=%lx, skb_pool_16=%lx, skb_pool_1_5K=%lx, skb_pool_4K=%lx, req_pool=%lx!\n", (unsigned long)queue, (unsigned long)&skb_pool_16, (unsigned long)&skb_pool_1_5K, (unsigned long)&skb_pool_4K, (unsigned long)&req_pool); ccci_mem_dump(-1, queue, sizeof(struct ccci_skb_queue)); dump_stack(); } #endif spin_lock_irqsave(&queue->skb_list.lock, flags); result = __skb_dequeue(&queue->skb_list); if (queue->pre_filled && queue->skb_list.qlen < queue->max_len / RELOAD_TH) queue_work(pool_reload_work_queue, &queue->reload_work); spin_unlock_irqrestore(&queue->skb_list.lock, flags); return result; }
static struct ccci_request *ccci_req_dequeue(struct ccci_req_queue *queue) { unsigned long flags; struct ccci_request *result = NULL; #ifdef CCCI_MEM_BM_DEBUG if (queue->magic_header != REQ_MAGIC_HEADER || queue->magic_footer != REQ_MAGIC_FOOTER) { ccci_mem_dump(-1, queue, sizeof(struct ccci_req_queue)); dump_stack(); } #endif spin_lock_irqsave(&queue->req_lock, flags); if (list_empty(&queue->req_list)) goto out; result = list_first_entry(&queue->req_list, struct ccci_request, entry); if (result) { queue->count--; list_del(&result->entry); } out: spin_unlock_irqrestore(&queue->req_lock, flags); return result; }
void cldma_dump_register(struct ccci_modem *md) { struct md_cd_ctrl *md_ctrl = (struct md_cd_ctrl *)md->private_data; md_cd_lock_cldma_clock_src(1); printk("[CCCI%d-DUMP]dump AP CLDMA md_global_con0=0x%x\n",md->index+1, cldma_read32(md_ctrl->md_global_con0, 0) ); printk("[CCCI%d-DUMP]dump AP CLDMA Tx register, active=%x\n",md->index+1, md_ctrl->txq_active); ccci_mem_dump(md->index, md_ctrl->cldma_ap_pdn_base+CLDMA_AP_UL_START_ADDR_0, CLDMA_AP_UL_CHECKSUM_CHANNEL_ENABLE-CLDMA_AP_UL_START_ADDR_0+4); printk("[CCCI%d-DUMP]dump AP CLDMA Rx register, active=%x\n",md->index+1, md_ctrl->rxq_active); ccci_mem_dump(md->index, md_ctrl->cldma_ap_pdn_base+CLDMA_AP_SO_ERROR, CLDMA_AP_DEBUG_ID_EN-CLDMA_AP_SO_ERROR+4); printk("[CCCI%d-DUMP]dump AP CLDMA MISC register\n",md->index+1); ccci_mem_dump(md->index, md_ctrl->cldma_ap_pdn_base+CLDMA_AP_L2TISAR0, CLDMA_AP_CHNL_IDLE-CLDMA_AP_L2TISAR0+4); printk("[CCCI%d-DUMP]dump MD CLDMA Tx register\n",md->index+1); ccci_mem_dump(md->index, md_ctrl->cldma_md_pdn_base+CLDMA_AP_UL_START_ADDR_0, CLDMA_AP_UL_CHECKSUM_CHANNEL_ENABLE-CLDMA_AP_UL_START_ADDR_0+4); printk("[CCCI%d-DUMP]dump MD CLDMA Rx register\n",md->index+1); ccci_mem_dump(md->index, md_ctrl->cldma_md_pdn_base+CLDMA_AP_SO_ERROR, CLDMA_AP_DEBUG_ID_EN-CLDMA_AP_SO_ERROR+4); printk("[CCCI%d-DUMP]dump MD CLDMA MISC register\n",md->index+1); ccci_mem_dump(md->index, md_ctrl->cldma_md_pdn_base+CLDMA_AP_L2TISAR0, CLDMA_AP_CHNL_IDLE-CLDMA_AP_L2TISAR0+4); md_cd_lock_cldma_clock_src(0); }
void ccci_dump_req(struct ccci_request *req) { ccci_mem_dump(-1, req->skb->data, req->skb->len > 32 ? 32 : req->skb->len); }
void cldma_dump_register(struct ccci_modem *md) { struct md_cd_ctrl *md_ctrl = (struct md_cd_ctrl *)md->private_data; printk("[CCCI%d-DUMP]dump AP CLDMA Tx pdn register, active=%x\n",md->index+1, md_ctrl->txq_active); ccci_mem_dump(md->index, md_ctrl->cldma_ap_pdn_base+CLDMA_AP_UL_START_ADDR_0, CLDMA_AP_UL_CHECKSUM_CHANNEL_ENABLE-CLDMA_AP_UL_START_ADDR_0+4); printk("[CCCI%d-DUMP]dump AP CLDMA Tx ao register, active=%x\n",md->index+1, md_ctrl->txq_active); ccci_mem_dump(md->index, md_ctrl->cldma_ap_ao_base+CLDMA_AP_UL_START_ADDR_BK_0, CLDMA_AP_UL_CURRENT_ADDR_BK_7-CLDMA_AP_UL_START_ADDR_BK_0+4); printk("[CCCI%d-DUMP]dump AP CLDMA Rx pdn register, active=%x\n",md->index+1, md_ctrl->rxq_active); ccci_mem_dump(md->index, md_ctrl->cldma_ap_pdn_base+CLDMA_AP_SO_ERROR, CLDMA_AP_SO_STOP_CMD-CLDMA_AP_SO_ERROR+4); printk("[CCCI%d-DUMP]dump AP CLDMA Rx ao register, active=%x\n",md->index+1, md_ctrl->rxq_active); ccci_mem_dump(md->index, md_ctrl->cldma_ap_ao_base+CLDMA_AP_SO_CFG, CLDMA_AP_DEBUG_ID_EN-CLDMA_AP_SO_CFG+4); printk("[CCCI%d-DUMP]dump AP CLDMA MISC pdn register\n",md->index+1); ccci_mem_dump(md->index, md_ctrl->cldma_ap_pdn_base+CLDMA_AP_L2TISAR0, CLDMA_AP_CLDMA_IP_BUSY-CLDMA_AP_L2TISAR0+4); printk("[CCCI%d-DUMP]dump AP CLDMA MISC ao register\n",md->index+1); ccci_mem_dump(md->index, md_ctrl->cldma_ap_ao_base+CLDMA_AP_L2RIMR0, CLDMA_AP_DUMMY-CLDMA_AP_L2RIMR0+4); printk("[CCCI%d-DUMP]dump MD CLDMA Tx pdn register, active=%x\n",md->index+1, md_ctrl->txq_active); ccci_mem_dump(md->index, md_ctrl->cldma_md_pdn_base+CLDMA_AP_UL_START_ADDR_0, CLDMA_AP_UL_CHECKSUM_CHANNEL_ENABLE-CLDMA_AP_UL_START_ADDR_0+4); printk("[CCCI%d-DUMP]dump MD CLDMA Tx ao register, active=%x\n",md->index+1, md_ctrl->txq_active); ccci_mem_dump(md->index, md_ctrl->cldma_md_ao_base+CLDMA_AP_UL_START_ADDR_BK_0, CLDMA_AP_UL_CURRENT_ADDR_BK_7-CLDMA_AP_UL_START_ADDR_BK_0+4); printk("[CCCI%d-DUMP]dump MD CLDMA Rx pdn register, active=%x\n",md->index+1, md_ctrl->rxq_active); ccci_mem_dump(md->index, md_ctrl->cldma_md_pdn_base+CLDMA_AP_SO_ERROR, CLDMA_AP_SO_STOP_CMD-CLDMA_AP_SO_ERROR+4); printk("[CCCI%d-DUMP]dump MD CLDMA Rx ao register, active=%x\n",md->index+1, md_ctrl->rxq_active); ccci_mem_dump(md->index, md_ctrl->cldma_md_ao_base+CLDMA_AP_SO_CFG, CLDMA_AP_DEBUG_ID_EN-CLDMA_AP_SO_CFG+4); printk("[CCCI%d-DUMP]dump MD CLDMA MISC pdn register\n",md->index+1); ccci_mem_dump(md->index, md_ctrl->cldma_md_pdn_base+CLDMA_AP_L2TISAR0, CLDMA_AP_CLDMA_IP_BUSY-CLDMA_AP_L2TISAR0+4); printk("[CCCI%d-DUMP]dump MD CLDMA MISC ao register\n",md->index+1); ccci_mem_dump(md->index, md_ctrl->cldma_md_ao_base+CLDMA_AP_L2RIMR0, CLDMA_AP_DUMMY-CLDMA_AP_L2RIMR0+4); }