/**
** @brief
** ROM/SRAM/FlashPage Write Access Timing
*/
static void
s3c4510_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
{
/* see Figure 4-21 in [1] */
part_t *p = PART;
chain_t *chain = CHAIN;
part_set_signal( p, nRCS[0], 1, 0 );
part_set_signal( p, nRCS[1], 1, 1 );
part_set_signal( p, nRCS[2], 1, 1 );
part_set_signal( p, nRCS[3], 1, 1 );
part_set_signal( p, nRCS[4], 1, 1 );
part_set_signal( p, nRCS[5], 1, 1 );
part_set_signal( p, nWBE[0], 1, 1 );
part_set_signal( p, nWBE[1], 1, 1 );
part_set_signal( p, nWBE[2], 1, 1 );
part_set_signal( p, nWBE[3], 1, 1 );
part_set_signal( p, nOE, 1, 1 );
setup_address( bus, adr );
setup_data( bus, data );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, nWBE[0], 1, 0 );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, nWBE[0], 1, 1 );
part_set_signal( p, nRCS[0], 1, 1 );
part_set_signal( p, nRCS[1], 1, 1 );
part_set_signal( p, nRCS[2], 1, 1 );
part_set_signal( p, nRCS[3], 1, 1 );
part_set_signal( p, nRCS[4], 1, 1 );
part_set_signal( p, nRCS[5], 1, 1 );
chain_shift_data_registers( chain, 0 );
}
/**
* bus->driver->(*write)
*
*/
static void
sh7750r_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
{
chain_t *chain = CHAIN;
part_t *p = PART;
int cs[8];
int i;
for (i = 0; i < 8 ; i++)
cs[i] = 1;
cs[(adr & 0x1C000000) >> 26] = 0;
part_set_signal( p, CS[0], 1, cs[0] );
part_set_signal( p, CS[1], 1, cs[1] );
part_set_signal( p, CS[2], 1, cs[2] );
part_set_signal( p, CS[3], 1, cs[3] );
part_set_signal( p, CS[4], 1, cs[4] );
part_set_signal( p, CS[5], 1, cs[5] );
part_set_signal( p, CS[6], 1, cs[6] );
part_set_signal( p, RDWR, 1, 0 );
part_set_signal( p, RDWR2, 1, 0 );
part_set_signal( p, WE[0], 1, 1 );
part_set_signal( p, WE[1], 1, 1 );
part_set_signal( p, WE[2], 1, 1 );
part_set_signal( p, WE[3], 1, 1 );
part_set_signal( p, RD, 1, 1 );
part_set_signal( p, RD2, 1, 1 );
setup_address( bus, adr );
setup_data( bus, data );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, WE[0], 1, 0 );
part_set_signal( p, WE[1], 1, 0 );
part_set_signal( p, WE[2], 1, 0 );
part_set_signal( p, WE[3], 1, 0 );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, WE[0], 1, 1 );
part_set_signal( p, WE[1], 1, 1 );
part_set_signal( p, WE[2], 1, 1 );
part_set_signal( p, WE[3], 1, 1 );
chain_shift_data_registers( chain, 0 );
}
/**
* bus->driver->(*read_end)
*
*/
static uint32_t
jopcyc_bus_read_end( bus_t *bus )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
bus_area_t area;
component_t *comp;
/* use last address of access to determine component */
comp_bus_area( bus, LAST_ADDR, &area, &comp );
if (!comp) {
printf( _("Address out of range\n") );
return 0;
}
part_set_signal( p, nCS, 1, 1 );
part_set_signal( p, nOE, 1, 1 );
if (comp->ctype == RAM) {
part_set_signal( p, nLB, 1, 1 );
part_set_signal( p, nUB, 1, 1 );
}
chain_shift_data_registers( chain, 1 );
for (i = 0; i < area.width; i++)
d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
return d;
}
/**
* bus->driver->(*read_end)
*
*/
static uint32_t
sh7727_bus_read_end( bus_t *bus )
{
part_t *p = PART;
int i;
uint32_t d = 0;
bus_area_t area;
sh7727_bus_area( bus, 0, &area );
part_set_signal( p, CS[0], 1, 1 );
part_set_signal( p, CS[2], 1, 1 );
part_set_signal( p, CS[3], 1, 1 );
part_set_signal( p, CS[4], 1, 1 );
part_set_signal( p, CS[5], 1, 1 );
part_set_signal( p, CS[6], 1, 1 );
part_set_signal( p, RD, 1, 1 );
chain_shift_data_registers( CHAIN, 1 );
for (i = 0; i < area.width; i++)
d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
return d;
}
/**
* bus->driver->(*read_next)
*
*/
static uint32_t
jopcyc_bus_read_next( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
bus_area_t area;
component_t *comp;
comp_bus_area( bus, adr, &area, &comp );
if (!comp) {
printf( _("Address out of range\n") );
LAST_ADDR = adr;
return 0;
}
setup_address( bus, adr, comp );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < area.width; i++)
d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
return d;
}
/**
* bus->driver->(*read_next)
*
*/
static uint32_t
sharc_21065L_bus_read_next( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
uint32_t d;
//uint32_t old_last_adr = LAST_ADR;
LAST_ADR = adr;
if (adr < UINT32_C(0x080000)) {
int i;
bus_area_t area;
sharc_21065L_bus_area( bus, adr, &area );
setup_address( bus, adr );
chain_shift_data_registers( chain, 1 );
d = 0;
for (i = 0; i < area.width; i++)
d |= (uint32_t) (part_get_signal( p, MD[i] ) << i);
return d;
}
return 0;
}
static int
cmd_detect_run( char *params[] )
{
if (cmd_params( params ) != 1)
return -1;
if (!cmd_test_cable())
return 1;
buses_free();
parts_free( chain->parts );
chain->parts = NULL;
detect_parts( chain, JTAG_DATA_DIR );
if (!chain->parts)
return 1;
if (!chain->parts->len) {
parts_free( chain->parts );
chain->parts = NULL;
return 1;
}
parts_set_instruction( chain->parts, "SAMPLE/PRELOAD" );
chain_shift_instructions( chain );
chain_shift_data_registers( chain, 1 );
parts_set_instruction( chain->parts, "BYPASS" );
chain_shift_instructions( chain );
return 1;
}
/**
* bus->driver->(*read_end)
*
*/
static uint32_t
sh7750r_bus_read_end( bus_t *bus )
{
part_t *p = PART;
int cs[8];
int i;
uint32_t d = 0;
for (i = 0; i < 8; i++)
cs[i] = 1;
part_set_signal( p, CS[0], 1, cs[0] );
part_set_signal( p, CS[1], 1, cs[1] );
part_set_signal( p, CS[2], 1, cs[2] );
part_set_signal( p, CS[3], 1, cs[3] );
part_set_signal( p, CS[4], 1, cs[4] );
part_set_signal( p, CS[5], 1, cs[5] );
part_set_signal( p, CS[6], 1, cs[6] );
part_set_signal( p, RD, 1, 1 );
part_set_signal( p, RD2, 1, 1 );
chain_shift_data_registers( CHAIN, 1 );
for (i = 0; i < 32; i++)
d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
return d;
}
/**
* bus->driver->(*init)
*
*/
static int
jopcyc_bus_init( bus_t *bus )
{
part_t *p = PART;
chain_t *chain = CHAIN;
component_t *comp;
if (tap_state(chain) != Run_Test_Idle) {
/* silently skip initialization if TAP isn't in RUNTEST/IDLE state
this is required to avoid interfering with detect when initbus
is contained in the part description file
bus_init() will be called latest by bus_prepare() */
return URJTAG_STATUS_OK;
}
/* Preload update registers
See AN039, "Guidelines for IEEE Std. 1149.1 Boundary Scan Testing */
part_set_instruction( p, "SAMPLE/PRELOAD" );
chain_shift_instructions( chain );
/* RAMA */
comp = COMP_RAMA;
set_data_in( bus, comp );
part_set_signal( p, nCS, 1, 1 );
part_set_signal( p, nWE, 1, 1 );
part_set_signal( p, nOE, 1, 1 );
part_set_signal( p, nLB, 1, 1 );
part_set_signal( p, nUB, 1, 1 );
/* RAMB */
comp = COMP_RAMB;
set_data_in( bus, comp );
part_set_signal( p, nCS, 1, 1 );
part_set_signal( p, nWE, 1, 1 );
part_set_signal( p, nOE, 1, 1 );
part_set_signal( p, nLB, 1, 1 );
part_set_signal( p, nUB, 1, 1 );
/* FLASH */
comp = COMP_FLASH;
set_data_in( bus, comp );
part_set_signal( p, nCS, 1, 1 );
part_set_signal( p, nWE, 1, 1 );
part_set_signal( p, nOE, 1, 1 );
part_set_signal( p, nCS2, 1, 1 );
part_set_signal( p, nRDY, 0, 0 );
/* Serial Port */
part_set_signal( p, SER_RXD, 0, 0 );
part_set_signal( p, SER_NRTS, 1, 1 );
part_set_signal( p, SER_TXD, 1, 1 );
part_set_signal( p, SER_NCTS, 0, 0 );
chain_shift_data_registers( chain, 0 );
INITIALIZED = 1;
return URJTAG_STATUS_OK;
}
/**
* bus->driver->(*read_start)
*
*/
static void
sh7727_bus_read_start( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
int cs[8];
int i;
for (i = 0; i < 8; i++)
cs[i] = 1;
cs[(adr & 0x1C000000) >> 26] = 0;
part_set_signal( p, CS[0], 1, cs[0] );
part_set_signal( p, CS[2], 1, cs[2] );
part_set_signal( p, CS[3], 1, cs[3] );
part_set_signal( p, CS[4], 1, cs[4] );
part_set_signal( p, CS[5], 1, cs[5] );
part_set_signal( p, CS[6], 1, cs[6] );
part_set_signal( p, RDWR, 1, 1 );
part_set_signal( p, WE[0], 1, 1 );
part_set_signal( p, WE[1], 1, 1 );
part_set_signal( p, WE[2], 1, 1 );
part_set_signal( p, WE[3], 1, 1 );
part_set_signal( p, RD, 1, 0 );
setup_address( bus, adr );
set_data_in( bus );
chain_shift_data_registers( CHAIN, 0 );
}
/**
* bus->driver->(*read_end)
*
*/
static uint32_t
sharc_21065L_bus_read_end( bus_t *bus )
{
part_t *p = PART;
chain_t *chain = CHAIN;
if (LAST_ADR < UINT32_C(0x080000)) {
int i;
uint32_t d = 0;
bus_area_t area;
sharc_21065L_bus_area( bus, LAST_ADR, &area );
part_set_signal( p, BMS, 1, 1 );
part_set_signal( p, nWE, 1, 1 );
part_set_signal( p, nOE, 1, 1 );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < area.width; i++)
d |= (uint32_t) (part_get_signal( p, MD[i] ) << i);
return d;
}
return 0;
}
static uint32_t
s3c4510_bus_read_end( bus_t *bus )
{
/* see Figure 4-19 in [1] */
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
part_set_signal( p, nRCS[0], 1, 1 );
part_set_signal( p, nRCS[1], 1, 1 );
part_set_signal( p, nRCS[2], 1, 1 );
part_set_signal( p, nRCS[3], 1, 1 );
part_set_signal( p, nRCS[4], 1, 1 );
part_set_signal( p, nRCS[5], 1, 1 );
part_set_signal( p, nWBE[0], 1, 1 );
part_set_signal( p, nWBE[1], 1, 1 );
part_set_signal( p, nWBE[2], 1, 1 );
part_set_signal( p, nWBE[3], 1, 1 );
part_set_signal( p, nOE, 1, 1 );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < dbus_width; i++)
d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
return d;
}
/**
* bus->driver->(*read_start)
*
*/
static void
jopcyc_bus_read_start( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
bus_area_t area;
component_t *comp;
comp_bus_area( bus, adr, &area, &comp );
if (!comp) {
printf( _("Address out of range\n") );
LAST_ADDR = adr;
return;
}
part_set_signal( p, nCS, 1, 0 );
part_set_signal( p, nWE, 1, 1 );
part_set_signal( p, nOE, 1, 0 );
if (comp->ctype == RAM) {
part_set_signal( p, nLB, 1, 0 );
part_set_signal( p, nUB, 1, 0 );
}
setup_address( bus, adr, comp );
set_data_in( bus, comp );
chain_shift_data_registers( chain, 0 );
}
/**
* bus->driver->(*read_start)
*
*/
static void
s3c4510_bus_read_start( bus_t *bus, uint32_t adr )
{
/* see Figure 4-19 in [1] */
chain_t *chain = CHAIN;
s3c4510_bus_setup_ctrl( bus, 0x00fffe); /* nOE=0, nRCS0 =0 */
setup_address( bus, adr );
set_data_in( bus );
chain_shift_data_registers( chain, 0 );
}
static void
ppc440gx_ebc8_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
{
part_t *p = PART;
chain_t *chain = CHAIN;
part_set_signal( p, nCS, 1, 0 );
part_set_signal( p, nWE, 1, 1 );
part_set_signal( p, nOE, 1, 1 );
setup_address( bus, adr );
setup_data( bus, data );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, nWE, 1, 0 );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, nWE, 1, 1 );
part_set_signal( p, nCS, 1, 1 );
chain_shift_data_registers( chain, 0 );
}
/**
* bus->driver->(*write)
*
*/
static void
bf533_ezkit_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
{
part_t *p = PART;
chain_t *chain = CHAIN;
// printf("Writing %04X to %08X...\n", data, adr);
select_flash( bus );
part_set_signal( p, AOE, 1, 1 );
setup_address( bus, adr );
setup_data( bus, data );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, AWE, 1, 0 );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, AWE, 1, 1 );
unselect_flash( bus );
chain_shift_data_registers( chain, 0 );
}
/**
* bus->driver->(*write)
*
* @brief
* ROM/SRAM/FlashPage Write Access Timing
*/
static void
s3c4510_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
{
/* see Figure 4-21 in [1] */
chain_t *chain = CHAIN;
s3c4510_bus_setup_ctrl( bus, 0x01fffe); /* nOE=1, nRCS0 =0 */
setup_address( bus, adr );
setup_data( bus, data );
chain_shift_data_registers( chain, 0 );
switch (dbus_width)
{
default:
case 8:
s3c4510_bus_setup_ctrl( bus, 0x01fefe); /* nOE=1, nRCS0 =0, nWBE0=0 */
break;
case 16:
s3c4510_bus_setup_ctrl( bus, 0x01fcfe); /* nOE=1, nRCS0 =0, nWBE0-1=0 */
break;
case 32:
s3c4510_bus_setup_ctrl( bus, 0x01f0fe); /* nOE=1, nRCS0 =0, nWBE0-3=0 */
break;
}
setup_address( bus, adr );
setup_data( bus, data );
chain_shift_data_registers( chain, 0 );
s3c4510_bus_setup_ctrl( bus, 0x01ffff); /* nOE=1, nRCS0 =1 */
chain_shift_data_registers( chain, 0 );
DEBUG_LVL2( printf("bus_write %08x @ %08x\n", data, adr); )
}
/**
* bus->driver->(*read_start)
*
*/
static void
bf533_ezkit_bus_read_start( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
select_flash( bus );
part_set_signal( p, AOE, 1, 0 );
part_set_signal( p, AWE, 1, 1 );
setup_address( bus, adr );
set_data_in( bus );
chain_shift_data_registers( chain, 0 );
}
/**
* bus->driver->(*write)
*
*/
static void
sharc_21065L_bus_write( bus_t *bus, uint32_t adr, uint32_t data )
{
part_t *p = PART;
chain_t *chain = CHAIN;
if (adr >= 0x080000)
return;
part_set_signal( p, BMS, 1, 0 );
part_set_signal( p, nWE, 1, 1 );
part_set_signal( p, nOE, 1, 1 );
setup_address( bus, adr );
setup_data( bus, adr, data );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, nWE, 1, 0 );
chain_shift_data_registers( chain, 0 );
part_set_signal( p, nWE, 1, 1 );
chain_shift_data_registers( chain, 0 );
}
/**
* bus->driver->(*read_next)
*
*/
static uint32_t
sh7750r_bus_read_next( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
int i;
uint32_t d = 0;
setup_address( bus, adr );
chain_shift_data_registers( CHAIN, 1 );
for (i = 0; i < 32; i++)
d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
return d;
}
/**
* bus->driver->(*read_next)
*
*/
static uint32_t
bf533_ezkit_bus_read_next( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
setup_address( bus, adr );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < 16; i++)
d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
return d;
}
/**
* bus->driver->(*read_end)
*
*/
static uint32_t
s3c4510_bus_read_end( bus_t *bus )
{
/* see Figure 4-19 in [1] */
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
s3c4510_bus_setup_ctrl( bus, 0x01ffff); /* nOE=1, nRCS0 =1 */
chain_shift_data_registers( chain, 1 );
for (i = 0; i < dbus_width; i++)
d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
return d;
}
static uint32_t
s3c4510_bus_read_next( bus_t *bus, uint32_t adr )
{
/* see Figure 4-20 in [1] */
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
setup_address( bus, adr );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < dbus_width; i++)
d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
return d;
}
/**
* bus->driver->(*read_next)
*
*/
static uint32_t
sh7727_bus_read_next( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
int i;
uint32_t d = 0;
bus_area_t area;
sh7727_bus_area( bus, 0, &area );
setup_address( bus, adr );
chain_shift_data_registers( CHAIN, 1 );
for (i = 0; i < area.width; i++)
d |= (uint32_t) (part_get_signal( p, D[i] ) << i);
return d;
}
/**
* bus->driver->(*read_end)
*
*/
static uint32_t
bf533_ezkit_bus_read_end( bus_t *bus )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
unselect_flash( bus );
part_set_signal( p, AOE, 1, 1 );
part_set_signal( p, AWE, 1, 1 );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < 16; i++)
d |= (uint32_t) (part_get_signal( p, DATA[i] ) << i);
return d;
}
static uint32_t
ppc440gx_ebc8_bus_read_next( bus_t *bus, uint32_t adr )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
bus_area_t area;
ppc440gx_ebc8_bus_area( bus, adr, &area );
setup_address( bus, adr );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < area.width; i++)
d |= (uint32_t) (part_get_signal( p, D[PPC440GX_DATA_LINES-1-i] ) << i);
return d;
}
static int
cmd_shift_run( char *params[] )
{
if (cmd_params( params ) != 2)
return -1;
if (!cmd_test_cable())
return 1;
if (strcmp( params[1], "ir" ) == 0) {
chain_shift_instructions( chain );
return 1;
}
if (strcmp( params[1], "dr" ) == 0) {
chain_shift_data_registers( chain, 1 );
return 1;
}
return -1;
}
/**
* bus->driver->(*read_start)
*
*/
static void
sharc_21065L_bus_read_start( bus_t *bus, uint32_t adr )
{
chain_t *chain = CHAIN;
part_t *p = PART;
LAST_ADR = adr;
if (adr >= 0x080000)
return;
part_set_signal( p, BMS, 1, 0 );
part_set_signal( p, nWE, 1, 1 );
part_set_signal( p, nOE, 1, 0 );
setup_address( bus, adr );
set_data_in( bus, adr );
chain_shift_data_registers( chain, 0 );
}
static uint32_t
ppc440gx_ebc8_bus_read_end( bus_t *bus )
{
part_t *p = PART;
chain_t *chain = CHAIN;
int i;
uint32_t d = 0;
bus_area_t area;
ppc440gx_ebc8_bus_area( bus, 0, &area );
part_set_signal( p, nCS, 1, 1 );
part_set_signal( p, nOE, 1, 1 );
chain_shift_data_registers( chain, 1 );
for (i = 0; i < area.width; i++)
d |= (uint32_t) (part_get_signal( p, D[PPC440GX_DATA_LINES-1-i] ) << i);
return d;
}
/**
* bus->driver->(*init)
*
*/
static int
s3c4510_bus_init( bus_t *bus )
{
part_t *p = PART;
chain_t *chain = CHAIN;
if (tap_state(chain) != Run_Test_Idle) {
/* silently skip initialization if TAP isn't in RUNTEST/IDLE state
this is required to avoid interfering with detect when initbus
is contained in the part description file
bus_init() will be called latest by bus_prepare() */
return URJTAG_STATUS_OK;
}
part_set_instruction( p, "SAMPLE/PRELOAD" );
chain_shift_instructions( chain );
chain_shift_data_registers( chain, 0 );
INITIALIZED = 1;
return URJTAG_STATUS_OK;
}
