int main(int argc, char **argv)
{
chip_init(EX_RATE, 1, EX_BUFFER_LEN, EX_NUM_BUFFERS, EX_OVERSAMPLE);
chip_set_engine_ptr(&printme,0);
chip_set_wave(0, wave_tri, 32, 1);
chip_set_amp(0,0xF,0xF);
chip_set_freq(0,110);
char c = 0;
chip_start();
printf("LibChip waveforms example\n");
printf("Enter a letter for the corresponding choice and strike enter.\n");
printf(" [t] /\\/\\/\\/\\ \n");
printf(" [p] --__--__--__\n");
printf(" [s] /_/_/_/_\n");
printf(" [f] __-_____-------\n");
printf(" [n] (noise)\n");
printf(" [q] Quit\n");
while(c != 'q')
{
printf(">");
c = getchar();
printf("\n");
switch (c | 0x20) // Case insensitive; make it uppercase
{
case 't':
chip_set_wave(0, wave_tri, 32, 1);
// chip_set_wave(1, wave_tri, 32, 1);
chip_set_noise(0,0);
// chip_set_noise(1,0);
break;
case 'p':
chip_set_wave(0, wave_50, 32, 1);
// chip_set_wave(1, wave_50, 32, 1);
chip_set_noise(0,0);
// chip_set_noise(1,0);
break;
case 's':
chip_set_wave(0, wave_saw, 32, 1);
// chip_set_wave(1, wave_saw, 32, 1);
chip_set_noise(0,0);
// chip_set_noise(1,0);
break;
case 'f':
chip_set_wave(0, wave_funk, 64, 1);
// chip_set_wave(1, wave_funk, 32, 1);
chip_set_noise(0,0);
// chip_set_noise(1,0);
break;
case 'n':
chip_set_noise(0,1);
// chip_set_noise(1,1);
break;
default:
break;
}
}
chip_shutdown();
printf("Finished after %f seconds.\n",frame_counter / 60.0);
return 0;
}
void init()
{
ResetReason = MCUSR;
cli();
chip_init (); // Chip initialization
init_leds ();
delay(1000000); // ~ 2 sec
read_cal(); // Read everything including motor stops.
// yes can_init() needs MyInstance to be set already for filtering!
can_init(CAN_250K_BAUD); /* Enables Mob0 for Reception! */
// INIT MYINSTANCE:
config_init();
can_instance_init();
set_rx_callback ( can_file_message );
set_configure_callback ( config_change );
sei();
OS_InitTask();
pot_init();
motor_init ();
can_prep_instance_request( &msg2, 0xBB );
can_send_msg( 0, &msg2 );
}
int main(void)
{
union uKeyRoster scan;
chip_init(); /* Chip initialization */
can_init(); /* Enables Mob0 for Reception! */
an_init(); /* Analog SPI module init */
init_leds();
can_init_test_msg();
byte result = CANSTMOB;
/* TEST B) Button boards configured as receivers; LEDs showing upper nibble.
1 Analog board on network will transmit a message. */
send_test_msgs();
while (1)
{
// READ ALL ACTIVE ANALOG SIGNALS:
an_read_actives();
// TRANSMIT ACTIVE SIGNALS
can_send_analog_msgs();
/* Send about every 1 second */
delay( one_second );
}
return(0);
}
static void
SYM53C500_int_host_reset(int io_port)
{
outb(C4_IMG, io_port + CONFIG4); /* REG0(io_port); */
outb(CHIP_RESET, io_port + CMD_REG);
outb(SCSI_NOP, io_port + CMD_REG); /* required after reset */
outb(SCSI_RESET, io_port + CMD_REG);
chip_init(io_port);
}
/**
* @brief Bootloader "C" entry point
*
* @param none
*
* @returns Nothing. Will launch/restart image if successful, halt if not.
*/
void bootrom_main(void) {
chip_init();
dbginit();
dbgprint("gbboot Server\n");
chip_wait_for_link_up();
while(1) {
server_loop();
}
}
int board_init()
{
gd->bd->bi_arch_number = MACH_TYPE_OPENPHONE;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
ADI_init();
chip_init();
LDO_Init();
sprd_gpio_init();
//board_gpio_init();
return 0;
}
canvas_t *st7735_new(const st7735_params_t *params)
{
st7735_t *screen = &g_st7735_screen;
screen->params = *params;
chip_init(screen);
screen->canvas.width = LCD_WIDTH;
screen->canvas.height = LCD_HEIGHT;
screen->canvas.ops = &st7735_ops;
return &screen->canvas;
}
/**
* @brief Bootloader "C" entry point
*
* @param none
*
* @returns Nothing. Will launch/restart image if successful, halt if not.
*/
void bootrom_main(void) {
chip_init();
dbginit();
dbgprint("Hello world from s3fw\n");
#ifdef _SIMULATION
/* Handshake with the controller, indicating trying to enter standby */
chip_handshake_boot_status(0);
enter_standby();
#endif
/* Our work is done */
while(1);
}
void audio_init(void)
{
if (audio_is_init)
{
fprintf(stderr, "[%s]: Audio is already init!\n",__PRETTY_FUNCTION__);
}
// Set configuration to defaults if user has not specified preferences
if (!audio_rate)
{
audio_rate = AUDIO_RATE;
}
if (!audio_buffer_len)
{
audio_buffer_len = AUDIO_BUFFER_LEN;
}
if (!audio_num_buffers)
{
audio_num_buffers = AUDIO_NUM_BUFFERS;
}
if (!audio_oversample)
{
audio_oversample = AUDIO_OVERSAMPLE;
}
if (!audio_channel_count)
{
audio_channel_count = AUDIO_CHANNEL_COUNT;
}
printf("[%s]: Initializing audio:\n", __PRETTY_FUNCTION__);
printf("\tSampling rate: %dHz\n", audio_rate);
printf("\tBuffer length: %d samples\n", audio_buffer_len);
printf("\tBuffer count: %d buffers\n", audio_num_buffers);
printf("\tOversample: %d\n", audio_oversample);
printf("\t%d channels\n\n", audio_channel_count);
// Set up libchip
chip_init(audio_rate,
audio_channel_count,
audio_buffer_len,
audio_num_buffers,
audio_oversample);
audio_is_init = 1;
// libchip is set up; begin audio thread
chip_start();
}
int board_init()
{
gd->bd->bi_arch_number = MACH_TYPE_OPENPHONE;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
#if 0
ADI_init();
chip_init();
LDO_Init();
sprd_gpio_init();
//board_gpio_init();
#endif
pin_init();
sprd_gpio_init(sprd_gpio_resource);
sound_init();
return 0;
}
//***** main *****************************************************
int main(void)
{
union uKeyRoster scan;
chip_init(); // Chip initialization
can_init(); /* Enables Mob0 for Reception! */
can_init_test_msg();
byte result = CANSTMOB;
send_test_msgs();
/* TEST A) Initial Board Alive test, call this below. Watch LEDs go.
led_test_pattern(); */
/* B) Enable Receive Interrupts and call Show_byte() in the ISR.
ALL CODE IS IN ISR() */
while (1) {};
while (1)
{
wait_for_press();
// Result is stored in prev_keys & keys and hopefully keys2
scan = pack_array( keys );
can_prep_button_roster_msg( &msg1, scan );
can_send_msg( 0, &msg1 );
show_byte( scan.array[0], 1 );
// result = CANEN2; // shows MOb n in use mob1 is staying "in use" after 1 can_tx()
// result = CANSTMOB; // shows TXOK or ERRs BERR staying on instead of TXOK
// result = CANGSTA; // shows TXOK or ERRs TXBSY blinking (retires?)
// result = 0x83;
// result = scan.array[0];
// show_byte( a, 1 );
// [0] upper nibble is front row
// [0] lower is top row
// [1] upper nibble is 2nd row
// [1] lower is 3rd row
// [2] upper nibble is 4th row
/* for (int j=0; j<4; j++)
{
show_result_toggle(result);
delay (one_second/2);
} */
}
return(0);
}
void init()
{
cli();
chip_init ( );
init_leds ( );
buttons_init( );
delay(40000); // ~ 1 sec
read_cal();
can_init( CAN_250K_BAUD ); /* Enables Mob0 for Reception! */
config_init();
can_instance_init();
set_configure_callback ( config_change );
//set_rx_callback( can_file_message ); // empty
sei();
OS_InitTask ( );
}
/**
* @brief Bootloader "C" entry point
*
* @param none
*
* @returns Nothing. Will launch/restart image if successful, halt if not.
*/
void bootrom_main(void) {
chip_init();
dbginit();
init_last_error();
dbgprint("gbboot Server\n");
chip_wait_for_link_up();
chip_unipro_attr_write(DME_ARA_BOOT_CONTROL,
FORCE_UNIPRO_BOOT,
0,
ATTR_PEER);
while(1) {
server_loop();
}
}
/*
* Set up the network interface.
*/
void eth_init(eth_t *u, const char *name, int prio, mem_pool_t *pool,
struct _arp_t *arp, const unsigned char *macaddr) {
u->netif.interface = ð_interface;
u->netif.name = name;
u->netif.arp = arp;
u->netif.mtu = ETH_MTU;
u->netif.type = NETIF_ETHERNET_CSMACD;
u->netif.bps = 100000;
memcpy(&u->netif.ethaddr, macaddr, 6);
u->pool = pool;
u->rxbuf = (unsigned char*) ((unsigned) (u->rxbuf_data + 7) & ~7);
u->txbuf = (unsigned char*) ((unsigned) (u->txbuf_data + 7) & ~7);
u->rxbuf_physaddr = (unsigned) u->rxbuf;
u->txbuf_physaddr = (unsigned) u->txbuf;
buf_queue_init(&u->inq, u->inqdata, sizeof(u->inqdata));
buf_queue_init(&u->outq, u->outqdata, sizeof(u->outqdata));
/*u->rxbuf_data[0] = 1;
u->rxbuf_data[1] = 2;
u->rxbuf_data[2] = 3;
u->rxbuf_data[3] = 4;
u->rxbuf_data[4] = 5;
u->rxbuf_data[5] = 6;
u->rxbuf_data[6] = 7;
u->rxbuf_data[7] = 8;
debug_printf("buf addres rxbuf_data = 0x%08X\nrx_uf = 0x%08X\nphysaddr = 0x%08X\n", &u->rxbuf_data[0], u->rxbuf, u->rxbuf_physaddr);
unsigned *dst;
dst = u->rxbuf_physaddr;
debug_printf("*dst = 0x%08X (0x%08X)\n", *dst, dst);
*/
/* Initialize hardware. */
chip_init(u);
/* Create interrupt task. */
u->task_eth_handler = task_create(interrupt_task, u, "eth", prio, u->stack,
sizeof(u->stack));
}
int main(void)
{
uint8_t vbat_status;
chip_init();
vbat_status = vbat_system_check(true);
/*
* Depending on the VBAT system check appropriate actions need to
* be taken.
* In this example we re-initialize the VBAT system in all
* error cases.
*/
switch (vbat_status)
{
case VBAT_STATUS_OK:
// Interrupts must be re-enabled
RTC32_SetCompareIntLevel(RTC32_COMPINTLVL_LO_gc);
break;
case VBAT_STATUS_NO_POWER: // fall through
case VBAT_STATUS_BBPOR: // fall through
case VBAT_STATUS_BBBOD: // fall through
case VBAT_STATUS_XOSCFAIL: // fall through
default:
vbat_init();
break;
}
sei();
while (true) {
RTC32_SetAlarm(2);
PORTA.OUTTGL = 0x02;
SLEEP.CTRL = SLEEP_SMODE_PSAVE_gc | SLEEP_SEN_bm;
cpu_sleep();
}
}
/**
* @brief Stage 2 loader "C" entry point. Started from Stage 1
* bootloader. Primary function is to load, validate, and start
* executing a stage 3 image. Also will (when fully implemented)
* perform startup negotiations with AP, cryptographic initialzations
* and tests, module authentication, flash update, and other housekeeping.
* Image load and validation are essntially identical to the crresponding
* functions in stage 1, although different keys are used for signature
* validation.
*
* @param none
*
* @returns Nothing. Will launch/restart image if successful, halt if not.
*/
void bootrom_main(void) {
int rc;
/* TA-20 R/W data in bufRAM */
uint32_t boot_status = INIT_STATUS_OPERATING;
bool boot_from_spi = true;
bool fallback_boot_unipro = false;
uint32_t is_secure_image;
secondstage_cfgdata *cfgdata;
chip_init();
dbginit();
/* Ensure that we start each boot with an assumption of success */
init_last_error();
crypto_init();
dbgprint("\nHello world from s2fw\n");
if (!get_2ndstage_cfgdata(&cfgdata)) {
dbgprint("found valid config data\n");
if (cfgdata->use_fake_ims) {
/**
* We don't really need to handle all the efuses as boot ROM
* does. But we do want to update the EPUID according to the
* fake IMS. And the rest of the efuse handling do no harm
* anyway.
*/
if (efuse_init() != 0) {
halt_and_catch_fire(boot_status);
}
}
}
uint8_t ims[TSB_ISAA_NUM_IMS_BYTES];
tsb_get_ims(ims, TSB_ISAA_NUM_IMS_BYTES);
key_generation(ims);
chip_unipro_init();
boot_control(&boot_from_spi);
/* Advertise our boot status */
chip_advertise_boot_status(boot_status);
/* Advertise our initialization type */
rc = chip_advertise_boot_type();
if (rc) {
halt_and_catch_fire(boot_status);
}
if (boot_from_spi) {
dbgprint("Boot from SPIROM\n");
spi_ops.init();
/**
* Call locate_ffff_element_on_storage to locate next stage FW.
* Do not care about the image length here so pass NULL.
*/
if (locate_ffff_element_on_storage(&spi_ops,
FFFF_ELEMENT_STAGE_3_FW,
NULL) == 0) {
boot_status = INIT_STATUS_SPI_BOOT_STARTED;
chip_advertise_boot_status(boot_status);
if (!load_tftf_image(&spi_ops, &is_secure_image)) {
spi_ops.finish(true, is_secure_image);
if (is_secure_image) {
boot_status = INIT_STATUS_TRUSTED_SPI_FLASH_BOOT_FINISHED;
dbgprintx32("SPI Trusted: (",
merge_errno_with_boot_status(boot_status),
")\n");
} else {
boot_status = INIT_STATUS_UNTRUSTED_SPI_FLASH_BOOT_FINISHED;
dbgprintx32("SPI Untrusted: (",
merge_errno_with_boot_status(boot_status),
")\n");
/*
* Disable IMS, CMS access before starting untrusted image.
* NB. JTAG continues to be not enabled at this point
*/
efuse_rig_for_untrusted();
}
/* Log that we're starting the boot-from-SPIROM */
chip_advertise_boot_status(merge_errno_with_boot_status(boot_status));
/* TA-16 jump to SPI code (BOOTRET_o = 0 && SPIBOOT_N = 0) */
jump_to_image();
}
}
spi_ops.finish(false, false);
/* Fallback to UniPro boot */
boot_from_spi = false;
fallback_boot_unipro = true;
chip_clear_image_loading_ram();
} else {
/* (Not boot-from-spi, */
fallback_boot_unipro = false;
}
if (greybus_init()) {
set_last_error(BRE_BOU_GBCTRL_CPORT);
halt_and_catch_fire(boot_status);
}
/* Boot-Over-UniPro...
* We get here if directed to do so by the bootselector, or as a fallback
* for a failed SPIROM boot.
*/
if (!boot_from_spi) {
/* Boot over Unipro */
if (fallback_boot_unipro) {
boot_status = merge_errno_with_boot_status(
INIT_STATUS_FALLLBACK_UNIPRO_BOOT_STARTED);
dbgprintx32("Spi boot failed (", boot_status, "), ");
} else {
boot_status = INIT_STATUS_UNIPRO_BOOT_STARTED;
}
chip_advertise_boot_status(boot_status);
dbgprintx32("Boot over UniPro (",
merge_errno_with_boot_status(boot_status),
")\n");
advertise_ready();
#if RUN_SPI_TEST
spi_gb_init();
dbgprint("Running in loop to perform as SPI over Greybus\n");
while (1) {
if (greybus_loop()) {
dbgprint("ERROR in greuybus loop\n");
halt_and_catch_fire(boot_status);
}
}
#endif
dbgprint("Ready-poked; download-ready\n");
if (greybus_ops.init() != 0) {
halt_and_catch_fire(boot_status);
}
if (!load_tftf_image(&greybus_ops, &is_secure_image)) {
if (greybus_ops.finish(true, is_secure_image) != 0) {
halt_and_catch_fire(boot_status);
}
if (is_secure_image) {
boot_status = fallback_boot_unipro ?
INIT_STATUS_FALLLBACK_TRUSTED_UNIPRO_BOOT_FINISHED :
INIT_STATUS_TRUSTED_UNIPRO_BOOT_FINISHED;
dbgprintx32("UP Trusted: (",
merge_errno_with_boot_status(boot_status),
")\n");
} else {
boot_status = fallback_boot_unipro ?
INIT_STATUS_FALLLBACK_UNTRUSTED_UNIPRO_BOOT_FINISHED :
INIT_STATUS_UNTRUSTED_UNIPRO_BOOT_FINISHED;
dbgprintx32("UP Trusted: (",
merge_errno_with_boot_status(boot_status),
")\n");
/*
* Disable IMS, CMS access before starting
* untrusted image
* NB. JTAG continues to be not enabled at this point
*/
efuse_rig_for_untrusted();
}
/* Log that we're starting the boot-from-UniPro */
chip_advertise_boot_status(boot_status);
/* TA-17 jump to Workram code (BOOTRET_o = 0 && SPIM_BOOT_N = 1) */
jump_to_image();
}
if (greybus_ops.finish(false, is_secure_image) != 0) {
halt_and_catch_fire(boot_status);
}
}
/* If we reach here, we didn't find an image to boot - stop while we're
* ahead...
*/
halt_and_catch_fire(boot_status);
}
