static void hi16xx_uart_flush(struct serial_chip *chip)
{
vaddr_t base = chip_to_base(chip);
while (!(read32(base + UART_USR) & UART_USR_TFE_BIT))
;
}
static bool cdns_uart_have_rx_data(struct serial_chip *chip)
{
vaddr_t base = chip_to_base(chip);
return !(read32(base + CDNS_UART_CHANNEL_STATUS) &
CDNS_UART_CHANNEL_STATUS_REMPTY);
}
static void atmel_uart_flush(struct serial_chip *chip)
{
vaddr_t base = chip_to_base(chip);
while (!(io_read32(base + ATMEL_UART_SR) & ATMEL_SR_TXEMPTY))
;
}
static int cdns_uart_getchar(struct serial_chip *chip)
{
vaddr_t base = chip_to_base(chip);
while (!cdns_uart_have_rx_data(chip))
;
return read32(base + CDNS_UART_FIFO) & 0xff;
}
static void cdns_uart_flush(struct serial_chip *chip)
{
vaddr_t base = chip_to_base(chip);
while (!(read32(base + CDNS_UART_CHANNEL_STATUS) &
CDNS_UART_CHANNEL_STATUS_TEMPTY))
;
}
static int pl011_getchar(struct serial_chip *chip)
{
vaddr_t base = chip_to_base(chip);
while (!pl011_have_rx_data(chip))
;
return io_read32(base + UART_DR) & 0xff;
}
static int hi16xx_uart_getchar(struct serial_chip *chip)
{
vaddr_t base = chip_to_base(chip);
while (!hi16xx_uart_have_rx_data(chip))
;
return read32(base + UART_RBR) & 0xFF;
}
static void atmel_uart_putc(struct serial_chip *chip, int ch)
{
vaddr_t base = chip_to_base(chip);
while (!(io_read32(base + ATMEL_UART_SR) & ATMEL_SR_TXRDY))
;
io_write32(base + ATMEL_UART_THR, ch);
}
static int atmel_uart_getchar(struct serial_chip *chip)
{
vaddr_t base = chip_to_base(chip);
while (io_read32(base + ATMEL_UART_SR) & ATMEL_SR_RXRDY)
;
return io_read32(base + ATMEL_UART_RHR);
}
static void pl011_putc(struct serial_chip *chip, int ch)
{
vaddr_t base = chip_to_base(chip);
/* Wait until there is space in the FIFO or device is disabled */
while (io_read32(base + UART_FR) & UART_FR_TXFF)
;
/* Send the character */
io_write32(base + UART_DR, ch);
}
static void hi16xx_uart_putc(struct serial_chip *chip, int ch)
{
vaddr_t base = chip_to_base(chip);
/* Wait until TX FIFO is empty */
while (!(read32(base + UART_USR) & UART_USR_TFE_BIT))
;
/* Put character into TX FIFO */
write32(ch & 0xFF, base + UART_THR);
}
static void cdns_uart_putc(struct serial_chip *chip, int ch)
{
vaddr_t base = chip_to_base(chip);
/* Wait until there is space in the FIFO */
while (read32(base + CDNS_UART_CHANNEL_STATUS) &
CDNS_UART_CHANNEL_STATUS_TFUL)
;
/* Send the character */
write32(ch, base + CDNS_UART_FIFO);
}
static void pl011_flush(struct serial_chip *chip)
{
vaddr_t base = chip_to_base(chip);
/*
* Wait for the transmit FIFO to be empty.
* It can happen that Linux initializes the OP-TEE driver with the
* console UART disabled; avoid an infinite loop by checking the UART
* enabled flag. Checking it in the loop makes the code safe against
* asynchronous disable.
*/
while ((io_read32(base + UART_CR) & UART_CR_UARTEN) &&
!(io_read32(base + UART_FR) & UART_FR_TXFE))
;
}
static bool pl011_have_rx_data(struct serial_chip *chip)
{
vaddr_t base = chip_to_base(chip);
return !(io_read32(base + UART_FR) & UART_FR_RXFE);
}
static bool hi16xx_uart_have_rx_data(struct serial_chip *chip)
{
vaddr_t base = chip_to_base(chip);
return (read32(base + UART_USR) & UART_USR_RFNE_BIT);
}
