void reset_timer(void) { cmt_timer_stop(0); set_timer(CMT_TIMER_RESET); cmt0_timer = 0; cmt_timer_start(0); }
int timer_init(void) { cmt0_timer = 0; /* Divide clock by 32 */ readw(CMCSR_0); writew(CMT_CMCSR_INIT, CMCSR_0); /* User Device 0 only */ cmt_timer_stop(0); set_timer(CMT_TIMER_RESET); cmt_timer_start(0); return 0; }
static int cmt_timer_init(void) { unsigned long interval; cmt_clock_enable(); setup_irq(CONFIG_SH_TIMER_IRQ, &cmt_irq); cmt0_clk.parent = clk_get(NULL, "module_clk"); cmt_timer_stop(); interval = cmt0_clk.parent->rate / 8 / HZ; printk(KERN_INFO "Interval = %ld\n", interval); ctrl_outw(interval, CMT_CMCOR_0); clk_register(&cmt0_clk); clk_enable(&cmt0_clk); cmt_timer_start(); return 0; }