Exemple #1
0
void select_idle_routine(const struct cpuinfo_x86 *c)
{
#ifdef CONFIG_SMP
	if (boot_option_idle_override == IDLE_POLL && smp_num_siblings > 1)
		pr_warn_once("WARNING: polling idle and HT enabled, performance may degrade\n");
#endif
	if (x86_idle || boot_option_idle_override == IDLE_POLL)
		return;

	if (cpu_has_bug(c, X86_BUG_AMD_APIC_C1E)) {
		/* E400: APIC timer interrupt does not wake up CPU from C1e */
		pr_info("using AMD E400 aware idle routine\n");
		x86_idle = amd_e400_idle;
	} else if (prefer_mwait_c1_over_halt(c)) {
		pr_info("using mwait in idle threads\n");
		x86_idle = mwait_idle;
	} else
		x86_idle = default_idle;
}
Exemple #2
0
static int show_cpuinfo(struct seq_file *m, void *v)
{
    struct cpuinfo_x86 *c = v;
    unsigned int cpu;
    int i;

    cpu = c->cpu_index;
    seq_printf(m, "processor\t: %u\n"
               "vendor_id\t: %s\n"
               "cpu family\t: %d\n"
               "model\t\t: %u\n"
               "model name\t: %s\n",
               cpu,
               c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
               c->x86,
               c->x86_model,
               c->x86_model_id[0] ? c->x86_model_id : "unknown");

    if (c->x86_mask || c->cpuid_level >= 0)
        seq_printf(m, "stepping\t: %d\n", c->x86_mask);
    else
        seq_puts(m, "stepping\t: unknown\n");
    if (c->microcode)
        seq_printf(m, "microcode\t: 0x%x\n", c->microcode);

    if (cpu_has(c, X86_FEATURE_TSC)) {
        unsigned int freq = cpufreq_quick_get(cpu);

        if (!freq)
            freq = cpu_khz;
        seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
                   freq / 1000, (freq % 1000));
    }

    /* Cache size */
    if (c->x86_cache_size >= 0)
        seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);

    show_cpuinfo_core(m, c, cpu);
    show_cpuinfo_misc(m, c);

    seq_puts(m, "flags\t\t:");
    for (i = 0; i < 32*NCAPINTS; i++)
        if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
            seq_printf(m, " %s", x86_cap_flags[i]);

    seq_puts(m, "\nbugs\t\t:");
    for (i = 0; i < 32*NBUGINTS; i++) {
        unsigned int bug_bit = 32*NCAPINTS + i;

        if (cpu_has_bug(c, bug_bit) && x86_bug_flags[i])
            seq_printf(m, " %s", x86_bug_flags[i]);
    }

    seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
               c->loops_per_jiffy/(500000/HZ),
               (c->loops_per_jiffy/(5000/HZ)) % 100);

#ifdef CONFIG_X86_64
    if (c->x86_tlbsize > 0)
        seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
#endif
    seq_printf(m, "clflush size\t: %u\n", c->x86_clflush_size);
    seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
    seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
               c->x86_phys_bits, c->x86_virt_bits);

    seq_puts(m, "power management:");
    for (i = 0; i < 32; i++) {
        if (c->x86_power & (1 << i)) {
            if (i < ARRAY_SIZE(x86_power_flags) &&
                    x86_power_flags[i])
                seq_printf(m, "%s%s",
                           x86_power_flags[i][0] ? " " : "",
                           x86_power_flags[i]);
            else
                seq_printf(m, " [%d]", i);
        }
    }

    seq_puts(m, "\n\n");

    return 0;
}