Exemple #1
0
/* ------------------------------------------------------------------------*//**
 * @FUNCTION		cpu_force
 * @BRIEF		Force cpu detection.
 * @RETURNS		0 on success
 *			OMAPCONF_ERR_ARG
 * @param[in]		forced_cpu: name of the force cpu
 * @DESCRIPTION		Force cpu detection.
 *//*------------------------------------------------------------------------ */
int cpu_force(char *forced_cpu)
{
	if (forced_cpu == NULL) {
		fprintf(stderr,
			"%s(): forced_cpu == NULL!\n", __func__);
		return OMAPCONF_ERR_ARG;
	}

	cpu_init();
	if (strcmp(forced_cpu, "omap5430") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_5430);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES1_0);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "omap5432") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_5432);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES1_0);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "omap4430") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_4430);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES2_2);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "omap4460") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_4460);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES1_1);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "omap4470") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_4470);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES1_0);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else {
		return OMAPCONF_ERR_ARG;
	}

	cpu_forced_set(1);
	return 0;
}
Exemple #2
0
/* ------------------------------------------------------------------------*//**
 * @FUNCTION		cpu_init
 * @BRIEF		init local cpuinfo variables
 * @RETURNS		0 on success
 *			OMAPCONF_ERR_ARG
 * @param[in]		none
 * @DESCRIPTION		init local cpuinfo variables
 *//*------------------------------------------------------------------------ */
void cpu_init(void)
{
	cpu_forced_set(0);
	cpu_set(OMAP_MAX);
	cpu_revision_set(REV_ES_MAX);
	cpu_device_type_set(DEV_TYPE_MAX);
	cpu_silicon_type_set(SILICON_TYPE_MAX);
	cpu_full_name_set();
}
Exemple #3
0
static int identify_sitara(void)
{
	unsigned int dev_id;
	int ret = 0;

	/* Setting cpu revision here since different register must be read */
	if (mem_read(AM335X_DEVICE_ID, &dev_id) != 0) {
		fprintf(stderr,
			"omapconf (%s()): could not read DEVICE_ID "
			"register!\n", __func__);
		return OMAPCONF_ERR_REG_ACCESS;
	}
	switch (dev_id) {
	case AM335X_SI_REV_1_0:
		ret = identify_am335x_features();
		cpu_revision_set(REV_ES1_0);
		break;
	case AM335X_SI_REV_2_0:
		ret = identify_am335x_features();
		cpu_revision_set(REV_ES2_0);
		break;
	case AM335X_SI_REV_2_1:
		ret = identify_am335x_features();
		cpu_revision_set(REV_ES2_1);
		break;
	case AM437X_SI_REV_1_0:
		cpu_set(AM_437X);
		cpu_revision_set(REV_ES1_0);
		break;
	case AM437X_SI_REV_1_1:
		cpu_set(AM_437X);
		cpu_revision_set(REV_ES1_1);
		break;
	case AM437X_SI_REV_1_2:
		cpu_set(AM_437X);
		cpu_revision_set(REV_ES1_2);
		break;
	default:
		fprintf(stderr,
			"omapconf (%s()): Unknown silicon revision!\n",
			__func__);
		return OMAPCONF_ERR_CPU;
	}

	return ret;
}
Exemple #4
0
static int identify_omap(void)
{
	unsigned int id_code;

	if (mem_read(ID_CODE, &id_code) != 0)
		return OMAPCONF_ERR_REG_ACCESS;

	dprintf("%s(): ID_CODE = 0x%08X\n", __func__, id_code);

	switch (id_code) {
	case OMAP5432_ES_2_0_ID_CODE:
		cpu_set(OMAP_5432);
		cpu_revision_set(REV_ES2_0);
		break;

	case OMAP5432_ES_1_0_ID_CODE:
		cpu_set(OMAP_5432);
		cpu_revision_set(REV_ES1_0);
		break;

	case OMAP5430_ES_2_0_ID_CODE:
		cpu_set(OMAP_5430);
		cpu_revision_set(REV_ES2_0);
		break;

	case OMAP5430_ES_1_0_ID_CODE:
	case 0x0000002F: /* Zebu */
		cpu_set(OMAP_5430);
		cpu_revision_set(REV_ES1_0);
		break;

	case OMAP4470_ES_1_0_ID_CODE:
		cpu_set(OMAP_4470);
		cpu_revision_set(REV_ES1_0);
		break;

	case OMAP4460_ES_1_1_ID_CODE:
		cpu_set(OMAP_4460);
		cpu_revision_set(REV_ES1_1);
		break;

	case OMAP4460_ES_1_0_ID_CODE:
		cpu_set(OMAP_4460);
		cpu_revision_set(REV_ES1_0);
		break;

	case OMAP4430_ES_2_3_ID_CODE:
		cpu_set(OMAP_4430);
		cpu_revision_set(REV_ES2_3);
		break;

	case OMAP4430_ES_2_2_ID_CODE:
		cpu_set(OMAP_4430);
		cpu_revision_set(REV_ES2_2);
		break;

	case OMAP4430_ES_2_1_ID_CODE:
		cpu_set(OMAP_4430);
		cpu_revision_set(REV_ES2_1);
		break;

	case OMAP4430_ES_2_0_ID_CODE:
	case OMAP4430_ES_1_0_ID_CODE:
		/*
		 * Due to fusing issue between ES1.0 and ES2.0 (same code...),
		 * revision cannot be correctly detected.
		 * Workaround is to use Cortex-A9 own revision code, which did
		 * changed, but it is not accessible from user space...
		 * Only way is to use /proc/cpuinfo.
		 */
		cpu_set(OMAP_4430);
		cpu_rev_get_from_cpuinfo(&cpu_rev);
		switch (cpu_rev) {
		case REV_ES2_0:
			cpu_revision_set(REV_ES2_0);
			break;
		case REV_ES1_0:
			cpu_revision_set(REV_ES1_0);
			break;
		default:
			dprintf("%s(): unknown ARM Cortex-A9!\n", __func__);
			return OMAPCONF_ERR_UNEXPECTED;
		}
		break;
	default:
		/* Retrieve DRA7 chip & ES in default case */
		if (mem_read(DRA7_ID_CODE, &id_code) != 0)
			return OMAPCONF_ERR_REG_ACCESS;
		dprintf("%s(): ID_CODE = 0x%08X\n", __func__, id_code);

		switch (id_code) {
		case DRA72X_ES_1_0_ID_CODE:
			cpu_set(DRA_72X);
			cpu_revision_set(REV_ES1_0);
			break;
		case DRA74X_ES_1_1_ID_CODE:
			cpu_set(DRA_75X);
			cpu_revision_set(REV_ES1_1);
			break;
		case DRA74X_ES_1_0_ID_CODE:
			cpu_set(DRA_75X);
			cpu_revision_set(REV_ES1_0);
			break;
		case DRA74X_ES_2_0_ID_CODE:
			cpu_set(DRA_75X);
			cpu_revision_set(REV_ES2_0);
			break;
		default:
			dprintf("%s(): OMAP ID CODE not recognized! (0x%08X)\n",
				__func__, id_code);
			return OMAPCONF_ERR_CPU;
		}
	}

	return 0;
}
Exemple #5
0
/* ------------------------------------------------------------------------*//**
 * @FUNCTION		cpu_force
 * @BRIEF		Force cpu detection.
 * @RETURNS		0 on success
 *			OMAPCONF_ERR_ARG
 * @param[in]		forced_cpu: name of the force cpu
 * @DESCRIPTION		Force cpu detection.
 *//*------------------------------------------------------------------------ */
int cpu_force(char *forced_cpu)
{
	if (forced_cpu == NULL) {
		fprintf(stderr,
			"%s(): forced_cpu == NULL!\n", __func__);
		return OMAPCONF_ERR_ARG;
	}

	cpu_init();

	if (strcmp(forced_cpu, "dra72x") == 0) {
		cpu_forced_set(1);
		cpu_set(DRA_72X);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES1_1);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "dra75x") == 0) {
		cpu_forced_set(1);
		cpu_set(DRA_75X);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES1_1);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp (forced_cpu, "am3352") == 0) {
		cpu_forced_set(1);
		cpu_set(AM_3352);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES2_1);
		cpu_package_type_set(ZCZ);
		cpu_full_name_set();
	} else if (strcmp (forced_cpu, "am3354") == 0) {
		cpu_forced_set(1);
		cpu_set(AM_3354);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES2_1);
		cpu_package_type_set(ZCZ);
		cpu_full_name_set();
	} else if (strcmp (forced_cpu, "am3356") == 0) {
		cpu_forced_set(1);
		cpu_set(AM_3356);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES2_1);
		cpu_package_type_set(ZCZ);
		cpu_full_name_set();
	} else if (strcmp (forced_cpu, "am3357") == 0) {
		cpu_forced_set(1);
		cpu_set(AM_3357);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES2_1);
		cpu_package_type_set(ZCZ);
		cpu_full_name_set();
	} else if (strcmp (forced_cpu, "am3358") == 0) {
		cpu_forced_set(1);
		cpu_set(AM_3358);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES2_1);
		cpu_package_type_set(ZCZ);
		cpu_full_name_set();
	} else if (strcmp (forced_cpu, "am3359") == 0) {
		cpu_forced_set(1);
		cpu_set(AM_3359);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES2_1);
		cpu_package_type_set(ZCZ);
		cpu_full_name_set();
	} else if (strcmp (forced_cpu, "am335x") == 0) {
		cpu_forced_set(1);
		cpu_set(AM_335X);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES2_1);
		cpu_package_type_set(ZCZ);
		cpu_full_name_set();
	} else if (strcmp (forced_cpu, "am437x") == 0) {
		cpu_forced_set(1);
		cpu_set(AM_437X);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES1_2);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "omap5430") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_5430);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES2_0);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "omap5430es1") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_5430);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES1_0);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "omap5432") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_5432);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES2_0);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "omap5432es1") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_5432);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES1_0);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "omap4430") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_4430);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES2_2);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "omap4460") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_4460);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES1_1);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else if (strcmp(forced_cpu, "omap4470") == 0) {
		cpu_forced_set(1);
		cpu_set(OMAP_4470);
		cpu_device_type_set(DEV_GP);
		cpu_revision_set(REV_ES1_0);
		cpu_silicon_type_set(STANDARD_PERF_SI);
		cpu_full_name_set();
	} else {
		return OMAPCONF_ERR_ARG;
	}

	cpu_forced_set(1);
	return 0;
}
Exemple #6
0
/* ------------------------------------------------------------------------*//**
 * @FUNCTION		cpu_detect
 * @BRIEF		Detect cpu and set internal global variables accordingly
 * @RETURNS		0 on success
 *			OMAPCONF_ERR_UNEXPECTED
 *			OMAPCONF_ERR_CPU if cpu not recognized
 *			OMAPCONF_ERR_REG_ACCESS
 * @param[in]		none
 * @DESCRIPTION		Detect cpu and set internal global variables accordingly
 *//*------------------------------------------------------------------------ */
int cpu_detect(void)
{
	unsigned int id_code;
	unsigned int status;
	unsigned int prod_id_1;

	#ifdef CPUID_DEBUG
	char s[CPU_FULL_NAME_MAX_LENGTH];
	char rev_s[CPU_REVISION_MAX_NAME_LENGTH];
	char dev_type_s[CPU_DEVICE_TYPE_MAX_NAME_LENGTH];
	#endif

	/* Init variables */
	cpu_init();

	/* Retrieve OMAP chip & ES */
	if (mem_read(ID_CODE, &id_code) != 0)
		return OMAPCONF_ERR_REG_ACCESS;
	dprintf("%s(): ID_CODE = 0x%08X\n", __func__, id_code);

	switch (id_code) {
	case OMAP5432_ES_1_0_ID_CODE:
		cpu_set(OMAP_5432);
		cpu_revision_set(REV_ES1_0);
		break;

	case OMAP5430_ES_1_0_ID_CODE:
	case 0x0000002F: /* Zebu */
		cpu_set(OMAP_5430);
		cpu_revision_set(REV_ES1_0);
		break;

	case OMAP4470_ES_1_0_ID_CODE:
		cpu_set(OMAP_4470);
		cpu_revision_set(REV_ES1_0);
		break;

	case OMAP4460_ES_1_1_ID_CODE:
		cpu_set(OMAP_4460);
		cpu_revision_set(REV_ES1_1);
		break;

	case OMAP4460_ES_1_0_ID_CODE:
		cpu_set(OMAP_4460);
		cpu_revision_set(REV_ES1_0);
		break;

	case OMAP4430_ES_2_3_ID_CODE:
		cpu_set(OMAP_4430);
		cpu_revision_set(REV_ES2_3);
		break;

	case OMAP4430_ES_2_2_ID_CODE:
		cpu_set(OMAP_4430);
		cpu_revision_set(REV_ES2_2);
		break;

	case OMAP4430_ES_2_1_ID_CODE:
		cpu_set(OMAP_4430);
		cpu_revision_set(REV_ES2_1);
		break;

	case OMAP4430_ES_2_0_ID_CODE:
	case OMAP4430_ES_1_0_ID_CODE:
		/*
		 * Due to fusing issue between ES1.0 and ES2.0 (same code...),
		 * revision cannot be correctly detected.
		 * Workaround is to use Cortex-A9 own revision code, which did
		 * changed, but it is not accessible from user space...
		 * Only way is to use /proc/cpuinfo.
		 */
		cpu_set(OMAP_4430);
		cpu_rev_get_from_cpuinfo(&cpu_rev);
		switch (cpu_rev) {
		case REV_ES2_0:
			cpu_revision_set(REV_ES2_0);
			break;
		case REV_ES1_0:
			cpu_revision_set(REV_ES1_0);
			break;
		default:
			dprintf("%s(): unknown ARM Cortex-A9!\n", __func__);
			return OMAPCONF_ERR_UNEXPECTED;
		}
		break;
	default:
		dprintf("%s(): OMAP ID CODE not recognized! (0x%08X)\n",
			__func__, id_code);
		return OMAPCONF_ERR_CPU;
	}
	dprintf("%s(): Chip is %s ES%s\n", __func__,
		cpu_gets(s), cpu_revision_gets(rev_s));


	/* Retrieve device type */
	if (mem_read(OMAP44XX_STATUS, &status) != 0)
		return OMAPCONF_ERR_REG_ACCESS;
	dprintf("%s(): OMAP44XX_STATUS = 0x%08X\n", __func__, status);
	switch (extract_bitfield(status, 8, 2)) {
	case 3:
		cpu_device_type_set(DEV_GP);
		break;
	case 2:
		cpu_device_type_set(DEV_HS);
		break;
	case 1:
		cpu_device_type_set(DEV_EMU);
		break;
	default:
		cpu_device_type_set(DEV_TEST);
	}
	dprintf("%s(): Device Type is %s\n", __func__,
		cpu_device_type_gets(dev_type_s));


	/* Retrieve silicon performance type from EFuse */
	if (mem_read(CONTROL_STD_FUSE_PROD_ID_1, &prod_id_1) != 0) {
		fprintf(stderr,
			"omapconf (%s()): could not read CONTROL_STD_FUSE_PROD_ID_1 register!\n",
			__func__);
		return OMAPCONF_ERR_REG_ACCESS;
	}
	dprintf("%s(): CONTROL_STD_FUSE_PROD_ID_1 = 0x%08X\n",
		__func__, prod_id_1);
	si_type = (silicon_type) extract_bitfield(prod_id_1, 16, 2);
	dprintf("%s(): Silicon performance type is %s (%uMHz)\n",
		__func__, cpu_silicon_type_gets(s),
		cpu_silicon_max_speed_get());


	/* Set CPU full name */
	cpu_full_name_set();
	dprintf("%s(): CPU full name is %s\n", __func__, cpu_full_name);

	return 0;
}