void em2_decode_data() { static const ot_u8 cmd[] = { 0x01, 0xFF }; ot_u16 grab; em2_decode_data_TOP: grab = spirit1_rxbytes(); if (grab != 0) { if (grab > 24) grab = 24; spirit1_spibus_io(2, grab, (ot_u8*)cmd); q_writestring(&rxq, spirit1.busrx, grab); if (em2.state == 0) { ot_int ext_bytes; em2.state--; em2.bytes = 1 + (ot_int)rxq.front[0]; rxq.front[1] &= ~0x20; // always clear this bit em2.lctl = rxq.front[1]; em2.crc5 = em2_check_crc5(); if (em2.crc5 != 0) { return; } ext_bytes = 0; if (em2.lctl & 0x40) { ext_bytes = em2_rs_init_decode(&rxq); } crc_init_stream(False, em2.bytes-ext_bytes, rxq.getcursor); } crc_calc_nstream(grab); ///@todo we can optimize this also by waiting until crc is done, /// and then verifying that it is not accurate. but we need /// better speed profiling before doing that. # if (M2_FEATURE(RSCODE)) if (em2.lctl & 0x40) { em2_rs_decode(grab); } # endif em2.bytes -= grab; if (em2.bytes > 0) { goto em2_decode_data_TOP; } } }
void em2_encode_data() { ot_int fill; ot_int load; ot_u8 save[2]; ot_u8* cmd; // Loop unrolling for FIFO loading load = (rfctl.txlimit - spirit1_txbytes()); while (1) { fill = (load < em2.bytes) ? load : em2.bytes; if (fill <= 0) break; if (fill > 24) fill = 24; load -= fill; em2.bytes -= fill; if (txq.options.ubyte[UPPER] != 0) { crc_calc_nstream(fill); # if (M2_FEATURE(RSCODE)) if (em2.lctl & 0x40) { em2_rs_encode(fill); } # endif } cmd = txq.getcursor; save[0] = *(--cmd); *cmd = 0xff; save[1] = *(--cmd); *cmd = 0x00; txq.getcursor += fill; spirit1_spibus_io(fill+2, 0, cmd); *cmd++ = save[1]; *cmd = save[0]; } /// dummy SPI access to complete fill //spirit1_read(RFREG(IRQ_STATUS0)); *(ot_u16*)save = PLATFORM_ENDIAN16_C(0x8000); spirit1_spibus_io(2, 0, save); }
void crc_calc_stream(crcstream_t* stream) { crc_calc_nstream(stream, 1); }