static void cuda_irq_handler(ipc_callid_t iid, ipc_call_t *call) { uint8_t rbuf[CUDA_RCV_BUF_SIZE]; size_t len; bool handle; handle = false; len = 0; fibril_mutex_lock(&instance->dev_lock); /* Lower IFR.SR_INT so that CUDA can generate next int by raising it. */ pio_write_8(&instance->cuda->ifr, SR_INT); switch (instance->xstate) { case cx_listen: cuda_irq_listen(); break; case cx_receive: cuda_irq_receive(); break; case cx_rcv_end: cuda_irq_rcv_end(rbuf, &len); handle = true; break; case cx_send_start: cuda_irq_send_start(); break; case cx_send: cuda_irq_send(); break; } fibril_mutex_unlock(&instance->dev_lock); /* Handle an incoming packet. */ if (handle) cuda_packet_handle(rbuf, len); }
static void cuda_irq_handler(irq_t *irq) { cuda_instance_t *instance = irq->instance; uint8_t rbuf[CUDA_RCV_BUF_SIZE]; size_t len; bool handle; handle = false; len = 0; spinlock_lock(&instance->dev_lock); /* Lower IFR.SR_INT so that CUDA can generate next int by raising it. */ pio_write_8(&instance->cuda->ifr, SR_INT); switch (instance->xstate) { case cx_listen: cuda_irq_listen(irq); break; case cx_receive: cuda_irq_receive(irq); break; case cx_rcv_end: cuda_irq_rcv_end(irq, rbuf, &len); handle = true; break; case cx_send_start: cuda_irq_send_start(irq); break; case cx_send: cuda_irq_send(irq); break; } spinlock_unlock(&instance->dev_lock); /* Handle an incoming packet. */ if (handle) cuda_packet_handle(instance, rbuf, len); }