void main(void)
{
/* Globally disable MMU, caches, and branch prediction (these should
* be disabled by default on reset) */
dcache_mmu_disable();
/*
* Re-enable icache and branch prediction. MMU and dcache will be
* set up later.
*
* Note: If booting from USB, we need to disable branch prediction
* before copying from USB into RAM (FIXME: why?)
*/
if (boot_cpu()) {
//bootblock_cpu_init();
//bootblock_mainboard_init();
}
#if IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)
console_init();
exception_init();
#endif
run_romstage();
}
void setup_mmu(enum dram_state dram)
{
dcache_mmu_disable();
/* start with mapping everything as strongly ordered. */
mmu_config_range(0, 4096, DCACHE_OFF);
/* Map Device memory. */
mmu_config_range_kb(RPM_START, RPM_SIZE, DCACHE_OFF);
mmu_config_range_kb(SRAM_START, SRAM_END - SRAM_START,
DCACHE_WRITEBACK);
/* Map DRAM memory */
setup_dram_mappings(dram);
mmu_disable_range(DRAM_END, 4096 - DRAM_END);
/* disable Page 0 for trapping NULL pointer references. */
mmu_disable_range_kb(0, 1);
mmu_init();
dcache_mmu_enable();
}
void arm_tf_run_bl31(u64 payload_entry, u64 payload_arg0, u64 payload_spsr)
{
struct prog bl31 = PROG_INIT(ASSET_BL31, CONFIG_CBFS_PREFIX"/bl31");
void (*bl31_entry)(bl31_params_t *params, void *plat_params) = NULL;
if (prog_locate(&bl31))
die("BL31 not found");
if (cbfs_prog_stage_load(&bl31))
die("BL31 load failed");
bl31_entry = prog_entry(&bl31);
SET_PARAM_HEAD(&bl31_params, PARAM_BL31, VERSION_1, 0);
if (IS_ENABLED(CONFIG_ARM64_USE_SECURE_OS)) {
struct prog bl32 = PROG_INIT(ASSET_BL32, CONFIG_CBFS_PREFIX"/secure_os");
if (prog_locate(&bl32))
die("BL31 not found");
if (cbfs_prog_stage_load(&bl32))
die("BL31 load failed");
SET_PARAM_HEAD(&bl32_ep_info, PARAM_EP, VERSION_1, PARAM_EP_SECURE);
bl32_ep_info.pc = (uintptr_t)prog_entry(&bl32);
bl32_ep_info.spsr = SPSR_EXCEPTION_MASK | get_eret_el(EL1, SPSR_USE_L);
bl31_params.bl32_ep_info = &bl32_ep_info;
}
bl31_params.bl33_ep_info = &bl33_ep_info;
SET_PARAM_HEAD(&bl33_ep_info, PARAM_EP, VERSION_1, PARAM_EP_NON_SECURE);
bl33_ep_info.pc = payload_entry;
bl33_ep_info.spsr = payload_spsr;
bl33_ep_info.args.arg0 = payload_arg0;
/* May update bl31_params if necessary. Must flush all added structs. */
void *bl31_plat_params = soc_get_bl31_plat_params(&bl31_params);
dcache_clean_by_mva(&bl31_params, sizeof(bl31_params));
dcache_clean_by_mva(&bl33_ep_info, sizeof(bl33_ep_info));
dcache_mmu_disable();
bl31_entry(&bl31_params, bl31_plat_params);
die("BL31 returned!");
}
/* Prepare ATAGs, flash the cache and start the kernel */
static int start_legacy_kernel(bootm_header_t *bm_hdr_p)
{
int ret;
struct tag *start_tag, *current_tag;
ret = bootm_load_os(bm_hdr_p);
if (ret) {
printf("%s:%d failed to load os (%d)\n",
__func__, __LINE__, ret);
return ret;
}
start_tag = (struct tag *)CONFIG_ATAG_BASE;;
current_tag = setup_start_tag(start_tag);
current_tag = setup_commandline_tag(current_tag, bm_hdr_p->cmdline);
current_tag = setup_memory_tags(current_tag);
setup_end_tag(current_tag);
cache_sync_instructions();
dcache_mmu_disable();
return jump_to_kernel(bm_hdr_p, start_tag);
}
static void mainboard_init(device_t dev)
{
/* disable mmu and d-cache before setting up secure world.*/
dcache_mmu_disable();
start_tzbsp();
/* Setup mmu and d-cache again as non secure entries. */
setup_mmu(DRAM_INITIALIZED);
setup_usb();
if (IS_ENABLED(CONFIG_CHROMEOS)) {
/* Copy WIFI calibration data into CBMEM. */
cbmem_add_vpd_calibration_data();
}
/*
* Make sure bootloader can issue sounds The frequency is calculated
* as "<frame_rate> * <bit_width> * <channels> * 4", i.e.
*
* 48000 * 2 * 16 * 4 = 6144000
*/
//audio_clock_config(6144000);
}
