/**
* Update the UPD data based on values from devicetree.cb
*
* @param UpdData Pointer to the UPD Data structure
*/
static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData)
{
ROMSTAGE_CONST struct device *dev;
ROMSTAGE_CONST config_t *config;
printk(BIOS_DEBUG, "Configure Default UPD Data\n");
dev = dev_find_slot(0, SOC_DEV_FUNC);
config = dev->chip_info;
/* Set up default verb tables - Just HDMI audio */
UpdData->AzaliaConfigPtr = (UINT32)&mAzaliaConfig;
/* Set SPD addresses */
if (config->MrcInitSPDAddr1 == SPD_ADDR_DISABLED)
UpdData->PcdMrcInitSPDAddr1 = 0x00;
else if (config->MrcInitSPDAddr1 != SPD_ADDR_DEFAULT)
UpdData->PcdMrcInitSPDAddr1 = config->MrcInitSPDAddr1;
printk(BIOS_DEBUG, "SPD Addr1:\t\t0x%02x\n", UpdData->PcdMrcInitSPDAddr1);
if (config->MrcInitSPDAddr2 == SPD_ADDR_DISABLED)
UpdData->PcdMrcInitSPDAddr2 = 0x00;
else if (config->MrcInitSPDAddr2 != SPD_ADDR_DEFAULT)
UpdData->PcdMrcInitSPDAddr2 = config->MrcInitSPDAddr2;
printk(BIOS_DEBUG, "SPD Addr2:\t\t0x%02x\n", UpdData->PcdMrcInitSPDAddr2);
if (config->SataMode != SATA_MODE_DEFAULT)
UpdData->PcdSataMode = config->SataMode - SATA_MODE_IDE;
if ((config->eMMCBootMode != EMMC_USE_DEFAULT) ||
(config->eMMCBootMode != EMMC_FOLLOWS_DEVICETREE))
UpdData->PcdeMMCBootMode = config->eMMCBootMode;
if (config->LpssSioEnablePciMode != LPSS_PCI_MODE_DEFAULT)
UpdData->PcdLpssSioEnablePciMode = config->LpssSioEnablePciMode -
LPSS_PCI_MODE_DISABLE;
if (config->MrcInitTsegSize != TSEG_SIZE_DEFAULT)
UpdData->PcdMrcInitTsegSize = config->MrcInitTsegSize;
printk(BIOS_DEBUG, "Tseg Size:\t\t%d MB\n", UpdData->PcdMrcInitTsegSize);
if (config->MrcInitMmioSize != MMIO_SIZE_DEFAULT)
UpdData->PcdMrcInitMmioSize = config->MrcInitMmioSize;
printk(BIOS_DEBUG, "MMIO Size:\t\t%d MB\n", UpdData->PcdMrcInitMmioSize);
if (config->IgdDvmt50PreAlloc != IGD_MEMSIZE_DEFAULT)
UpdData->PcdIgdDvmt50PreAlloc = config->IgdDvmt50PreAlloc;
printk(BIOS_DEBUG, "IGD Memory Size:\t%d MB\n",
UpdData->PcdIgdDvmt50PreAlloc * IGD_MEMSIZE_MULTIPLIER);
if (config->ApertureSize != APERTURE_SIZE_DEFAULT)
UpdData->PcdApertureSize = config->ApertureSize;
printk(BIOS_DEBUG, "Aperture Size:\t\t%d MB\n",
APERTURE_SIZE_BASE << UpdData->PcdApertureSize);
if (config->GttSize != GTT_SIZE_DEFAULT)
UpdData->PcdGttSize = config->GttSize;
printk(BIOS_DEBUG, "GTT Size:\t\t%d MB\n", UpdData->PcdGttSize);
/* Advance dev to PCI device 0.0 */
for (dev = &dev_root; dev; dev = dev_find_next_pci_device(dev)) {
if (dev->path.type != DEVICE_PATH_PCI)
continue;
if (dev->path.pci.devfn == PCI_DEVFN(0x0,0))
break;
}
/*
* Loop through all the SOC devices in the devicetree
* enabling and disabling them as requested.
*/
for (; dev; dev = dev->sibling) {
if (dev->path.type != DEVICE_PATH_PCI)
continue;
switch (dev->path.pci.devfn) {
case MIPI_DEV_FUNC: /* Camera / Image Signal Processing */
UpdData->ISPEnable = dev->enabled;
printk(BIOS_DEBUG, "MIPI/ISP:\t\t%s\n",
UpdData->PcdEnableSdio?"Enabled":"Disabled");
break;
case EMMC_DEV_FUNC: /* EMMC 4.1*/
if ((dev->enabled) &&
(config->eMMCBootMode == EMMC_FOLLOWS_DEVICETREE))
UpdData->PcdeMMCBootMode = EMMC_4_1 - EMMC_DISABLED;
break;
case SDIO_DEV_FUNC:
UpdData->PcdEnableSdio = dev->enabled;
printk(BIOS_DEBUG, "Sdio:\t\t\t%s\n",
UpdData->PcdEnableSdio?"Enabled":"Disabled");
break;
case SD_DEV_FUNC:
UpdData->PcdEnableSdcard = dev->enabled;
printk(BIOS_DEBUG, "Sdcard:\t\t\t%s\n",
UpdData->PcdEnableSdcard?"Enabled":"Disabled");
break;
case SATA_DEV_FUNC:
UpdData->PcdEnableSata = dev->enabled;
printk(BIOS_DEBUG, "Sata:\t\t\t%s\n",
UpdData->PcdEnableSata?"Enabled":"Disabled");
if (UpdData->PcdEnableSata)
printk(BIOS_DEBUG, "SATA Mode:\t\t%s\n",
UpdData->PcdSataMode?"AHCI":"IDE");
break;
case XHCI_DEV_FUNC:
UpdData->PcdEnableXhci = dev->enabled;
break;
case LPE_DEV_FUNC:
if (dev->enabled && config->LpeAcpiModeEnable ==
LPE_ACPI_MODE_ENABLED)
UpdData->PcdEnableLpe = LPE_ACPI_MODE_ENABLED;
else
UpdData->PcdEnableLpe = dev->enabled;
printk(BIOS_DEBUG, "Lpe:\t\t\t%s\n",
UpdData->PcdEnableLpe?"Enabled":"Disabled");
printk(BIOS_DEBUG, "Lpe mode:\t\t%s\n",
UpdData->PcdEnableLpe == LPE_ACPI_MODE_ENABLED?
"ACPI":"PCI");
break;
case MMC45_DEV_FUNC: /* MMC 4.5*/
if ((dev->enabled) &&
(config->eMMCBootMode == EMMC_FOLLOWS_DEVICETREE))
UpdData->PcdeMMCBootMode = EMMC_4_5 - EMMC_DISABLED;
break;
case SIO_DMA1_DEV_FUNC:
UpdData->PcdEnableDma0 = dev->enabled;
printk(BIOS_DEBUG, "SIO Dma 0:\t\t%s\n",
UpdData->PcdEnableDma0?"Enabled":"Disabled");
break;
case I2C1_DEV_FUNC:
UpdData->PcdEnableI2C0 = dev->enabled;
printk(BIOS_DEBUG, "SIO I2C0:\t\t%s\n",
UpdData->PcdEnableI2C0?"Enabled":"Disabled");
break;
case I2C2_DEV_FUNC:
UpdData->PcdEnableI2C1 = dev->enabled;
printk(BIOS_DEBUG, "SIO I2C1:\t\t%s\n",
UpdData->PcdEnableI2C1?"Enabled":"Disabled");
break;
case I2C3_DEV_FUNC:
UpdData->PcdEnableI2C2 = dev->enabled;
printk(BIOS_DEBUG, "SIO I2C2:\t\t%s\n",
UpdData->PcdEnableI2C2?"Enabled":"Disabled");
break;
case I2C4_DEV_FUNC:
UpdData->PcdEnableI2C3 = dev->enabled;
printk(BIOS_DEBUG, "SIO I2C3:\t\t%s\n",
UpdData->PcdEnableI2C3?"Enabled":"Disabled");
break;
case I2C5_DEV_FUNC:
UpdData->PcdEnableI2C4 = dev->enabled;
printk(BIOS_DEBUG, "SIO I2C4:\t\t%s\n",
UpdData->PcdEnableI2C4?"Enabled":"Disabled");
break;
case I2C6_DEV_FUNC:
UpdData->PcdEnableI2C5 = dev->enabled;
printk(BIOS_DEBUG, "SIO I2C5:\t\t%s\n",
UpdData->PcdEnableI2C5?"Enabled":"Disabled");
break;
case I2C7_DEV_FUNC:
UpdData->PcdEnableI2C6 = dev->enabled;
printk(BIOS_DEBUG, "SIO I2C6:\t\t%s\n",
UpdData->PcdEnableI2C6?"Enabled":"Disabled");
break;
case TXE_DEV_FUNC: /* TXE */
break;
case HDA_DEV_FUNC:
if (config->AzaliaAutoEnable) {
UpdData->PcdEnableAzalia = 2;
printk(BIOS_DEBUG, "Azalia:\t\t\tAuto\n");
} else {
UpdData->PcdEnableAzalia = dev->enabled;
printk(BIOS_DEBUG, "Azalia:\t\t\t%s\n",
UpdData->PcdEnableAzalia?"Enabled":"Disabled");
}
break;
case PCIE_PORT1_DEV_FUNC:
case PCIE_PORT2_DEV_FUNC:
case PCIE_PORT3_DEV_FUNC:
case PCIE_PORT4_DEV_FUNC:
break;
case EHCI_DEV_FUNC:
UpdData->PcdEnableXhci = !(dev->enabled);
break;
case SIO_DMA2_DEV_FUNC:
UpdData->PcdEnableDma1 = dev->enabled;
printk(BIOS_DEBUG, "SIO Dma1:\t\t%s\n",
UpdData->PcdEnableDma1?"Enabled":"Disabled");
break;
case PWM1_DEV_FUNC:
UpdData->PcdEnablePwm0 = dev->enabled;
printk(BIOS_DEBUG, "Pwm0\t\t\t%s\n",
UpdData->PcdEnablePwm0?"Enabled":"Disabled");
break;
case PWM2_DEV_FUNC:
UpdData->PcdEnablePwm1 = dev->enabled;
printk(BIOS_DEBUG, "Pwm1:\t\t\t%s\n",
UpdData->PcdEnablePwm1?"Enabled":"Disabled");
break;
case HSUART1_DEV_FUNC:
UpdData->PcdEnableHsuart0 = dev->enabled;
printk(BIOS_DEBUG, "Hsuart0:\t\t%s\n",
UpdData->PcdEnableHsuart0?"Enabled":"Disabled");
break;
case HSUART2_DEV_FUNC:
UpdData->PcdEnableHsuart1 = dev->enabled;
printk(BIOS_DEBUG, "Hsuart1:\t\t%s\n",
UpdData->PcdEnableHsuart1?"Enabled":"Disabled");
break;
case SPI_DEV_FUNC:
UpdData->PcdEnableSpi = dev->enabled;
printk(BIOS_DEBUG, "Spi:\t\t\t%s\n",
UpdData->PcdEnableSpi?"Enabled":"Disabled");
break;
case LPC_DEV_FUNC: /* LPC */
break;
case SMBUS_DEV_FUNC:
break;
}
}
if(UpdData->PcdeMMCBootMode == EMMC_AUTO - EMMC_DISABLED) {
printk(BIOS_DEBUG, "eMMC Mode:\t\tAuto");
} else {
printk(BIOS_DEBUG, "eMMC 4.1:\t\t%s\n",
UpdData->PcdeMMCBootMode == EMMC_4_1 - EMMC_DISABLED?
"Enabled":"Disabled");
printk(BIOS_DEBUG, "eMMC 4.5:\t\t%s\n",
UpdData->PcdeMMCBootMode == EMMC_4_5 - EMMC_DISABLED?
"Enabled":"Disabled");
}
printk(BIOS_DEBUG, "Xhci:\t\t\t%s\n",
UpdData->PcdEnableXhci?"Enabled":"Disabled");
}
/**
* Update the UPD data based on values from devicetree.cb
*
* @param UpdData Pointer to the UPD Data structure
*/
static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *UpdData)
{
ROMSTAGE_CONST struct device *dev;
ROMSTAGE_CONST config_t *config;
printk(FSP_INFO_LEVEL, "Configure Default UPD Data\n");
dev = dev_find_slot(0, SOC_DEV_FUNC);
config = dev->chip_info;
/* Set up default verb tables - Just HDMI audio */
UpdData->AzaliaConfigPtr = (UINT32)&mAzaliaConfig;
/* Set SPD addresses */
UPD_SPD_CHECK(PcdMrcInitSPDAddr1);
UPD_SPD_CHECK(PcdMrcInitSPDAddr2);
UPD_DEFAULT_CHECK(PcdSataMode);
UPD_DEFAULT_CHECK(PcdLpssSioEnablePciMode);
UPD_DEFAULT_CHECK(PcdMrcInitMmioSize);
UPD_DEFAULT_CHECK(PcdIgdDvmt50PreAlloc);
UPD_DEFAULT_CHECK(PcdApertureSize);
UPD_DEFAULT_CHECK(PcdGttSize);
UPD_DEFAULT_CHECK(SerialDebugPortAddress);
UPD_DEFAULT_CHECK(SerialDebugPortType);
UPD_DEFAULT_CHECK(PcdMrcDebugMsg);
UPD_DEFAULT_CHECK(PcdSccEnablePciMode);
UPD_DEFAULT_CHECK(IgdRenderStandby);
UPD_DEFAULT_CHECK(TxeUmaEnable);
UPD_DEFAULT_CHECK(PcdOsSelection);
UPD_DEFAULT_CHECK(PcdEMMC45DDR50Enabled);
UPD_DEFAULT_CHECK(PcdEMMC45HS200Enabled);
UPD_DEFAULT_CHECK(PcdEMMC45RetuneTimerValue);
UPD_DEFAULT_CHECK(PcdEnableIgd);
if ((config->PcdeMMCBootMode != EMMC_USE_DEFAULT) ||
(config->PcdeMMCBootMode != EMMC_FOLLOWS_DEVICETREE))
UpdData->PcdeMMCBootMode = config->PcdeMMCBootMode;
UpdData->PcdMrcInitTsegSize = smm_region_size() >> 20;
printk(FSP_INFO_LEVEL, "GTT Size:\t\t%d MB\n", UpdData->PcdGttSize);
printk(FSP_INFO_LEVEL, "Tseg Size:\t\t%d MB\n", UpdData->PcdMrcInitTsegSize);
printk(FSP_INFO_LEVEL, "Aperture Size:\t\t%d MB\n",
APERTURE_SIZE_BASE << UpdData->PcdApertureSize);
printk(FSP_INFO_LEVEL, "IGD Memory Size:\t%d MB\n",
UpdData->PcdIgdDvmt50PreAlloc * IGD_MEMSIZE_MULTIPLIER);
printk(FSP_INFO_LEVEL, "MMIO Size:\t\t%d MB\n", UpdData->PcdMrcInitMmioSize);
/* Advance dev to PCI device 0.0 */
for (dev = &dev_root; dev; dev = dev_find_next_pci_device(dev)){
if (dev->path.type != DEVICE_PATH_PCI)
continue;
if (dev->path.pci.devfn == PCI_DEVFN(0x0,0))
break;
}
/*
* Loop through all the SOC devices in the devicetree
* enabling and disabling them as requested.
*/
for (; dev; dev = dev->sibling) {
if (dev->path.type != DEVICE_PATH_PCI)
continue;
switch (dev->path.pci.devfn) {
UPD_DEVICE_CHECK(SDIO_DEV_FUNC, PcdEnableSdio, "Sdio:\t\t\t");
UPD_DEVICE_CHECK(SD_DEV_FUNC, PcdEnableSdcard, "Sdcard:\t\t\t");
UPD_DEVICE_CHECK(SIO_DMA1_DEV_FUNC, PcdEnableDma0, "SIO Dma 0:\t\t");
UPD_DEVICE_CHECK(I2C1_DEV_FUNC, PcdEnableI2C0, "SIO I2C0:\t\t");
UPD_DEVICE_CHECK(I2C2_DEV_FUNC, PcdEnableI2C1, "SIO I2C1:\t\t");
UPD_DEVICE_CHECK(I2C3_DEV_FUNC, PcdEnableI2C2, "SIO I2C2:\t\t");
UPD_DEVICE_CHECK(I2C4_DEV_FUNC, PcdEnableI2C3, "SIO I2C3:\t\t");
UPD_DEVICE_CHECK(I2C5_DEV_FUNC, PcdEnableI2C4, "SIO I2C4:\t\t");
UPD_DEVICE_CHECK(I2C6_DEV_FUNC, PcdEnableI2C5, "SIO I2C5:\t\t");
UPD_DEVICE_CHECK(I2C7_DEV_FUNC, PcdEnableI2C6, "SIO I2C6:\t\t");
UPD_DEVICE_CHECK(SIO_DMA2_DEV_FUNC, PcdEnableDma1, "SIO Dma1:\t\t");
UPD_DEVICE_CHECK(PWM1_DEV_FUNC, PcdEnablePwm0, "Pwm0:\t\t\t");
UPD_DEVICE_CHECK(PWM2_DEV_FUNC, PcdEnablePwm1, "Pwm1:\t\t\t");
UPD_DEVICE_CHECK(HSUART1_DEV_FUNC, PcdEnableHsuart0, "Hsuart0:\t\t");
UPD_DEVICE_CHECK(HSUART2_DEV_FUNC, PcdEnableHsuart1, "Hsuart1:\t\t");
UPD_DEVICE_CHECK(SPI_DEV_FUNC, PcdEnableSpi, "Spi:\t\t\t");
UPD_DEVICE_CHECK(SATA_DEV_FUNC, PcdEnableSata, "SATA:\t\t\t");
UPD_DEVICE_CHECK(HDA_DEV_FUNC, PcdEnableAzalia, "Azalia:\t\t\t");
case MIPI_DEV_FUNC: /* Camera / Image Signal Processing */
if (FspInfo->ImageRevision >= FSP_GOLD3_REV_ID) {
UpdData->ISPEnable = dev->enabled;
} else {
/* Gold2 and earlier FSP: ISPEnable is the filed */
/* next to PcdGttSize in UPD_DATA_REGION struct */
*(&(UpdData->PcdGttSize)+sizeof(UINT8)) = dev->enabled;
printk (FSP_INFO_LEVEL,
"Baytrail Gold2 or earlier FSP, adjust ISPEnable offset.\n");
}
printk(FSP_INFO_LEVEL, "MIPI/ISP:\t\t%s\n",
UpdData->PcdEnableSdio?"Enabled":"Disabled");
break;
case EMMC_DEV_FUNC: /* EMMC 4.1*/
if ((dev->enabled) &&
(config->PcdeMMCBootMode == EMMC_FOLLOWS_DEVICETREE))
UpdData->PcdeMMCBootMode = EMMC_4_1 - EMMC_DISABLED;
break;
case MMC45_DEV_FUNC: /* MMC 4.5*/
if ((dev->enabled) &&
(config->PcdeMMCBootMode == EMMC_FOLLOWS_DEVICETREE))
UpdData->PcdeMMCBootMode = EMMC_4_5 - EMMC_DISABLED;
break;
case XHCI_DEV_FUNC:
UpdData->PcdEnableXhci = dev->enabled;
break;
case EHCI_DEV_FUNC:
UpdData->PcdEnableXhci = !(dev->enabled);
break;
case LPE_DEV_FUNC:
if (dev->enabled)
UpdData->PcdEnableLpe = config->LpeAcpiModeEnable;
else
UpdData->PcdEnableLpe = 0;
break;
}
}
if (UpdData->PcdEnableLpe < sizeof(acpi_pci_mode_strings) / sizeof (char *))
printk(FSP_INFO_LEVEL, "Lpe:\t\t\t%s\n",
acpi_pci_mode_strings[UpdData->PcdEnableLpe]);
if (UpdData->PcdeMMCBootMode < sizeof(emmc_mode_strings) / sizeof (char *))
printk(FSP_INFO_LEVEL, "eMMC Mode:\t\t%s",
emmc_mode_strings[UpdData->PcdeMMCBootMode]);
if (UpdData->PcdEnableSata)
printk(FSP_INFO_LEVEL, "SATA Mode:\t\t%s\n",
UpdData->PcdSataMode?"AHCI":"IDE");
printk(FSP_INFO_LEVEL, "Xhci:\t\t\t%s\n",
UpdData->PcdEnableXhci?"Enabled":"Disabled");
/*
* set memory down parameters
* Skip setting values if memory down is disabled
* Skip setting values if FSP is earlier than gold 3
*/
if (FspInfo->ImageRevision >= FSP_GOLD3_REV_ID) {
UPD_MEMDOWN_CHECK(EnableMemoryDown, DECREMENT_FOR_DEFAULT);
if (UpdData->PcdMemoryParameters.EnableMemoryDown) {
UPD_MEMDOWN_CHECK(DRAMSpeed, DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DRAMType, DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMM0Enable, DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMM1Enable, DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMMDWidth, DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMMDensity, DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMMBusWidth, DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMMSides, DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMMtCL, NO_DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMMtRPtRCD, NO_DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMMtWR, NO_DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMMtWTR, NO_DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMMtRRD, NO_DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMMtRTP, NO_DECREMENT_FOR_DEFAULT);
UPD_MEMDOWN_CHECK(DIMMtFAW, NO_DECREMENT_FOR_DEFAULT);
printk (FSP_INFO_LEVEL,
"Memory Down Data Existed : %s\n"\
"- Speed (0: 800, 1: 1066, 2: 1333, 3: 1600): %d\n"\
"- Type (0: DDR3, 1: DDR3L) : %d\n"\
"- DIMM0 : %s\n"\
"- DIMM1 : %s\n"\
"- Width : x%d\n"\
"- Density : %dGbit\n"
"- BudWidth : %dbit\n"\
"- Rank # : %d\n"\
"- tCL : %02X\n"\
"- tRPtRCD : %02X\n"\
"- tWR : %02X\n"\
"- tWTR : %02X\n"\
"- tRRD : %02X\n"\
"- tRTP : %02X\n"\
"- tFAW : %02X\n"
, (UpdData->PcdMemoryParameters.EnableMemoryDown) ? "Enabled" : "Disabled"
, UpdData->PcdMemoryParameters.DRAMSpeed
, UpdData->PcdMemoryParameters.DRAMType
, (UpdData->PcdMemoryParameters.DIMM0Enable) ? "Enabled" : "Disabled"
, (UpdData->PcdMemoryParameters.DIMM1Enable) ? "Enabled" : "Disabled"
, 8 << (UpdData->PcdMemoryParameters.DIMMDWidth)
, 1 << (UpdData->PcdMemoryParameters.DIMMDensity)
, 8 << (UpdData->PcdMemoryParameters.DIMMBusWidth)
, (UpdData->PcdMemoryParameters.DIMMSides) + 1
, UpdData->PcdMemoryParameters.DIMMtCL
, UpdData->PcdMemoryParameters.DIMMtRPtRCD
, UpdData->PcdMemoryParameters.DIMMtWR
, UpdData->PcdMemoryParameters.DIMMtWTR
, UpdData->PcdMemoryParameters.DIMMtRRD
, UpdData->PcdMemoryParameters.DIMMtRTP
, UpdData->PcdMemoryParameters.DIMMtFAW
);
}
}
}
