/****************************************************************************** ** Function name: init_timer16PWM ** ** Descriptions: Initialize timer as PWM ** ** parameters: timer number, period and match enable: ** match_enable[0] = PWM for MAT0 ** match_enable[1] = PWM for MAT1 ** match_enable[2] = PWM for MAT2 ** ** Returned value: None ** ******************************************************************************/ void init_timer16PWM(uint8_t timer_num, uint32_t period, uint8_t match_enable, uint8_t cap_enabled) { // NVIC_InitTypeDef NVIC_InitStructure; disable_timer16(timer_num); if (timer_num == 1) { /* Some of the I/O pins need to be clearfully planned if you use below module because JTAG and TIMER CAP/MAT pins are muxed. */ LPC_SYSCON->SYSAHBCLKCTRL |= (1<<8); /* Setup the external match register */ LPC_TMR16B1->EMR = (1<<EMC3)|(1<<EMC2)|(1<<EMC1)|(2<<EMC0)|(1<<3)|(match_enable); /* Setup the outputs */ /* If match0 is enabled, set the output */ if (match_enable & 0x01) { LPC_IOCON->PIO1_9 &= ~0x07; LPC_IOCON->PIO1_9 |= 0x01; /* Timer1_16 MAT0 */ } /* If match1 is enabled, set the output */ if (match_enable & 0x02) { LPC_IOCON->PIO1_10 &= ~0x07; LPC_IOCON->PIO1_10 |= 0x02; /* Timer1_16 MAT1 */ } /* Enable the selected PWMs and enable Match3 */ LPC_TMR16B1->PWMC = (1<<3)|(match_enable); /* Setup the match registers */ /* set the period value to a global variable */ timer16_1_period = period; LPC_TMR16B1->MR3 = timer16_1_period; LPC_TMR16B1->MR0 = timer16_1_period/2; LPC_TMR16B1->MR1 = timer16_1_period/2; LPC_TMR16B1->MR2 = timer16_1_period/2; /* Set match control register */ LPC_TMR16B1->MCR = 1<<10;// | 1<<9; /* Reset on MR3 */ if (cap_enabled) { LPC_IOCON->PIO1_8 &= ~0x07; /* Timer1_16 I/O config */ LPC_IOCON->PIO1_8 |= 0x01 | (2<<3); /* Timer1_16 CAP0 */ LPC_GPIO1->DIR &= ~(1<<8); LPC_TMR16B1->IR = 0xF; /* clear interrupt flag */ /* Set the capture control register */ LPC_TMR16B1->CCR = 7; } /* Enable the TIMER1 Interrupt */ NVIC_EnableIRQ(TIMER_16_1_IRQn); } else { /* Some of the I/O pins need to be clearfully planned if you use below module because JTAG and TIMER CAP/MAT pins are muxed. */ LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7); /* Setup the external match register */ LPC_TMR16B0->EMR = (1<<EMC3)|(1<<EMC2)|(1<<EMC1)|(1<<EMC0)|(1<<3)|(match_enable); /* Setup the outputs */ /* If match0 is enabled, set the output */ if (match_enable & 0x01) { LPC_IOCON->PIO0_8 &= ~0x07; LPC_IOCON->PIO0_8 |= 0x02; /* Timer0_16 MAT0 */ } /* If match1 is enabled, set the output */ if (match_enable & 0x02) { LPC_IOCON->PIO0_9 &= ~0x07; LPC_IOCON->PIO0_9 |= 0x02; /* Timer0_16 MAT1 */ } /* If match2 is enabled, set the output */ if (match_enable & 0x04) { LPC_IOCON->SWCLK_PIO0_10 &= ~0x07; LPC_IOCON->SWCLK_PIO0_10 |= 0x03; /* Timer0_16 MAT2 */ } // PIO0_2 &= ~0x07; /* Timer0_16 I/O config */ // PIO0_2 |= 0x02; /* Timer0_16 CAP0 */ /* Enable the selected PWMs and enable Match3 */ LPC_TMR16B0->PWMC = (1<<3)|(match_enable); /* Setup the match registers */ /* set the period value to a global variable */ timer16_0_period = period; LPC_TMR16B0->MR3 = timer16_0_period; LPC_TMR16B0->MR0 = timer16_0_period/2; LPC_TMR16B0->MR1 = timer16_0_period/2; LPC_TMR16B0->MR2 = timer16_0_period/2; /* Set the match control register */ LPC_TMR16B0->MCR = 1<<10; /* Reset on MR3 */ /* Enable the TIMER1 Interrupt */ NVIC_EnableIRQ(TIMER_16_0_IRQn); } }
/****************************************************************************** ** Function name: init_timer16PWM ** ** Descriptions: Initialize timer as PWM ** ** parameters: timer number, period and match enable: ** match_enable[0] = PWM for MAT0 ** match_enable[1] = PWM for MAT1 ** match_enable[2] = PWM for MAT2 ** ** Returned value: None ** ******************************************************************************/ void init_timer16PWM(uint8_t timer_num, uint32_t period, uint8_t match_enable, uint8_t cap_enabled) { disable_timer16(timer_num); if (timer_num == 1) { /* Some of the I/O pins need to be clearfully planned if you use below module because JTAG and TIMER CAP/MAT pins are muxed. */ LPC_SYSCON->SYSAHBCLKCTRL |= (1<<8); /* Setup the external match register */ LPC_CT16B1->EMR = (1<<EMC3)|(1<<EMC2)|(1<<EMC1)|(2<<EMC0)|(1<<3)|(match_enable); /* Setup the outputs */ /* If match0 is enabled, set the output */ set_timer16_match(timer_num, match_enable, 0 ); /* Enable the selected PWMs and enable Match3 */ LPC_CT16B1->PWMC = (1<<3)|(match_enable); /* Setup the match registers */ /* set the period value to a global variable */ timer16_1_period = period; LPC_CT16B1->MR3 = timer16_1_period; LPC_CT16B1->MR0 = timer16_1_period/2; LPC_CT16B1->MR1 = timer16_1_period/2; LPC_CT16B1->MR2 = timer16_1_period/2; /* Set match control register */ LPC_CT16B1->MCR = 1<<10;// | 1<<9; /* Reset on MR3 */ if (cap_enabled) { /* Use location 0 for test. */ set_timer16_capture( timer_num, 0 ); LPC_CT16B1->IR = 0xF; /* clear interrupt flag */ /* Set the capture control register */ LPC_CT16B1->CCR = 7; } /* Enable the TIMER1 Interrupt */ NVIC_EnableIRQ(CT16B1_IRQn); } else { LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7); /* Setup the external match register */ LPC_CT16B0->EMR = (1<<EMC3)|(1<<EMC2)|(1<<EMC1)|(1<<EMC0)|(1<<3)|(match_enable); /* Setup the outputs */ /* If match0 is enabled, set the output */ set_timer16_match(timer_num, match_enable, 0 ); /* Enable the selected PWMs and enable Match3 */ LPC_CT16B0->PWMC = (1<<3)|(match_enable); /* Setup the match registers */ /* set the period value to a global variable */ timer16_0_period = period; LPC_CT16B0->MR3 = timer16_0_period; LPC_CT16B0->MR0 = timer16_0_period/2; LPC_CT16B0->MR1 = timer16_0_period/2; LPC_CT16B0->MR2 = timer16_0_period/2; /* Set the match control register */ LPC_CT16B0->MCR = 1<<10; /* Reset on MR3 */ /* Enable the TIMER1 Interrupt */ NVIC_EnableIRQ(CT16B0_IRQn); } }