static void ShutDownDMAChannels(void){
/* Stop all DMA-related activities */
ILINKRegisterBase->dmaCtrlSR0=ILINKRegisterBase->dmaCtrlSR1=0;
/* Stop all DMA-related activities */
iLinkDMACRegs[0].chcr=iLinkDMACRegs[1].chcr=iLinkDMACRegs[2].chcr=0;
/* Disable all DMAC channels connected to the i.Link hardware.
(Disable DMA channels 13, 14 and 15) */
dmac_disable(IOP_DMAC_FDMA0);
dmac_disable(IOP_DMAC_FDMA1);
dmac_disable(IOP_DMAC_FDMA2);
}
void shutdown(void)
{
int state;
#ifndef XSIO2MAN
log_flush(1);
#endif
CpuSuspendIntr(&state);
DisableIntr(IOP_IRQ_SIO2, 0);
ReleaseIntrHandler(IOP_IRQ_SIO2);
CpuResumeIntr(state);
dmac_disable(IOP_DMAC_SIO2in);
dmac_disable(IOP_DMAC_SIO2out);
}
int _stop ( void ) {
int lState;
CpuSuspendIntr ( &lState );
DisableIntr ( IOP_IRQ_SIO2, 0 );
ReleaseIntrHandler ( IOP_IRQ_SIO2 );
CpuResumeIntr ( lState );
dmac_disable ( IOP_DMAC_SIO2in );
dmac_disable ( IOP_DMAC_SIO2out );
return GetThreadId ();
} /* end _stop */
//------------------------------------------------------------------------------
void spiBegin(uint8_t csPin) {
pinMode(csPin,OUTPUT);
digitalWrite(csPin,HIGH);
PIO_Configure(
g_APinDescription[PIN_SPI_MOSI].pPort,
g_APinDescription[PIN_SPI_MOSI].ulPinType,
g_APinDescription[PIN_SPI_MOSI].ulPin,
g_APinDescription[PIN_SPI_MOSI].ulPinConfiguration);
PIO_Configure(
g_APinDescription[PIN_SPI_MISO].pPort,
g_APinDescription[PIN_SPI_MISO].ulPinType,
g_APinDescription[PIN_SPI_MISO].ulPin,
g_APinDescription[PIN_SPI_MISO].ulPinConfiguration);
PIO_Configure(
g_APinDescription[PIN_SPI_SCK].pPort,
g_APinDescription[PIN_SPI_SCK].ulPinType,
g_APinDescription[PIN_SPI_SCK].ulPin,
g_APinDescription[PIN_SPI_SCK].ulPinConfiguration);
pmc_enable_periph_clk(ID_SPI0);
#if USE_SAM3X_DMAC
pmc_enable_periph_clk(ID_DMAC);
dmac_disable();
DMAC->DMAC_GCFG = DMAC_GCFG_ARB_CFG_FIXED;
dmac_enable();
#if USE_SAM3X_BUS_MATRIX_FIX
MATRIX->MATRIX_WPMR = 0x4d415400;
MATRIX->MATRIX_MCFG[1] = 1;
MATRIX->MATRIX_MCFG[2] = 1;
MATRIX->MATRIX_SCFG[0] = 0x01000010;
MATRIX->MATRIX_SCFG[1] = 0x01000010;
MATRIX->MATRIX_SCFG[7] = 0x01000010;
#endif // USE_SAM3X_BUS_MATRIX_FIX
#endif // USE_SAM3X_DMAC
}
//------------------------------------------------------------------------------
void SdSpi::begin() {
PIO_Configure(
g_APinDescription[PIN_SPI_MOSI].pPort,
g_APinDescription[PIN_SPI_MOSI].ulPinType,
g_APinDescription[PIN_SPI_MOSI].ulPin,
g_APinDescription[PIN_SPI_MOSI].ulPinConfiguration);
PIO_Configure(
g_APinDescription[PIN_SPI_MISO].pPort,
g_APinDescription[PIN_SPI_MISO].ulPinType,
g_APinDescription[PIN_SPI_MISO].ulPin,
g_APinDescription[PIN_SPI_MISO].ulPinConfiguration);
PIO_Configure(
g_APinDescription[PIN_SPI_SCK].pPort,
g_APinDescription[PIN_SPI_SCK].ulPinType,
g_APinDescription[PIN_SPI_SCK].ulPin,
g_APinDescription[PIN_SPI_SCK].ulPinConfiguration);
pmc_enable_periph_clk(ID_SPI0);
#if USE_SAM3X_DMAC
pmc_enable_periph_clk(ID_DMAC);
dmac_disable();
DMAC->DMAC_GCFG = DMAC_GCFG_ARB_CFG_FIXED;
dmac_enable();
#if USE_SAM3X_BUS_MATRIX_FIX
MATRIX->MATRIX_WPMR = 0x4d415400;
MATRIX->MATRIX_MCFG[1] = 1;
MATRIX->MATRIX_MCFG[2] = 1;
MATRIX->MATRIX_SCFG[0] = 0x01000010;
MATRIX->MATRIX_SCFG[1] = 0x01000010;
MATRIX->MATRIX_SCFG[7] = 0x01000010;
#endif // USE_SAM3X_BUS_MATRIX_FIX
#endif // USE_SAM3X_DMAC
}
//------------------------------------------------------------------------------
void SdSpiAltDriver::begin(uint8_t csPin) {
m_csPin = csPin;
pinMode(m_csPin, OUTPUT);
digitalWrite(m_csPin, HIGH);
SPI.begin();
#if USE_SAM3X_DMAC
pmc_enable_periph_clk(ID_DMAC);
dmac_disable();
DMAC->DMAC_GCFG = DMAC_GCFG_ARB_CFG_FIXED;
dmac_enable();
#if USE_SAM3X_BUS_MATRIX_FIX
MATRIX->MATRIX_WPMR = 0x4d415400;
MATRIX->MATRIX_MCFG[1] = 1;
MATRIX->MATRIX_MCFG[2] = 1;
MATRIX->MATRIX_SCFG[0] = 0x01000010;
MATRIX->MATRIX_SCFG[1] = 0x01000010;
MATRIX->MATRIX_SCFG[7] = 0x01000010;
#endif // USE_SAM3X_BUS_MATRIX_FIX
#endif // USE_SAM3X_DMAC
}
void spi_master_init(Spi *p_spi, int ul_cs_pin)
{
static bool init_comms = true;
if (init_comms)
{
spi_master_init_pins();
pmc_enable_periph_clk(SPI_INTERFACE_ID);
spi_reset(p_spi);
// set master mode, peripheral select, disable fault detection
spi_set_master_mode(p_spi);
spi_disable_mode_fault_detect(p_spi);
spi_disable_loopback(p_spi);
spi_set_peripheral_chip_select_value(p_spi, DEFAULT_CHIP_ID);
spi_set_fixed_peripheral_select(p_spi);
spi_disable_peripheral_select_decode(p_spi);
init_comms = false;
}
if (ul_cs_pin >= 0)
{
pinMode(ul_cs_pin, OUTPUT);
digitalWrite(ul_cs_pin, HIGH);
}
#if defined(USE_SAM3X_DMAC)
pmc_enable_periph_clk(ID_DMAC);
dmac_disable(DMAC);
dmac_set_priority_mode(DMAC, DMAC_GCFG_ARB_CFG_FIXED);
dmac_enable(DMAC);
#endif
}
/**
* \brief Initialize DMA controller and disable it.
*
* \param p_dmac Pointer to a DMAC peripheral instance.
*/
void dmac_init(Dmac *p_dmac)
{
dmac_disable(p_dmac);
}
/**
* \brief ECB mode encryption and decryption test with DMA.
*/
static void ecb_mode_test_dma(void)
{
/* Configure DMAC. */
configure_dmac();
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- ECB cipher mode\r\n");
printf("- DMA mode\r\n");
printf("- input of 4 32bit words with DMA\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_IDATAR0_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be ciphered by DMA. */
aes_dma_transmit_config(ref_plain_text, AES_EXAMPLE_REFBUF_SIZE);
aes_dma_receive_config(output_data, AES_EXAMPLE_REFBUF_SIZE);
/* Enable DMAC channel. */
dmac_channel_enable(DMAC, AES_DMA_RX_CH);
dmac_channel_enable(DMAC, AES_DMA_TX_CH);
/* Wait for the end of the encryption process. */
while (false == state) {
}
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
printf("\r\n-----------------------------------\r\n");
printf("- 128bit cryptographic key\r\n");
printf("- ECB decipher mode\r\n");
printf("- DMA mode\r\n");
printf("- input of 4 32bit words with DMA\r\n");
printf("-----------------------------------\r\n");
state = false;
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_DECRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_IDATAR0_START;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be ciphered by DMA. */
aes_dma_transmit_config(ref_cipher_text_ecb, AES_EXAMPLE_REFBUF_SIZE);
aes_dma_receive_config(output_data, AES_EXAMPLE_REFBUF_SIZE);
/* Enable DMAC channel. */
dmac_channel_enable(DMAC, AES_DMA_RX_CH);
dmac_channel_enable(DMAC, AES_DMA_TX_CH);
/* Wait for the end of the decryption process. */
while (false == state) {
}
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
printf("\r\nKO!!!\r\n");
} else {
printf("\r\nOK!!!\r\n");
}
/* Disable DMAC module */
dmac_disable(DMAC);
}
/**
* \brief Test ECB mode encryption and decryption with DMA.
*
* \param test Current test case.
*/
static void run_ecb_mode_test_dma(const struct test_case *test)
{
/* Configure DMAC. */
configure_dmac();
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_DMA_MODE;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be ciphered by DMA. */
aes_dma_transmit_config(ref_plain_text, AES_EXAMPLE_REFBUF_SIZE);
aes_dma_receive_config(output_data, AES_EXAMPLE_REFBUF_SIZE);
/* Enable DMAC channel. */
dmac_channel_enable(DMAC, AES_DMA_RX_CH);
dmac_channel_enable(DMAC, AES_DMA_TX_CH);
/* Wait for the end of the encryption process. */
delay_ms(30);
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "ECB mode encryption not work!");
/* Configure the AES. */
g_aes_cfg.encrypt_mode = AES_DECRYPTION;
g_aes_cfg.key_size = AES_KEY_SIZE_128;
g_aes_cfg.start_mode = AES_DMA_MODE;
g_aes_cfg.opmode = AES_ECB_MODE;
g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
g_aes_cfg.lod = false;
aes_set_config(AES, &g_aes_cfg);
/* Set the cryptographic key. */
aes_write_key(AES, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be ciphered by DMA. */
aes_dma_transmit_config(ref_cipher_text_ecb, AES_EXAMPLE_REFBUF_SIZE);
aes_dma_receive_config(output_data, AES_EXAMPLE_REFBUF_SIZE);
/* Enable DMAC channel. */
dmac_channel_enable(DMAC, AES_DMA_RX_CH);
dmac_channel_enable(DMAC, AES_DMA_TX_CH);
/* Wait for the end of the decryption process. */
delay_ms(30);
/* Disable DMAC channel. */
dmac_channel_disable(DMAC, AES_DMA_TX_CH);
dmac_channel_disable(DMAC, AES_DMA_RX_CH);
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "ECB mode decryption not work!");
/* Disable DMAC module */
dmac_disable(DMAC);
}