/** * \brief Interrupt handler for the DMAC. */ void DMAC_Handler(void) { static uint32_t ul_status; ul_status = dmac_get_status(DMAC); if (ul_status & (1 << AES_DMA_RX_CH)) { state = true; } }
/** * This interrupt handler is called when a DMA operation completes and clears the waiting code * (via send_done) The handler overrides the weak reference to the default interrupt handler. */ void DMAC_Handler(void) { uint32_t ret; ret = dmac_get_status(DMAC); if (ret & (1 << AJ_DMA_TX_CHANNEL)) { AJ_WSL_DMA_send_done = 1; } }
/** * \brief DMAC interrupt handler. */ void DMAC_Handler(void) { uint32_t dma_status; dma_status = dmac_get_status(DMAC); if (dma_status & (DMAC_EBCIER_CBTC0 << DMA_CH)) { g_xfer_done = 1; } }
/** * \brief DMAC interrupt handler. */ void DMAC_Handler(void) { uint32_t dma_status; dma_status = dmac_get_status(DMAC); if (dma_status & (1 << BOARD_USART_DMAC_RX_CH)) { configure_dmac_tx(); configure_dmac_rx(); } }
/** * ISR for DMA interrupt */ void DMAC_Handler(void) { uint32_t dma_status; dma_status = dmac_get_status(DMAC); if (dma_status & (DMAC_EBCISR_CBTC0 << DMA_CH)) { dmac_channel_stop_transfer(DMAC, DMA_CH); ssc_disable_tx(SSC); ul_transfer_done = 1; } }