void __init dove_db_clcd_init(void) {
#ifdef CONFIG_FB_DOVE
struct dovefb_mach_info *lcd0_dmi, *lcd0_vid_dmi;
u32 dev, rev;
dove_pcie_id(&dev, &rev);
if (front_panel) {
lcd0_dmi = &dove_db_fp_lcd0_dmi;
lcd0_vid_dmi = &dove_db_fp_lcd0_vid_dmi;
} else {
if (lcd2dvi) {
dove_db_lcd0_dmi.mon_sense
= db_lcd0_mon_sense;
}
lcd0_dmi = &dove_db_lcd0_dmi;
lcd0_vid_dmi = &dove_db_lcd0_vid_dmi;
}
clcd_platform_init(lcd0_dmi, lcd0_vid_dmi,
&dove_db_lcd1_dmi, &dove_db_lcd1_vid_dmi,
&dove_db_backlight_data);
#endif /* CONFIG_FB_DOVE */
}
int compatibility_check(int lcd_args, struct dovefb_mach_info *lcd_dmi_data)
{
u32 dev, rev;
if (!lcd_dmi_data)
return -1;
/* Get chip version. */
dove_pcie_id(&dev, &rev);
/* LCD external clock supported only starting from rev A0 */
if ((rev < DOVE_REV_A0) && ((lcd_args > 1) ||
(MRVL_EXT_CLK0 == lcd_dmi_data->clk_src) ||
(MRVL_EXT_CLK1 == lcd_dmi_data->clk_src))) {
lcd_dmi_data->clk_src = MRVL_PLL_CLK;
lcd_dmi_data->clk_name = "accurate_LCDCLK";
lcd_dmi_data->accurate_clk = 1;
printk(KERN_WARNING "Bootargs choose wrong refclk for %s.\n",
lcd_dmi_data->id_gfx);
}
return 0;
}
int clcd_platform_init(struct dovefb_mach_info *lcd0_dmi_data,
struct dovefb_mach_info *lcd0_vid_dmi_data,
struct dovefb_mach_info *lcd1_dmi_data,
struct dovefb_mach_info *lcd1_vid_dmi_data,
struct dovebl_platform_data *backlight_data)
{
u32 total_x, total_y, i;
u64 div_result;
u32 dev, rev;
unsigned int lcd_accurate_clock = 1;
unsigned int lcd0_use_pll;
unsigned int lcd1_use_pll;
dove_pcie_id(&dev, &rev);
for (i = 0; i < ARRAY_SIZE(video_modes); i++) {
total_x = video_modes[i].xres + video_modes[i].hsync_len +
video_modes[i].left_margin +
video_modes[i].right_margin;
total_y = video_modes[i].yres + video_modes[i].vsync_len +
video_modes[i].upper_margin +
video_modes[i].lower_margin;
div_result = 1000000000000ll;
do_div(div_result,
(total_x * total_y * video_modes[i].refresh));
video_modes[i].pixclock = div_result;
}
/* check compatibility for different chip. */
compatibility_check(lcd0_clk, lcd0_dmi_data);
compatibility_check(lcd1_clk, lcd1_dmi_data);
/* Only one lcd uses internal refclk, we turn on accurate mode. */
lcd0_use_pll = is_clksrc_pll(lcd0_clk, lcd0_dmi_data);
lcd1_use_pll = is_clksrc_pll(lcd1_clk, lcd1_dmi_data);
printk(KERN_WARNING "LCD0 %s PLL.\n", lcd0_use_pll ?
"uses":"doesn't use");
printk(KERN_WARNING "LCD1 %s PLL.\n", lcd1_use_pll ?
"uses":"doesn't use");
if (lcd0_use_pll && lcd1_use_pll)
lcd_accurate_clock = 0;
printk(KERN_WARNING "Turn %s PLL accurate mode.\n",
lcd_accurate_clock ? "on" : "off");
/*
* Because DCON depends on lcd0 & lcd1 clk. Here we
* try to reorder the load sequence. Fix me when h/w
* changes.
*/
#ifdef CONFIG_FB_DOVE_CLCD
/* lcd0 */
if (lcd0_enable && lcd0_dmi_data && lcd0_vid_dmi_data) {
switch(lcd0_clk) {
case -1: /* default, using dovefb_mach_info */
break;
case 0:
lcd0_dmi_data->clk_src = MRVL_AXI_CLK;
lcd0_dmi_data->clk_name = "AXICLK";
break;
case 1:
lcd0_dmi_data->clk_src = MRVL_PLL_CLK;
break;
case 2:
lcd0_dmi_data->clk_src = MRVL_EXT_CLK0;
lcd0_dmi_data->clk_name = "IDT_CLK0";
break;
case 3:
lcd0_dmi_data->clk_src = MRVL_EXT_CLK1;
lcd0_dmi_data->clk_name = "IDT_CLK1";
break;
default:
printk(KERN_ERR "error: invalid value(%d) for lcd0_clk patameter\n",
lcd0_clk);
}
if (lcd0_dmi_data->clk_src == MRVL_PLL_CLK) {
lcd0_dmi_data->accurate_clk = lcd_accurate_clock;
if (lcd0_dmi_data->accurate_clk)
lcd0_dmi_data->clk_name = "accurate_LCDCLK";
else
lcd0_dmi_data->clk_name = "LCDCLK";
}
lcd0_vid_dmi_data->modes = video_modes;
lcd0_vid_dmi_data->num_modes = ARRAY_SIZE(video_modes);
lcd0_vid_platform_device.dev.platform_data = lcd0_vid_dmi_data;
lcd0_dmi_data->modes = video_modes;
lcd0_dmi_data->num_modes = ARRAY_SIZE(video_modes);
if (lcd0_msense <= 0) {
lcd0_dmi_data->mon_sense = NULL;
} else {
if (!lcd0_dmi_data->mon_sense) {
printk(KERN_WARNING "LCD0 Turn on monitor auto "
"detecttion.\n\tBut didn't provide "
"detection call back function..\n\t"
"Please check setup file\n");
}
}
lcd0_platform_device.dev.platform_data = lcd0_dmi_data;
platform_device_register(&lcd0_vid_platform_device);
platform_device_register(&lcd0_platform_device);
} else {
printk(KERN_INFO "LCD 0 disabled.\n");
}
#endif
#ifdef CONFIG_FB_DOVE_CLCD1
/* lcd1 */
if (lcd1_enable && lcd1_dmi_data && lcd1_vid_dmi_data) {
switch(lcd1_clk) {
case -1: /* default, using dovefb_mach_info */
break;
case 0:
lcd1_dmi_data->clk_src = MRVL_AXI_CLK;
lcd1_dmi_data->clk_name = "AXICLK";
break;
case 1:
lcd1_dmi_data->clk_src = MRVL_PLL_CLK;
break;
case 2:
lcd1_dmi_data->clk_src = MRVL_EXT_CLK0;
lcd1_dmi_data->clk_name = "IDT_CLK0";
break;
case 3:
lcd1_dmi_data->clk_src = MRVL_EXT_CLK1;
lcd1_dmi_data->clk_name = "IDT_CLK1";
break;
default:
printk(KERN_ERR "error: invalid value(%d) for lcd1_clk patameter\n",
lcd1_clk);
}
if (lcd1_dmi_data->clk_src == MRVL_PLL_CLK) {
lcd1_dmi_data->accurate_clk = lcd_accurate_clock;
if (lcd1_dmi_data->accurate_clk)
lcd1_dmi_data->clk_name = "accurate_LCDCLK";
else
lcd1_dmi_data->clk_name = "LCDCLK";
}
#ifdef CONFIG_FB_DOVE_CLCD
lcd1_dmi_data->enable_lcd0 = (lcd0_enable ? 0 : 1);
#endif
lcd1_vid_dmi_data->modes = video_modes;
lcd1_vid_dmi_data->num_modes = ARRAY_SIZE(video_modes);
lcd1_vid_platform_device.dev.platform_data = lcd1_vid_dmi_data;
lcd1_dmi_data->modes = video_modes;
lcd1_dmi_data->num_modes = ARRAY_SIZE(video_modes);
if (lcd1_msense <= 0) {
lcd1_dmi_data->mon_sense = NULL;
} else {
if (!lcd1_dmi_data->mon_sense) {
printk(KERN_WARNING "LCD1 Turn on monitor auto "
"detecttion.\n\tBut didn't provide "
"detection call back function..\n\t"
"Please check setup file\n");
}
}
lcd1_platform_device.dev.platform_data = lcd1_dmi_data;
platform_device_register(&lcd1_vid_platform_device);
platform_device_register(&lcd1_platform_device);
} else {
printk(KERN_INFO "LCD 1 disabled.\n");
}
#endif
#ifdef CONFIG_FB_DOVE_DCON
if (lcd0_enable || lcd1_enable) {
if (lcd0_enable)
dcon_data.port_a = 1;
if (lcd1_enable)
dcon_data.port_b = 1;
#ifdef CONFIG_FB_DOVE_CLCD_DCONB_BYPASS0
dcon_data.port_b = 1;
#endif
/* DCON refer to same clock source as LCD0 & LCD1. */
if (lcd0_dmi_data && lcd0_dmi_data->clk_name)
dcon_data.clk_name[0] = lcd0_dmi_data->clk_name;
if (lcd1_dmi_data && lcd1_dmi_data->clk_name)
dcon_data.clk_name[1] = lcd1_dmi_data->clk_name;
platform_device_register(&dcon_platform_device);
}
#endif
#ifdef CONFIG_BACKLIGHT_DOVE
if (lcd0_enable) {
backlight_platform_device.dev.platform_data = backlight_data;
platform_device_register(&backlight_platform_device);
}
#endif
return 0;
}
static int __init dove_db_pm_init(void)
{
MV_PMU_INFO pmuInitInfo;
u32 dev, rev;
if (!machine_is_dove_db() && !machine_is_dove_db_b())
return 0;
global_dvs_enable = dvs_enable;
dove_pcie_id(&dev, &rev);
pmuInitInfo.batFltMngDis = MV_FALSE; /* Keep battery fault enabled */
pmuInitInfo.exitOnBatFltDis = MV_FALSE; /* Keep exit from STANDBY on battery fail enabled */
if (machine_is_dove_db() && rev < DOVE_REV_A0) {
pmuInitInfo.sigSelctor[0] = PMU_SIGNAL_NC;
pmuInitInfo.sigSelctor[1] = PMU_SIGNAL_NC;
pmuInitInfo.sigSelctor[2] = PMU_SIGNAL_SLP_PWRDWN; /* STANDBY => 0: I/O off, 1: I/O on */
pmuInitInfo.sigSelctor[3] = PMU_SIGNAL_EXT0_WKUP; /* power on push button */
if (rev >= DOVE_REV_X0) { /* For X0 and higher Power Good indication is not needed */
if (standby_fix)
pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_CKE_OVRID; /* CKE controlled by Dove */
else
pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_NC;
}
else
pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_CPU_PWRGOOD; /* CORE power good used as Standby PG */
pmuInitInfo.sigSelctor[5] = PMU_SIGNAL_CPU_PWRDWN; /* DEEP-IdLE => 0: CPU off, 1: CPU on */
if ((rev >= DOVE_REV_X0) && (standby_fix)) /* For boards with X0 we use MPP6 as MRESET */
pmuInitInfo.sigSelctor[6] = PMU_SIGNAL_MRESET_OVRID; /* M_RESET is pulled up - always HI */
else
pmuInitInfo.sigSelctor[6] = PMU_SIGNAL_NC;
} else {
pmuInitInfo.sigSelctor[0] = PMU_SIGNAL_CPU_PWRDWN; /* DEEP-IdLE => 0: CPU off, 1: CPU on */
pmuInitInfo.sigSelctor[1] = PMU_SIGNAL_1;
pmuInitInfo.sigSelctor[2] = PMU_SIGNAL_NC;
pmuInitInfo.sigSelctor[3] = PMU_SIGNAL_EXT0_WKUP; /* power on push button */
pmuInitInfo.sigSelctor[4] = PMU_SIGNAL_CKE_OVRID; /* CKE controlled by Dove */
pmuInitInfo.sigSelctor[5] = PMU_SIGNAL_SLP_PWRDWN; /* STANDBY => 0: I/O off, 1: I/O on */
/* For boards with X0 we use MPP6 as MRESET */
pmuInitInfo.sigSelctor[6] = PMU_SIGNAL_MRESET_OVRID;
}
pmuInitInfo.sigSelctor[7] = PMU_SIGNAL_1; /* Standby Led - inverted */
pmuInitInfo.sigSelctor[8] = PMU_SIGNAL_NC;
pmuInitInfo.sigSelctor[9] = PMU_SIGNAL_NC; /* CPU power good - not used */
pmuInitInfo.sigSelctor[10] = PMU_SIGNAL_SDI; /* Voltage regulator control */
pmuInitInfo.sigSelctor[11] = PMU_SIGNAL_NC;
pmuInitInfo.sigSelctor[12] = PMU_SIGNAL_NC;
pmuInitInfo.sigSelctor[13] = PMU_SIGNAL_NC;
pmuInitInfo.sigSelctor[14] = PMU_SIGNAL_NC;
pmuInitInfo.sigSelctor[15] = PMU_SIGNAL_NC;
pmuInitInfo.dvsDelay = 0x4200; /* ~100us in 166MHz cc - delay for DVS change */
if (dvs_values_param != 0)
pmuInitInfo.dvsValues = dvs_values_param; /* calibrated values from u-boot */
else
pmuInitInfo.dvsValues = (DOVE_PSET_HI << DOVE_PSET_HI_OFFSET) | (DOVE_VSET_HI << DOVE_VSET_HI_OFFSET) | (DOVE_PSET_LO << DOVE_PSET_LO_OFFSET) | (DOVE_VSET_LO << DOVE_VSET_LO_OFFSET); /* default values */
if (machine_is_dove_db_b() || rev >= DOVE_REV_A0)
pmuInitInfo.ddrTermGpioNum = 2; /* GPIO 2 used to disable terminations */
else
pmuInitInfo.ddrTermGpioNum = 16; /* GPIO 16 used to disable terminations */
if (rev >= DOVE_REV_X0) /* For X0 and higher wait at least 150ms + spare */
pmuInitInfo.standbyPwrDelay = 0x2000; /* 250ms delay to wait for complete powerup */
else
pmuInitInfo.standbyPwrDelay = 0x140; /* 10ms delay after getting the power good indication */
/* Initialize the PMU HAL */
if (mvPmuInit(&pmuInitInfo) != MV_OK)
{
printk(KERN_ERR "ERROR: Failed to initialise the PMU!\n");
return 0;
}
/* Configure wakeup events */
mvPmuWakeupEventSet(PMU_STBY_WKUP_CTRL_EXT0_FALL | PMU_STBY_WKUP_CTRL_RTC_MASK);
/* Register the PM operation in the Linux stack */
dove_pm_register();
return 0;
}
//extern struct mbus_dram_target_info dove_mbus_dram_info;
//extern int __init pxa_init_dma_wins(struct mbus_dram_target_info * dram);
static void __init dove_db_init(void)
{
u32 dev, rev;
/*
* Basic Dove setup. Needs to be called early.
*/
dove_init();
dove_pcie_id(&dev, &rev);
if (machine_is_dove_db_b() || rev >= DOVE_REV_A0) {
dove_mpp_conf(dove_db_b_mpp_modes);
dove_db_b_giga_phy_gpio_setup();
} else
dove_mpp_conf(dove_db_mpp_modes);
if ((front_panel) && (left_tact || right_tact)) {
dove_mpp_conf(dove_db_tact_int_mpp_modes);
i2s1_data.spdif_play = 0;
}
pm_power_off = dove_db_power_off;
/* the (SW1) button is for use as a "wakeup" button */
dove_wakeup_button_setup(DOVE_DB_WAKEUP_GPIO);
/* sdio card interrupt workaround using GPIOs */
dove_sd_card_int_wa_setup(0);
dove_sd_card_int_wa_setup(1);
if(front_panel) {
/* JPR6 shoud be on 1-2 for touchscreen irq line */
if (dove_db_ts_gpio_setup() != 0)
return;
}
#if defined(CONFIG_SND_DOVE_AC97)
#if !defined(CONFIG_CPU_ENDIAN_BE8)
/* FIXME:
* we need fix __AC97(x) definition in
* arch/arm/mach-dove/include/mach/pxa-regs.h
* to resolve endian access.
*/
/* Initialize AC'97 related regs. */
dove_ac97_setup();
#endif
#endif
dove_rtc_init();
pxa_init_dma_wins(&dove_mbus_dram_info);
pxa_init_dma(16);
#ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT
if(useHalDrivers || useNandHal) {
if (mvPdmaHalInit(MV_PDMA_MAX_CHANNELS_NUM) != MV_OK) {
printk(KERN_ERR "mvPdmaHalInit() failed.\n");
BUG();
}
/* reserve channels for NAND Data and command PDMA */
pxa_reserve_dma_channel(MV_PDMA_NAND_DATA);
pxa_reserve_dma_channel(MV_PDMA_NAND_COMMAND);
}
#endif
dove_xor0_init();
dove_xor1_init();
#ifdef CONFIG_MV_ETHERNET
if(use_hal_giga || useHalDrivers)
dove_mv_eth_init();
else
#endif
if (rev >= DOVE_REV_A0)
dove_ge00_init(&dove_db_b_ge00_data);
else
dove_ge00_init(&dove_db_ge00_data);
dove_ehci0_init();
dove_ehci1_init();
/* ehci init functions access the usb port, only now it's safe to disable
* all clocks
*/
ds_clks_disable_all(0, 0);
dove_sata_init(&dove_db_sata_data);
dove_spi0_init(0);
dove_spi1_init(1);
dove_uart0_init();
dove_uart1_init();
dove_i2c_init();
dove_i2c_exp_init(0);
#ifdef CONFIG_DOVE_DB_USE_GPIO_I2C
dove_add_gpio_i2c();
#else
dove_i2c_exp_init(1);
#endif
dove_sdhci_cam_mbus_init();
dove_sdio0_init();
dove_sdio1_init();
dove_db_nfc_init();
dove_db_clcd_init();
dove_vmeta_init();
dove_gpu_init();
dove_ssp_init(&dove_ssp_platform_data);
dove_cesa_init();
dove_hwmon_init();
#if !defined(CONFIG_SND_DOVE_AC97)
dove_i2s_init(0, &i2s0_data);
#endif
dove_i2s_init(1, &i2s1_data);
i2c_register_board_info(0, &i2c_a2d, 1);
i2c_register_board_info(0, dove_db_gpio_ext_info, 1);
if (machine_is_dove_db_b() || rev >= DOVE_REV_A0)
i2c_register_board_info(0, &idt, 1);
if (lcd2dvi)
i2c_register_board_info(0, adi9889, ARRAY_SIZE(adi9889));
spi_register_board_info(dove_db_spi_flash_info,
ARRAY_SIZE(dove_db_spi_flash_info));
if (front_panel)
spi_register_board_info(dove_db_spi_ts_dev,
ARRAY_SIZE(dove_db_spi_ts_dev));
#ifdef CONFIG_ANDROID_PMEM
android_add_pmem("pmem", 0x02000000UL, 1, 0);
android_add_pmem("pmem_adsp", 0x00400000UL, 0, 0);
#endif
}
static void __init dove_db_init(void)
{
/*
* Basic Dove setup. Needs to be called early.
*/
u32 dev, rev;
dove_init();
dove_pcie_id(&dev, &rev);
dove_mpp_conf(dove_d2plug_a0_mpp_modes, dove_d2plug_a0_mppgrp_modes,
MPP_GRP_AU1_52_57_AU1, MPP_GRP_NFC_64_71_NFC);
dove_d2plug_gpio_init(rev);
pm_power_off = dove_d2plug_power_off;
/* sdio card interrupt workaround using GPIOs */
dove_sd_card_int_wa_setup(0);
dove_sd_card_int_wa_setup(1);
pxa_init_dma_wins(&orion_mbus_dram_info);
pxa_init_dma(16);
#ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT
if (useHalDrivers || useNandHal) {
if (mvPdmaHalInit(MV_PDMA_MAX_CHANNELS_NUM) != MV_OK) {
printk(KERN_ERR "mvPdmaHalInit() failed.\n");
BUG();
}
/* reserve channels for NAND Data and command PDMA */
pxa_reserve_dma_channel(MV_PDMA_NAND_DATA);
pxa_reserve_dma_channel(MV_PDMA_NAND_COMMAND);
}
#endif
#ifdef CONFIG_MV_ETHERNET
if (use_hal_giga || useHalDrivers)
dove_mv_eth_init();
else
#endif
dove_ge00_init(&dove_db_ge00_data);
dove_ehci0_init();
dove_ehci1_init();
//ds_clks_disable_all(0, 0);
dove_sata_init(&dove_db_sata_data);
dove_sdio0_init();
dove_sdio1_init();
//dove_spi0_init(); //it is called in following place.
//dove_spi1_init();
//dove_d2plug_nfc_init();
dove_uart0_init();
dove_uart1_init();
dove_d2plug_clcd_init();
dove_vmeta_init();
dove_gpu_init();
dove_cesa_init();
dove_hwmon_init();
//dove_i2s_init(0, &i2s0_data); //for audio jack; (d3plug)
dove_i2s_init(1, &i2s1_data); //for hdmi
dove_i2c_init();
dove_i2c_exp_init(0);
//if (rev >= DOVE_REV_X0) { dove_i2c_exp_init(1); }
i2c_register_board_info(0, dove_d2plug_i2c_bus0_devs,
ARRAY_SIZE(dove_d2plug_i2c_bus0_devs));
//i2c_register_board_info(1, dove_d2plug_i2c_bus1_devs, ARRAY_SIZE(dove_d2plug_i2c_bus1_devs));
//if (rev >= DOVE_REV_A0) i2c_register_board_info(0, &idt, 1);
dove_spi0_init();
spi_register_board_info(dove_db_spi_flash_info,
ARRAY_SIZE(dove_db_spi_flash_info));
platform_device_register(&plug_leds);
#ifdef CONFIG_BATTERY_MCU
dove_battery_init_v3();
#endif
//ds_clks_enable_all();
printk(KERN_INFO"ENd of INIT ***************************\r\n");
}