int ovl2mem_input_config(ovl2mem_in_config *input)
{
	int ret = -1;
	int i = 0;
	disp_ddp_path_config *data_config;

	DISPFUNC();
	_ovl2mem_path_lock(__func__);

	/* all dirty should be cleared in dpmgr_path_get_last_config() */
	data_config = dpmgr_path_get_last_config(pgc->dpmgr_handle);
	data_config->dst_dirty = 0;
	data_config->ovl_dirty = 0;
	data_config->rdma_dirty = 0;

	if (pgc->state == 0) {
		DISPMSG("ovl2mem is already slept\n");
		_ovl2mem_path_unlock(__func__);
		return 0;
	}
	/* hope we can use only 1 input struct for input config, just set layer number */
	for (i = 0; i < HW_OVERLAY_COUNT; i++) {
		dprec_logger_start(DPREC_LOGGER_PRIMARY_CONFIG,
				   input->layer | (input->layer_en << 16), input->addr);

		if (input[i].layer_en) {
			if (input[i].vaddr)
				/* / _debug_pattern(0x00000000, input[i].vaddr, input[i].dst_w, input[i].dst_h,
						    input[i].src_pitch, 0x00000000, input[i].layer, input[i].buff_idx);
				 */
				;
			else
				/* /_debug_pattern(input[i].addr,0x00000000, input[i].dst_w, input[i].dst_h,
						   input[i].src_pitch, 0x00000000, input[i].layer, input[i].buff_idx);
				 */
				;
		}
		/* /DISPMSG("[primary], i:%d, layer:%d, layer_en:%d, dirty:%d -0x%x\n",
			    i, input[i].layer, input[i].layer_en, input[i].dirty, input[i].addr);
		 */
		if (input[i].dirty)
			ret = _convert_disp_input_to_ovl(&(data_config->ovl_config[input[i].layer]),
			(primary_disp_input_config *)&input[i]);

		data_config->ovl_dirty = 1;
		dprec_logger_done(DPREC_LOGGER_PRIMARY_CONFIG, input->src_x, input->src_y);

	}

	if (dpmgr_path_is_busy(pgc->dpmgr_handle))
		dpmgr_wait_event_timeout(pgc->dpmgr_handle, DISP_PATH_EVENT_FRAME_COMPLETE, HZ / 5);

	ret = dpmgr_path_config(pgc->dpmgr_handle, data_config, pgc->cmdq_handle_config);

	_ovl2mem_path_unlock(__func__);

	DISPMSG("ovl2mem_input_config done\n");
	return ret;
}
Exemple #2
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void dprec_stub_irq(unsigned int irq_bit)
{
    	//DISP_REG_SET(NULL,DISP_REG_CONFIG_MUTEX_INTEN,0xffffffff);
	if(irq_bit == DDP_IRQ_DSI0_EXT_TE)
	{
		dprec_logger_trigger(DPREC_LOGGER_DSI_EXT_TE, irq_bit, 0);
	}
	else if(irq_bit == DDP_IRQ_RDMA0_START)
	{
		dprec_logger_start(DPREC_LOGGER_RDMA0_TRANSFER, irq_bit, 0);
	}
	else if(irq_bit == DDP_IRQ_RDMA0_DONE)
	{
		dprec_logger_done(DPREC_LOGGER_RDMA0_TRANSFER, irq_bit, 0);
	}
	//DISPMSG("irq:0x%08x\n", irq_bit);
}
static void _ovl2mem_path_lock(const char *caller)
{
	dprec_logger_start(DPREC_LOGGER_PRIMARY_MUTEX, 0, 0);
	disp_sw_mutex_lock(&(pgc->lock));
	pgc->mutex_locker = caller;
}