void dpi_set_timings(struct omap_dss_device *dssdev, struct omap_video_timings *timings) { int r; DSSDBG("dpi_set_timings\n"); dssdev->panel.timings = *timings; if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) { r = dss_runtime_get(); if (r) return; r = dispc_runtime_get(); if (r) { dss_runtime_put(); return; } dpi_set_mode(dssdev); dispc_go(dssdev->manager->id); dispc_runtime_put(); dss_runtime_put(); } }
static int hdmi_runtime_get(void) { int r; DSSDBG("hdmi_runtime_get\n"); /* * HACK: Add dss_runtime_get() to ensure DSS clock domain is enabled. * This should be removed later. */ r = dss_runtime_get(); if (r < 0) goto err_get_dss; r = pm_runtime_get_sync(&hdmi.pdev->dev); WARN_ON(r < 0); if (r < 0) goto err_get_hdmi; return 0; err_get_hdmi: dss_runtime_put(); err_get_dss: return r; }
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) { dssdev->manager->disable(dssdev->manager); if (dpi_use_dsi_pll(dssdev)) { dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); dsi_pll_uninit(dpi.dsidev, true); dsi_runtime_put(dpi.dsidev); } dispc_runtime_put(); dss_runtime_put(); #ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT if (dpi.fb_skip) { dssdev->dss_clks_disable(); dpi.fb_skip = false; } #endif if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); omap_dss_stop_device(dssdev); }
static int rfbi_runtime_suspend(struct device *dev) { dispc_runtime_put(); dss_runtime_put(); return 0; }
static int hdmi_panel_enable(struct omap_dss_device *dssdev) { int r = 0; pr_info("hdmi_panel: ENTER hdmi_panel_enable\n"); dss_runtime_get(); mutex_lock(&hdmi.hdmi_lock); if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) { r = -EINVAL; pr_info("hdmi_panel: Error, display already enabled\n"); goto err; } r = omapdss_hdmi_display_enable(dssdev); if (r) { DSSERR("hdmi_panel: Error, failed to power on\n"); goto err; } dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; err: mutex_unlock(&hdmi.hdmi_lock); dss_runtime_put(); return r; }
static int rfbi_runtime_get(void) { int r; DSSDBG("rfbi_runtime_get\n"); r = dss_runtime_get(); if (r) goto err_get_dss; r = dispc_runtime_get(); if (r) goto err_get_dispc; r = pm_runtime_get_sync(&rfbi.pdev->dev); WARN_ON(r); if (r < 0) goto err_runtime_get; return 0; err_runtime_get: dispc_runtime_put(); err_get_dispc: dss_runtime_put(); err_get_dss: return r; }
/*----------------------------------------------------------------------------- * Function: hdcp_release_dss *----------------------------------------------------------------------------- */ static void hdcp_release_dss(void) { #ifdef DSS_POWER if (hdcp.dss_state == 0) dss_runtime_put(); #endif }
static int dss_video_pll_enable(struct dss_pll *pll) { struct dss_video_pll *vpll = container_of(pll, struct dss_video_pll, pll); int r; r = dss_runtime_get(); if (r) return r; dss_ctrl_pll_enable(pll->id, true); dss_dpll_enable_scp_clk(vpll); r = dss_pll_wait_reset_done(pll); if (r) goto err_reset; dss_dpll_power_enable(vpll); return 0; err_reset: dss_dpll_disable_scp_clk(vpll); dss_ctrl_pll_enable(pll->id, false); dss_runtime_put(); return r; }
static int hdmi_runtime_suspend(struct device *dev) { clk_disable(hdmi.sys_clk); dispc_runtime_put(); dss_runtime_put(); return 0; }
static void restore_all_ctx(void) { DSSDBG("restore context\n"); dss_runtime_get(); dss_restore_context(); dispc_restore_context(); dss_runtime_put(); }
static void dss_video_pll_disable(struct dss_pll *pll) { struct dss_video_pll *vpll = container_of(pll, struct dss_video_pll, pll); dss_dpll_power_disable(vpll); dss_dpll_disable_scp_clk(vpll); dss_ctrl_pll_enable(pll->id, false); dss_runtime_put(); }
static void rfbi_runtime_put(void) { int r; DSSDBG("rfbi_runtime_put\n"); r = pm_runtime_put_sync(&rfbi.pdev->dev); WARN_ON(r); dispc_runtime_put(); dss_runtime_put(); }
void omapdss_sdi_display_disable(struct omap_dss_device *dssdev) { dss_mgr_disable(dssdev->manager); dss_sdi_disable(); dispc_runtime_put(); dss_runtime_put(); regulator_disable(sdi.vdds_sdi_reg); omap_dss_stop_device(dssdev); }
static void hdmi_runtime_put(void) { int r; DSSDBG("hdmi_runtime_put\n"); r = pm_runtime_put_sync(&hdmi.pdev->dev); WARN_ON(r < 0); /* * HACK: This is added to complement the dss_runtime_get() call in * hdmi_runtime_get(). This should be removed later. */ dss_runtime_put(); }
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) { dss_mgr_disable(dssdev->manager); if (dpi_use_dsi_pll(dssdev)) { dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); dsi_pll_uninit(dpi.dsidev, true); dsi_runtime_put(dpi.dsidev); } dispc_runtime_put(); dss_runtime_put(); if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); omap_dss_stop_device(dssdev); }
static int rfbi_runtime_resume(struct device *dev) { int r; r = dss_runtime_get(); if (r < 0) goto err_get_dss; r = dispc_runtime_get(); if (r < 0) goto err_get_dispc; return 0; err_get_dispc: dss_runtime_put(); err_get_dss: return r; }
static void save_all_ctx(void) { DSSDBG("save context\n"); dss_runtime_get(); dss_save_context(); /* * There is use case user space MME app need to disable ovl, * but it might call down to display driver after display is * already off and context was already saved, so these changes * are not saved, when resume, this change will be lost. * To be simple, disable overlay planes before save dispc ctx. */ dispc_enable_plane(OMAP_DSS_VIDEO1, 0); dispc_enable_plane(OMAP_DSS_VIDEO2, 0); dispc_enable_plane(OMAP_DSS_VIDEO3, 0); dispc_save_context(); dss_runtime_put(); }
static int hdmi_runtime_resume(struct device *dev) { int r; r = dss_runtime_get(); if (r < 0) goto err_get_dss; r = dispc_runtime_get(); if (r < 0) goto err_get_dispc; clk_enable(hdmi.sys_clk); return 0; err_get_dispc: dss_runtime_put(); err_get_dss: return r; }
int omapdss_sdi_display_enable(struct omap_dss_device *dssdev) { struct omap_video_timings *t = &dssdev->panel.timings; struct dss_clock_info dss_cinfo; struct dispc_clock_info dispc_cinfo; u16 lck_div, pck_div; unsigned long fck; unsigned long pck; int r; if (dssdev->manager == NULL) { DSSERR("failed to enable display: no manager\n"); return -ENODEV; } r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err_start_dev; } r = regulator_enable(sdi.vdds_sdi_reg); if (r) goto err_reg_enable; r = dss_runtime_get(); if (r) goto err_get_dss; r = dispc_runtime_get(); if (r) goto err_get_dispc; sdi_basic_init(dssdev); /* */ dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF; dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config, dssdev->panel.acbi, dssdev->panel.acb); r = dss_calc_clock_div(1, t->pixel_clock * 1000, &dss_cinfo, &dispc_cinfo); if (r) goto err_calc_clock_div; fck = dss_cinfo.fck; lck_div = dispc_cinfo.lck_div; pck_div = dispc_cinfo.pck_div; pck = fck / lck_div / pck_div / 1000; if (pck != t->pixel_clock) { DSSWARN("Could not find exact pixel clock. Requested %d kHz, " "got %lu kHz\n", t->pixel_clock, pck); t->pixel_clock = pck; } dispc_mgr_set_lcd_timings(dssdev->manager->id, t); r = dss_set_clock_div(&dss_cinfo); if (r) goto err_set_dss_clock_div; r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo); if (r) goto err_set_dispc_clock_div; dss_sdi_init(dssdev->phy.sdi.datapairs); r = dss_sdi_enable(); if (r) goto err_sdi_enable; mdelay(2); r = dss_mgr_enable(dssdev->manager); if (r) goto err_mgr_enable; return 0; err_mgr_enable: dss_sdi_disable(); err_sdi_enable: err_set_dispc_clock_div: err_set_dss_clock_div: err_calc_clock_div: dispc_runtime_put(); err_get_dispc: dss_runtime_put(); err_get_dss: regulator_disable(sdi.vdds_sdi_reg); err_reg_enable: omap_dss_stop_device(dssdev); err_start_dev: return r; }
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) { int r; if (cpu_is_omap34xx() && !dpi.vdds_dsi_reg) { DSSERR("no VDSS_DSI regulator\n"); return -ENODEV; } if (dssdev->manager == NULL) { DSSERR("failed to enable display: no manager\n"); return -ENODEV; } r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err_start_dev; } if (cpu_is_omap34xx()) { r = regulator_enable(dpi.vdds_dsi_reg); if (r) goto err_reg_enable; } r = dss_runtime_get(); if (r) goto err_get_dss; r = dispc_runtime_get(); if (r) goto err_get_dispc; dpi_basic_init(dssdev); if (dpi_use_dsi_pll(dssdev)) { r = dsi_runtime_get(dpi.dsidev); if (r) goto err_get_dsi; r = dsi_pll_init(dpi.dsidev, 0, 1); if (r) goto err_dsi_pll_init; } r = dpi_set_mode(dssdev); if (r) goto err_set_mode; mdelay(2); r = dss_mgr_enable(dssdev->manager); if (r) goto err_mgr_enable; return 0; err_mgr_enable: err_set_mode: if (dpi_use_dsi_pll(dssdev)) dsi_pll_uninit(dpi.dsidev, true); err_dsi_pll_init: if (dpi_use_dsi_pll(dssdev)) dsi_runtime_put(dpi.dsidev); err_get_dsi: dispc_runtime_put(); err_get_dispc: dss_runtime_put(); err_get_dss: if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); err_reg_enable: omap_dss_stop_device(dssdev); err_start_dev: return r; }
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) { int r; r = omap_dss_start_device(dssdev); if (r) { DSSERR("failed to start device\n"); goto err_start_dev; } if (cpu_is_omap34xx()) { r = regulator_enable(dpi.vdds_dsi_reg); if (r) goto err_reg_enable; } r = dss_runtime_get(); if (r) goto err_get_dss; if (!dssdev->skip_init) { r = dispc_runtime_get(); if (r) goto err_get_dispc; } dpi_basic_init(dssdev); if (dpi_use_dsi_pll(dssdev)) { r = dsi_runtime_get(dpi.dsidev); if (r) goto err_get_dsi; if (!dssdev->skip_init) { r = dsi_pll_init(dpi.dsidev, 0, 1); if (r) goto err_dsi_pll_init; } } r = dpi_set_mode(dssdev); if (r) goto err_set_mode; mdelay(2); dssdev->manager->enable(dssdev->manager); if (dssdev->skip_init) dssdev->skip_init = false; return 0; err_set_mode: if (dpi_use_dsi_pll(dssdev)) dsi_pll_uninit(dpi.dsidev, true); err_dsi_pll_init: if (dpi_use_dsi_pll(dssdev)) dsi_runtime_put(dpi.dsidev); err_get_dsi: dispc_runtime_put(); err_get_dispc: dss_runtime_put(); err_get_dss: if (cpu_is_omap34xx()) regulator_disable(dpi.vdds_dsi_reg); err_reg_enable: omap_dss_stop_device(dssdev); err_start_dev: return r; }