static unsigned bfin_wdog_io_write_buffer (struct hw *me, const void *source, int space, address_word addr, unsigned nr_bytes) { struct bfin_wdog *wdog = hw_data (me); bu32 mmr_off; bu32 value; bu16 *value16p; bu32 *value32p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) return 0; if (nr_bytes == 4) value = dv_load_4 (source); else value = dv_load_2 (source); mmr_off = addr - wdog->base; valuep = (void *)((unsigned long)wdog + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_WRITE (); switch (mmr_off) { case mmr_offset(ctl): dv_w1c_2_partial (value16p, value, WDRO); /* XXX: Should enable an event here to handle timeouts. */ break; case mmr_offset(cnt): /* Writes are discarded when enabeld. */ if (!bfin_wdog_enabled (wdog)) { *value32p = value; /* Writes to CNT preloads the STAT. */ wdog->stat = wdog->cnt; } break; case mmr_offset(stat): /* When enabled, writes to STAT reload the counter. */ if (bfin_wdog_enabled (wdog)) wdog->stat = wdog->cnt; /* XXX: When disabled, are writes just ignored ? */ break; } return nr_bytes; }
static unsigned bfin_eppi_io_read_buffer (struct hw *me, void *dest, int space, address_word addr, unsigned nr_bytes) { struct bfin_eppi *eppi = hw_data (me); bu32 mmr_off; bu16 *value16p; bu32 *value32p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) return 0; mmr_off = addr - eppi->base; valuep = (void *)((unsigned long)eppi + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_READ (); switch (mmr_off) { case mmr_offset(status): case mmr_offset(hcount): case mmr_offset(hdelay): case mmr_offset(vcount): case mmr_offset(vdelay): case mmr_offset(frame): case mmr_offset(line): case mmr_offset(clkdiv): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false)) return 0; dv_store_2 (dest, *value16p); break; case mmr_offset(control): case mmr_offset(fs1w_hbl): case mmr_offset(fs1p_avpl): case mmr_offset(fsw2_lvb): case mmr_offset(fs2p_lavf): case mmr_offset(clip): case mmr_offset(err): if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false)) return 0; dv_store_4 (dest, *value32p); break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, false); return 0; } return nr_bytes; }
static unsigned bfin_gptimer_io_write_buffer (struct hw *me, const void *source, int space, address_word addr, unsigned nr_bytes) { struct bfin_gptimer *gptimer = hw_data (me); bu32 mmr_off; bu32 value; bu16 *value16p; bu32 *value32p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) return 0; if (nr_bytes == 4) value = dv_load_4 (source); else value = dv_load_2 (source); mmr_off = addr - gptimer->base; valuep = (void *)((unsigned long)gptimer + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_WRITE (); switch (mmr_off) { case mmr_offset(config): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) return 0; *value16p = value; break; case mmr_offset(counter): case mmr_offset(period): case mmr_offset(width): if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true)) return 0; *value32p = value; break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, true); return 0; } return nr_bytes; }
static unsigned bfin_ebiu_ddrc_io_write_buffer (struct hw *me, const void *source, int space, address_word addr, unsigned nr_bytes) { struct bfin_ebiu_ddrc *ddrc = hw_data (me); bu32 mmr_off; bu32 value; bu16 *value16p; bu32 *value32p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) return 0; if (nr_bytes == 4) value = dv_load_4 (source); else value = dv_load_2 (source); mmr_off = addr - ddrc->base; valuep = (void *)((unsigned long)ddrc + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_WRITE (); switch (mmr_off) { case mmr_offset(errmst): case mmr_offset(rstctl): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) return 0; *value16p = value; break; default: if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true)) return 0; *value32p = value; break; } return nr_bytes; }
static unsigned bfin_gptimer_io_read_buffer (struct hw *me, void *dest, int space, address_word addr, unsigned nr_bytes) { struct bfin_gptimer *gptimer = hw_data (me); bu32 mmr_off; bu16 *value16p; bu32 *value32p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false)) return 0; mmr_off = addr - gptimer->base; valuep = (void *)((unsigned long)gptimer + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_READ (); switch (mmr_off) { case mmr_offset(config): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false)) return 0; dv_store_2 (dest, *value16p); break; case mmr_offset(counter): case mmr_offset(period): case mmr_offset(width): if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false)) return 0; dv_store_4 (dest, *value32p); break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, false); return 0; } return nr_bytes; }
static unsigned bfin_ebiu_ddrc_io_read_buffer (struct hw *me, void *dest, int space, address_word addr, unsigned nr_bytes) { struct bfin_ebiu_ddrc *ddrc = hw_data (me); bu32 mmr_off; bu32 *value32p; bu16 *value16p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) return 0; mmr_off = addr - ddrc->base; valuep = (void *)((unsigned long)ddrc + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_READ (); switch (mmr_off) { case mmr_offset(errmst): case mmr_offset(rstctl): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false)) return 0; dv_store_2 (dest, *value16p); break; default: if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false)) return 0; dv_store_4 (dest, *value32p); break; } return nr_bytes; }
static unsigned bfin_eppi_io_write_buffer (struct hw *me, const void *source, int space, address_word addr, unsigned nr_bytes) { struct bfin_eppi *eppi = hw_data (me); bu32 mmr_off; bu32 value; bu16 *value16p; bu32 *value32p; void *valuep; /* Invalid access mode is higher priority than missing register. */ if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) return 0; if (nr_bytes == 4) value = dv_load_4 (source); else value = dv_load_2 (source); mmr_off = addr - eppi->base; valuep = (void *)((unsigned long)eppi + mmr_base() + mmr_off); value16p = valuep; value32p = valuep; HW_TRACE_WRITE (); switch (mmr_off) { case mmr_offset(status): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) return 0; dv_w1c_2 (value16p, value, 0x1ff); break; case mmr_offset(hcount): case mmr_offset(hdelay): case mmr_offset(vcount): case mmr_offset(vdelay): case mmr_offset(frame): case mmr_offset(line): case mmr_offset(clkdiv): if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) return 0; *value16p = value; break; case mmr_offset(control): *value32p = value; bfin_eppi_gui_setup (eppi); break; case mmr_offset(fs1w_hbl): case mmr_offset(fs1p_avpl): case mmr_offset(fsw2_lvb): case mmr_offset(fs2p_lavf): case mmr_offset(clip): case mmr_offset(err): if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true)) return 0; *value32p = value; break; default: dv_bfin_mmr_invalid (me, addr, nr_bytes, true); return 0; } return nr_bytes; }