static int pxa95x_pcm_ssp_trigger(struct snd_pcm_substream *substream, int cmd) { struct pxa95x_runtime_data *prtd = substream->runtime->private_data; int ret = 0; switch (cmd) { case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: dvfm_disable_lowpower(pxa95x_ssp_dvfm_idx); DDADR(prtd->dma_ch) = prtd->dma_desc_array_phys; DCSR(prtd->dma_ch) |= DCSR_RUN; break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: DCSR(prtd->dma_ch) &= ~DCSR_RUN; dvfm_enable_lowpower(pxa95x_ssp_dvfm_idx); break; default: ret = -EINVAL; } return ret; }
static int pxa168fb_release(struct fb_info *fi, int user) { struct pxa168fb_info *fbi = (struct pxa168fb_info *)fi->par; struct fb_var_screeninfo *var = &fi->var; u32 mask; pr_info("%s Video layer, fbi %d opened %d times ----\n", __func__, fbi->id, atomic_read(&fbi->op_count)); /* Force Video DMA engine off at release and reset the DMA format.*/ if (atomic_dec_and_test(&fbi->op_count)) { pxa688_vdma_release(fbi->id, fbi->vid); mask = CFG_DMA_ENA_MASK | CFG_DMAFORMAT_MASK; dma_ctrl_set(fbi->id, 0, mask, 0); pxa688fb_vsmooth_set(fbi->id, 1, 0); } /* Turn off compatibility mode */ var->nonstd &= ~0xff000000; fbi->compat_mode = 0; /* make sure graphics layer is enabled */ enable_graphic_layer(fbi->id); /* clear buffer list. */ clear_buffer(fbi); /* clear some globals */ memset(&fbi->surface, 0, sizeof(struct _sOvlySurface)); fbi->surface.videoMode = -1; fbi->active = fbi->dma_on = 0; #ifdef OVLY_DVFM_CONSTRAINT dvfm_enable_lowpower(dvfm_dev_idx); #endif return 0; }