static WRITE32_HANDLER( control_w )
{
UINT32 old = control_data;
// bit $80000000 = BSMT access/ROM read
// bit $20000000 = toggled every 64 IRQ4's
// bit $10000000 = ????
// bit $00800000 = EEPROM data
// bit $00400000 = EEPROM clock
// bit $00200000 = EEPROM enable (on 1)
COMBINE_DATA(&control_data);
/* handle EEPROM I/O */
if (ACCESSING_BITS_16_23)
{
eeprom_write_bit(data & 0x00800000);
eeprom_set_cs_line((data & 0x00200000) ? CLEAR_LINE : ASSERT_LINE);
eeprom_set_clock_line((data & 0x00400000) ? ASSERT_LINE : CLEAR_LINE);
}
/* toggling BSMT off then on causes a reset */
if (!(old & 0x80000000) && (control_data & 0x80000000))
{
const device_config *device = devtag_get_device(space->machine, "bsmt");
bsmt2000_data_w(device, bsmt_data_bank, 0, 0xffff);
device_reset(device);
}
/* log any unknown bits */
if (data & 0x4f1fffff)
logerror("%08X: control_w = %08X & %08X\n", cpu_get_previouspc(space->cpu), data, mem_mask);
}
static WRITE32_HANDLER( control_w )
{
policetr_state *state = space->machine().driver_data<policetr_state>();
UINT32 old = state->m_control_data;
// bit $80000000 = BSMT access/ROM read
// bit $20000000 = toggled every 64 IRQ4's
// bit $10000000 = ????
// bit $00800000 = EEPROM data
// bit $00400000 = EEPROM clock
// bit $00200000 = EEPROM enable (on 1)
COMBINE_DATA(&state->m_control_data);
/* handle EEPROM I/O */
if (ACCESSING_BITS_16_23)
{
device_t *device = space->machine().device("eeprom");
eeprom_write_bit(device, data & 0x00800000);
eeprom_set_cs_line(device, (data & 0x00200000) ? CLEAR_LINE : ASSERT_LINE);
eeprom_set_clock_line(device, (data & 0x00400000) ? ASSERT_LINE : CLEAR_LINE);
}
/* toggling BSMT off then on causes a reset */
if (!(old & 0x80000000) && (state->m_control_data & 0x80000000))
{
bsmt2000_device *bsmt = space->machine().device<bsmt2000_device>("bsmt");
bsmt->reset();
}
/* log any unknown bits */
if (data & 0x4f1fffff)
logerror("%08X: control_w = %08X & %08X\n", cpu_get_previouspc(&space->device()), data, mem_mask);
}
static WRITE16_DEVICE_HANDLER( eeprom_w )
{
if( ACCESSING_BITS_0_7 )
{
eeprom_write_bit(device, data & 0x01);
eeprom_set_cs_line(device, (data & 0x02) ? CLEAR_LINE : ASSERT_LINE );
eeprom_set_clock_line(device, (data & 0x04) ? ASSERT_LINE : CLEAR_LINE );
}
}
/*
static emu_file *jaguar_nvram_fopen( running_machine &machine, UINT32 openflags)
{
device_image_interface *image = dynamic_cast<device_image_interface *>(machine.device("cart"));
astring *fname;
file_error filerr;
emu_file *file;
if (image->exists())
{
fname = astring_assemble_4( astring_alloc(), machine.system().name, PATH_SEPARATOR, image->basename_noext(), ".nv");
filerr = mame_fopen( SEARCHPATH_NVRAM, astring_c( fname), openflags, &file);
astring_free( fname);
return (filerr == FILERR_NONE) ? file : NULL;
}
else
return NULL;
}
static void jaguar_nvram_load(running_machine &machine)
{
emu_file *nvram_file = NULL;
device_t *device;
for (device = machine.m_devicelist.first(); device != NULL; device = device->next())
{
device_nvram_func nvram = (device_nvram_func)device->get_config_fct(DEVINFO_FCT_NVRAM);
if (nvram != NULL)
{
if (nvram_file == NULL)
nvram_file = jaguar_nvram_fopen(machine, OPEN_FLAG_READ);
(*nvram)(device, nvram_file, 0);
}
}
if (nvram_file != NULL)
mame_fclose(nvram_file);
}
static void jaguar_nvram_save(running_machine &machine)
{
emu_file *nvram_file = NULL;
device_t *device;
for (device = machine.m_devicelist.first(); device != NULL; device = device->next())
{
device_nvram_func nvram = (device_nvram_func)device->get_config_fct(DEVINFO_FCT_NVRAM);
if (nvram != NULL)
{
if (nvram_file == NULL)
nvram_file = jaguar_nvram_fopen(machine, OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS);
// check nvram_file to avoid crash when no image is mounted or cannot be created
if (nvram_file)
(*nvram)(device, nvram_file, 1);
}
}
if (nvram_file != NULL)
mame_fclose(nvram_file);
}
static NVRAM_HANDLER( jaguar )
{
if (read_or_write) {
jaguar_nvram_save(machine);
}
else
{
if (file)
jaguar_nvram_load(machine);
}
}
*/
static WRITE32_HANDLER( jaguar_eeprom_w )
{
device_t *eeprom = space->machine().device("eeprom");
eeprom_bit_count++;
if (eeprom_bit_count != 9) /* kill extra bit at end of address */
{
eeprom_write_bit(eeprom,data >> 31);
eeprom_set_clock_line(eeprom,PULSE_LINE);
}
static WRITE32_HANDLER( avengrs_eprom_w )
{
if (ACCESSING_BITS_8_15) {
UINT8 ebyte=(data>>8)&0xff;
// if (ebyte&0x80) {
eeprom_set_clock_line((ebyte & 0x2) ? ASSERT_LINE : CLEAR_LINE);
eeprom_write_bit(ebyte & 0x1);
eeprom_set_cs_line((ebyte & 0x4) ? CLEAR_LINE : ASSERT_LINE);
// }
}
else if (ACCESSING_BITS_0_7) {
static WRITE16_HANDLER( inufuku_eeprom_w )
{
// latch the bit
eeprom_write_bit(data & 0x0800);
// reset line asserted: reset.
eeprom_set_cs_line((data & 0x2000) ? CLEAR_LINE : ASSERT_LINE);
// clock line asserted: write latch or select next bit to read
eeprom_set_clock_line((data & 0x1000) ? ASSERT_LINE : CLEAR_LINE);
}
static WRITE16_DEVICE_HANDLER( pntnpuzl_eeprom_w )
{
pntnpuzl_eeprom = data;
/* bit 12 is data */
/* bit 13 is clock (active high) */
/* bit 14 is cs (active high) */
eeprom_write_bit(device, data & 0x1000);
eeprom_set_cs_line(device, (data & 0x4000) ? CLEAR_LINE : ASSERT_LINE);
eeprom_set_clock_line(device, (data & 0x2000) ? ASSERT_LINE : CLEAR_LINE);
}
static WRITE32_HANDLER( simpl156_eeprom_w )
{
simpl156_state *state = space->machine->driver_data<simpl156_state>();
//int okibank;
//okibank = data & 0x07;
state->okimusic->set_bank_base(0x40000 * (data & 0x7));
eeprom_set_clock_line(state->eeprom, BIT(data, 5) ? ASSERT_LINE : CLEAR_LINE);
eeprom_write_bit(state->eeprom, BIT(data, 4));
eeprom_set_cs_line(state->eeprom, BIT(data, 6) ? CLEAR_LINE : ASSERT_LINE);
}
static WRITE16_DEVICE_HANDLER(galpani2_eeprom_w)
{
COMBINE_DATA( &eeprom_word );
if ( ACCESSING_BITS_0_7 )
{
// latch the bit
eeprom_write_bit(device, data & 0x02);
// reset line asserted: reset.
eeprom_set_cs_line(device, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE );
// clock line asserted: write latch or select next bit to read
eeprom_set_clock_line(device, (data & 0x04) ? ASSERT_LINE : CLEAR_LINE );
}
}
static WRITE16_HANDLER( othunder_tc0220ioc_w )
{
othunder_state *state = space->machine().driver_data<othunder_state>();
if (ACCESSING_BITS_0_7)
{
switch (offset)
{
case 0x03:
/* 0000000x SOL-1 (gun solenoid)
000000x0 SOL-2 (gun solenoid)
00000x00 OBPRI (sprite priority)
0000x000 (unused)
000x0000 eeprom reset (active low)
00x00000 eeprom clock
0x000000 eeprom in data
x0000000 eeprom out data */
/* Recoil Piston Motor Status */
output_set_value("Player1_Recoil_Piston", data & 0x1 );
output_set_value("Player2_Recoil_Piston", (data & 0x2) >>1 );
if (data & 4)
popmessage("OBPRI SET!");
eeprom_write_bit(state->m_eeprom, data & 0x40);
eeprom_set_clock_line(state->m_eeprom, (data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
eeprom_set_cs_line(state->m_eeprom, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
break;
default:
tc0220ioc_w(state->m_tc0220ioc, offset, data & 0xff);
}
}
}
static WRITE8_HANDLER( eeprom_clockline_w )
{
// clock line asserted: write latch or select next bit to read
eeprom_set_clock_line((data & 0x01) ? ASSERT_LINE : CLEAR_LINE );
}
static WRITE16_DEVICE_HANDLER( eeprom_serial_clock_w )
{
/* bit 0 is SK (active high) */
eeprom_set_clock_line(device, (data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
}