static int ehci_atmel_probe(struct udevice *dev)
{
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
fdt_addr_t hcd_base;
int ret;
ret = ehci_atmel_enable_clk(dev);
if (ret) {
debug("Failed to enable USB Host clock\n");
return ret;
}
/*
* Get the base address for EHCI controller from the device node
*/
hcd_base = devfdt_get_addr(dev);
if (hcd_base == FDT_ADDR_T_NONE) {
debug("Can't get the EHCI register base address\n");
return -ENXIO;
}
hccr = (struct ehci_hccr *)hcd_base;
hcor = (struct ehci_hcor *)
((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
debug("echi-atmel: init hccr %x and hcor %x hc_length %d\n",
(u32)hccr, (u32)hcor,
(u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
}
static int imx_chipidea_probe(struct device_d *dev)
{
struct imxusb_platformdata *pdata = dev->platform_data;
int ret;
void __iomem *base;
struct imx_chipidea *ci;
uint32_t portsc;
ci = xzalloc(sizeof(*ci));
ci->dev = dev;
if (IS_ENABLED(CONFIG_OFDEVICE) && dev->device_node) {
ret = imx_chipidea_probe_dt(ci);
if (ret)
return ret;
} else {
if (!pdata) {
dev_err(dev, "no pdata!\n");
return -EINVAL;
}
ci->portno = dev->id;
ci->flags = pdata->flags;
ci->mode = pdata->mode;
}
base = dev_request_mem_region(dev, 0);
if (!base)
return -ENODEV;
ci->base = base;
ci->data.init = imx_chipidea_port_init;
ci->data.post_init = imx_chipidea_port_post_init;
ci->data.drvdata = ci;
if ((ci->flags & MXC_EHCI_PORTSC_MASK) == MXC_EHCI_MODE_HSIC)
imx_chipidea_port_init(ci);
if (ci->phymode != USBPHY_INTERFACE_MODE_UNKNOWN) {
portsc = readl(base + 0x184);
portsc &= ~MXC_EHCI_PORTSC_MASK;
portsc |= ci->flags & MXC_EHCI_PORTSC_MASK;
writel(portsc, base + 0x184);
}
ci->data.hccr = base + 0x100;
ci->data.hcor = base + 0x140;
ci->data.flags = EHCI_HAS_TT;
if (ci->mode == IMX_USB_MODE_HOST && IS_ENABLED(CONFIG_USB_EHCI)) {
ret = ehci_register(dev, &ci->data);
} else if (ci->mode == IMX_USB_MODE_DEVICE && IS_ENABLED(CONFIG_USB_GADGET_DRIVER_ARC)) {
ret = ci_udc_register(dev, base);
} else {
dev_err(dev, "No supported role\n");
ret = -ENODEV;
}
return ret;
};
static int ehci_usb_probe(struct udevice *dev)
{
struct usb_platdata *plat = dev_get_platdata(dev);
struct usb_ehci *ehci = (struct usb_ehci *)dev_get_addr(dev);
struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
int ret;
priv->ehci = ehci;
priv->portnr = dev->seq;
priv->init_type = plat->init_type;
ret = ehci_mx6_common_init(ehci, priv->portnr);
if (ret)
return ret;
board_ehci_power(priv->portnr, (priv->init_type == USB_INIT_DEVICE) ? 0 : 1);
if (priv->init_type == USB_INIT_HOST) {
setbits_le32(&ehci->usbmode, CM_HOST);
writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);
setbits_le32(&ehci->portsc, USB_EN);
}
mdelay(10);
hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
hcor = (struct ehci_hcor *)((uint32_t)hccr +
HC_LENGTH(ehci_readl(&(hccr)->cr_capbase)));
return ehci_register(dev, hccr, hcor, &mx6_ehci_ops, 0, priv->init_type);
}
static int ehci_usb_probe(struct udevice *dev)
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
struct usb_platdata *plat = dev_get_platdata(dev);
struct ehci_sunxi_priv *priv = dev_get_priv(dev);
struct ehci_hccr *hccr = (struct ehci_hccr *)dev_get_addr(dev);
struct ehci_hcor *hcor;
/*
* This should go away once we've moved to the driver model for
* clocks resp. phys.
*/
priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
#ifdef CONFIG_MACH_SUN8I_H3
priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_OHCI0;
#endif
priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / 0x1000 + 1;
priv->ahb_gate_mask <<= priv->phy_index - 1;
setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
#ifdef CONFIG_SUNXI_GEN_SUN6I
setbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
#endif
sunxi_usb_phy_init(priv->phy_index);
sunxi_usb_phy_power_on(priv->phy_index);
hcor = (struct ehci_hcor *)((uint32_t)hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
}
static int ehci_usb_probe(struct udevice *dev)
{
struct usb_platdata *plat = dev_get_platdata(dev);
struct ehci_vf_priv_data *priv = dev_get_priv(dev);
struct usb_ehci *ehci = priv->ehci;
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
int ret;
ret = ehci_vf_common_init(ehci, priv->portnr);
if (ret)
return ret;
if (priv->init_type != plat->init_type)
return -ENODEV;
if (priv->init_type == USB_INIT_HOST) {
setbits_le32(&ehci->usbmode, CM_HOST);
writel((PORT_PTS_UTMI | PORT_PTS_PTW), &ehci->portsc);
setbits_le32(&ehci->portsc, USB_EN);
}
mdelay(10);
hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
hcor = (struct ehci_hcor *)((uint32_t)hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
return ehci_register(dev, hccr, hcor, &vf_ehci_ops, 0, priv->init_type);
}
static int ehci_pci_probe(struct udevice *dev)
{
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
ehci_pci_common_init(pci_get_bdf(dev), &hccr, &hcor);
return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
}
static int imx_chipidea_probe(struct device_d *dev)
{
struct imxusb_platformdata *pdata = dev->platform_data;
int ret;
void __iomem *base;
struct ehci_data data = {};
uint32_t portsc;
if (!pdata) {
dev_err(dev, "no pdata!\n");
return -EINVAL;
}
base = dev_request_mem_region(dev, 0);
if (!base)
return -ENODEV;
data.init = imx_chipidea_port_init;
data.post_init = imx_chipidea_port_post_init;
data.drvdata = dev;
portsc = readl(base + 0x184);
portsc &= ~MXC_EHCI_PORTSC_MASK;
portsc |= pdata->flags & MXC_EHCI_PORTSC_MASK;
writel(portsc, base + 0x184);
imx_chipidea_port_init(dev);
if ((pdata->flags & MXC_EHCI_PORTSC_MASK) == MXC_EHCI_MODE_ULPI) {
dev_dbg(dev, "using ULPI phy\n");
if (IS_ENABLED(CONFIG_USB_ULPI)) {
ret = ulpi_setup(base + 0x170, 1);
} else {
dev_err(dev, "no ULPI support available\n");
ret = -ENODEV;
}
if (ret)
return ret;
}
data.hccr = base + 0x100;
data.hcor = base + 0x140;
data.flags = EHCI_HAS_TT;
if (pdata->mode == IMX_USB_MODE_HOST && IS_ENABLED(CONFIG_USB_EHCI)) {
ret = ehci_register(dev, &data);
} else if (pdata->mode == IMX_USB_MODE_DEVICE && IS_ENABLED(CONFIG_USB_GADGET_DRIVER_ARC)) {
ret = ci_udc_register(dev, base);
} else {
dev_err(dev, "No supported role\n");
ret = -ENODEV;
}
return ret;
};
static int ehci_usb_probe(struct udevice *dev)
{
struct ehci_hccr *hccr = (struct ehci_hccr *)dev_get_addr(dev);
struct ehci_hcor *hcor;
hcor = (struct ehci_hcor *)((uintptr_t)hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
}
static int ehci_usb_probe(struct udevice *dev)
{
struct msm_ehci_priv *p = dev_get_priv(dev);
struct usb_ehci *ehci = p->ehci;
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
int ret;
hccr = (struct ehci_hccr *)((phys_addr_t)&ehci->caplength);
hcor = (struct ehci_hcor *)((phys_addr_t)hccr +
HC_LENGTH(ehci_readl(&(hccr)->cr_capbase)));
ret = board_prepare_usb(USB_INIT_HOST);
if (ret < 0)
return ret;
return ehci_register(dev, hccr, hcor, &msm_ehci_ops, 0, USB_INIT_HOST);
}
static int ehci_zynq_probe(struct udevice *dev)
{
struct usb_platdata *plat = dev_get_platdata(dev);
struct zynq_ehci_priv *priv = dev_get_priv(dev);
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
struct ulpi_viewport ulpi_vp;
/* Used for writing the ULPI data address */
struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
int ret;
hccr = (struct ehci_hccr *)((uint32_t)&priv->ehci->caplength);
hcor = (struct ehci_hcor *)((uint32_t) hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
ulpi_vp.viewport_addr = (u32)&priv->ehci->ulpi_viewpoint;
ulpi_vp.port_num = 0;
ret = ulpi_init(&ulpi_vp);
if (ret) {
puts("zynq ULPI viewport init failed\n");
return -1;
}
/* ULPI set flags */
ulpi_write(&ulpi_vp, &ulpi->otg_ctrl,
ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN |
ULPI_OTG_EXTVBUSIND);
ulpi_write(&ulpi_vp, &ulpi->function_ctrl,
ULPI_FC_FULL_SPEED | ULPI_FC_OPMODE_NORMAL |
ULPI_FC_SUSPENDM);
ulpi_write(&ulpi_vp, &ulpi->iface_ctrl, 0);
/* Set VBus */
ulpi_write(&ulpi_vp, &ulpi->otg_ctrl_set,
ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
}
static int ci_register_role(struct imx_chipidea *ci)
{
int ret;
if (ci->role_registered != IMX_USB_MODE_OTG)
return -EBUSY;
if (ci->mode == IMX_USB_MODE_HOST) {
if (IS_ENABLED(CONFIG_USB_EHCI)) {
ci->role_registered = 1;
ret = regulator_enable(ci->vbus);
if (ret)
return ret;
ret = ehci_register(ci->dev, &ci->data);
if (!ret)
return 0;
regulator_disable(ci->vbus);
} else {
dev_err(ci->dev, "Host support not available\n");
return -ENODEV;
}
}
if (ci->mode == IMX_USB_MODE_DEVICE) {
if (IS_ENABLED(CONFIG_USB_GADGET_DRIVER_ARC)) {
ci->role_registered = 1;
return ci_udc_register(ci->dev, ci->base);
} else {
dev_err(ci->dev, "USB device support not available\n");
return -ENODEV;
}
}
return 0;
}
static int ehci_usb_probe(struct udevice *dev)
{
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
int i;
for (i = 0; ; i++) {
struct clk clk;
int ret;
ret = clk_get_by_index(dev, i, &clk);
if (ret < 0)
break;
if (clk_enable(&clk))
printf("failed to enable clock %d\n", i);
clk_free(&clk);
}
hccr = map_physmem(dev_get_addr(dev), 0x100, MAP_NOCACHE);
hcor = (struct ehci_hcor *)((uintptr_t)hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
}
static int ehci_usb_probe(struct udevice *dev)
{
struct generic_ehci *priv = dev_get_priv(dev);
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
int i, err, ret, clock_nb, reset_nb;
err = 0;
priv->clock_count = 0;
clock_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), "clocks",
"#clock-cells");
if (clock_nb > 0) {
priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
GFP_KERNEL);
if (!priv->clocks)
return -ENOMEM;
for (i = 0; i < clock_nb; i++) {
err = clk_get_by_index(dev, i, &priv->clocks[i]);
if (err < 0)
break;
err = clk_enable(&priv->clocks[i]);
if (err) {
pr_err("failed to enable clock %d\n", i);
clk_free(&priv->clocks[i]);
goto clk_err;
}
priv->clock_count++;
}
} else {
if (clock_nb != -ENOENT) {
pr_err("failed to get clock phandle(%d)\n", clock_nb);
return clock_nb;
}
}
priv->reset_count = 0;
reset_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), "resets",
"#reset-cells");
if (reset_nb > 0) {
priv->resets = devm_kcalloc(dev, reset_nb,
sizeof(struct reset_ctl),
GFP_KERNEL);
if (!priv->resets)
return -ENOMEM;
for (i = 0; i < reset_nb; i++) {
err = reset_get_by_index(dev, i, &priv->resets[i]);
if (err < 0)
break;
if (reset_deassert(&priv->resets[i])) {
pr_err("failed to deassert reset %d\n", i);
reset_free(&priv->resets[i]);
goto reset_err;
}
priv->reset_count++;
}
} else {
if (reset_nb != -ENOENT) {
pr_err("failed to get reset phandle(%d)\n", reset_nb);
goto clk_err;
}
}
err = generic_phy_get_by_index(dev, 0, &priv->phy);
if (err) {
if (err != -ENOENT) {
pr_err("failed to get usb phy\n");
goto reset_err;
}
} else {
err = generic_phy_init(&priv->phy);
if (err) {
pr_err("failed to init usb phy\n");
goto reset_err;
}
}
hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
hcor = (struct ehci_hcor *)((uintptr_t)hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
err = ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
if (err)
goto phy_err;
return 0;
phy_err:
if (generic_phy_valid(&priv->phy)) {
ret = generic_phy_exit(&priv->phy);
if (ret)
pr_err("failed to release phy\n");
}
reset_err:
ret = reset_release_all(priv->resets, priv->reset_count);
if (ret)
pr_err("failed to assert all resets\n");
clk_err:
ret = clk_release_all(priv->clocks, priv->clock_count);
if (ret)
pr_err("failed to disable all clocks\n");
return err;
}
