void nxtCanvasWidget::paste_from_clipboard(){
if( clipboard ){
selection.setWidth( clipboard->get_width() );
selection.setHeight( clipboard->get_height() );
//Init tool
active_tool = current_tool = TOOL_BITMAP;
enable_buffer();
action( EVENT_MOUSE_DOWN );
}
}
void nxtCanvasWidget::mousePressEvent( QMouseEvent *event ){
if( mouse_active ){
stop_drawing();
return;
}
active_tool = current_tool;
//Set modifiers
key_control = event->modifiers() & Qt::ControlModifier;
key_shift = event->modifiers() & Qt::ShiftModifier;
set_options_fill( key_shift );
set_options_inverted( false ); //Just to be safe, turn it off if wrong
//Check which button caused the event
if( event->button() & Qt::LeftButton ){
}
else if( event->button() & Qt::MidButton )
active_tool = TOOL_MOVE; //Go into move mode
else if( event->button() & Qt::RightButton )
set_options_inverted( true ); //Invert the CopyOptions
else{
//We do not handle this event
event->ignore();
return;
}
//Make sure to start correctly if canvas is empty
if( canvas && canvas->get_width() == 0 && canvas->get_height() == 0 ){
pos_x = pos_y = 0;
QPoint offset = pos_to_point( event->pos() );
pos_x = offset.x();
pos_y = offset.y();
}
mouse_start = pos_to_point( event->pos() );
mouse_current = mouse_start;
mouse_last = mouse_start;
mouse_active = true;
enable_buffer();
action( EVENT_MOUSE_DOWN );
}
static void init_controller(void)
{
/**
* TODO: initialize WfmRef and Samples Buffer
*/
init_ps_module(&g_ipc_ctom.ps_module[0],
g_ipc_mtoc.ps_module[0].ps_status.bit.model,
&turn_on, &turn_off, &isr_soft_interlock,
&isr_hard_interlock, &reset_interlocks);
init_ps_module(&g_ipc_ctom.ps_module[1],
g_ipc_mtoc.ps_module[1].ps_status.bit.model,
&turn_on, &turn_off, &isr_soft_interlock,
&isr_hard_interlock, &reset_interlocks);
g_ipc_ctom.ps_module[2].ps_status.all = 0;
g_ipc_ctom.ps_module[3].ps_status.all = 0;
init_ipc();
init_control_framework(&g_controller_ctom);
/*************************************/
/** INITIALIZATION OF DSP FRAMEWORK **/
/*************************************/
/**
* name: SRLIM_V_CAPBANK_REFERENCE
* description: Capacitor bank voltage reference slew-rate limiter
* DP class: DSP_SRLim
* in: V_CAPBANK_SETPOINT
* out: V_CAPBANK_REFERENCE
*/
init_dsp_srlim(SRLIM_V_CAPBANK_REFERENCE, MAX_REF_SLEWRATE,
CONTROLLER_FREQ_SAMP, &V_CAPBANK_SETPOINT,
&V_CAPBANK_REFERENCE);
init_controller_module_A();
init_controller_module_B();
/***********************************************/
/** INITIALIZATION OF SIGNAL GENERATOR MODULE **/
/***********************************************/
disable_siggen(&SIGGEN);
init_siggen(&SIGGEN, CONTROLLER_FREQ_SAMP, &V_CAPBANK_REFERENCE);
cfg_siggen(&SIGGEN, g_ipc_mtoc.siggen.type, g_ipc_mtoc.siggen.num_cycles,
g_ipc_mtoc.siggen.freq, g_ipc_mtoc.siggen.amplitude,
g_ipc_mtoc.siggen.offset, g_ipc_mtoc.siggen.aux_param);
/**
* name: SRLIM_SIGGEN_AMP
* description: Signal generator amplitude slew-rate limiter
* DP class: DSP_SRLim
* in: g_ipc_mtoc.siggen.amplitude
* out: g_ipc_ctom.siggen.amplitude
*/
init_dsp_srlim(SRLIM_SIGGEN_AMP, MAX_SR_SIGGEN_AMP,
CONTROLLER_FREQ_SAMP, &g_ipc_mtoc.siggen.amplitude,
&g_ipc_ctom.siggen.amplitude);
/**
* name: SRLIM_SIGGEN_OFFSET
* description: Signal generator offset slew-rate limiter
* DP class: DSP_SRLim
* in: g_ipc_mtoc.siggen.offset
* out: g_ipc_ctom.siggen.offset
*/
init_dsp_srlim(SRLIM_SIGGEN_OFFSET, MAX_SR_SIGGEN_OFFSET,
CONTROLLER_FREQ_SAMP, &g_ipc_mtoc.siggen.offset,
&g_ipc_ctom.siggen.offset);
/************************************/
/** INITIALIZATION OF TIME SLICERS **/
/************************************/
/**
* Time-slicer for WfmRef sweep decimation
*/
cfg_timeslicer(TIMESLICER_WFMREF, WFMREF_DECIMATION);
/**
* Time-slicer for SamplesBuffer
*/
cfg_timeslicer(TIMESLICER_BUFFER, BUFFER_DECIMATION);
/**
* Time-slicer for controller
*/
cfg_timeslicer(TIMESLICER_CONTROLLER,
CONTROLLER_DECIMATION);
init_buffer(BUF_SAMPLES, &g_buf_samples_ctom, SIZE_BUF_SAMPLES_CTOM);
enable_buffer(BUF_SAMPLES);
/**
* Reset all internal variables
*/
reset_controller();
}
static void init_controller(void)
{
/**
* TODO: initialize WfmRef and Samples Buffer
*/
init_ps_module(&g_ipc_ctom.ps_module[0],
g_ipc_mtoc.ps_module[0].ps_status.bit.model,
&turn_on, &turn_off, &isr_soft_interlock,
&isr_hard_interlock, &reset_interlocks);
g_ipc_ctom.ps_module[1].ps_status.all = 0;
g_ipc_ctom.ps_module[2].ps_status.all = 0;
g_ipc_ctom.ps_module[3].ps_status.all = 0;
init_ipc();
init_control_framework(&g_controller_ctom);
/***********************************************/
/** INITIALIZATION OF SIGNAL GENERATOR MODULE **/
/***********************************************/
disable_siggen(&SIGGEN);
init_siggen(&SIGGEN, ISR_CONTROL_FREQ,
&g_ipc_ctom.ps_module[0].ps_reference);
cfg_siggen(&SIGGEN, g_ipc_mtoc.siggen.type, g_ipc_mtoc.siggen.num_cycles,
g_ipc_mtoc.siggen.freq, g_ipc_mtoc.siggen.amplitude,
g_ipc_mtoc.siggen.offset, g_ipc_mtoc.siggen.aux_param);
/**
* name: SRLIM_SIGGEN_AMP
* description: Signal generator amplitude slew-rate limiter
* DP class: DSP_SRLim
* in: g_ipc_mtoc.siggen.amplitude
* out: g_ipc_ctom.siggen.amplitude
*/
init_dsp_srlim(SRLIM_SIGGEN_AMP, MAX_SR_SIGGEN_AMP, ISR_CONTROL_FREQ,
&g_ipc_mtoc.siggen.amplitude, &g_ipc_ctom.siggen.amplitude);
/**
* name: SRLIM_SIGGEN_OFFSET
* description: Signal generator offset slew-rate limiter
* DP class: DSP_SRLim
* in: g_ipc_mtoc.siggen.offset
* out: g_ipc_ctom.siggen.offset
*/
init_dsp_srlim(SRLIM_SIGGEN_OFFSET, MAX_SR_SIGGEN_OFFSET,
ISR_CONTROL_FREQ, &g_ipc_mtoc.siggen.offset,
&g_ipc_ctom.siggen.offset);
/*************************************************/
/** INITIALIZATION OF LOAD CURRENT CONTROL LOOP **/
/*************************************************/
/**
* name: SRLIM_I_LOAD_REFERENCE
* description: Load current slew-rate limiter
* DP class: DSP_SRLim
* in: I_LOAD_SETPOINT
* out: I_LOAD_REFERENCE
*/
init_dsp_srlim(SRLIM_I_LOAD_REFERENCE, MAX_REF_SLEWRATE, ISR_CONTROL_FREQ,
&I_LOAD_SETPOINT, &I_LOAD_REFERENCE);
/**
* name: ERROR_I_LOAD
* description: Load current reference error
* dsp module: DSP_Error
* +: I_LOAD_REFERENCE
* -: I_LOAD_MEAN
* out: I_LOAD_ERROR
*/
init_dsp_error(ERROR_I_LOAD, &I_LOAD_REFERENCE, &I_LOAD_MEAN, &I_LOAD_ERROR);
/**
* name: PI_CONTROLLER_I_LOAD
* description: Capacitor bank voltage PI controller
* dsp module: DSP_PI
* in: I_LOAD_ERROR
* out: DUTY_CYCLE
*/
init_dsp_pi(PI_CONTROLLER_I_LOAD, KP_I_LOAD, KI_I_LOAD, ISR_CONTROL_FREQ,
PWM_MAX_DUTY, PWM_MIN_DUTY, &I_LOAD_ERROR, &DUTY_CYCLE_MOD_1);
/**
* name: IIR_2P2Z_CONTROLLER_I_LOAD
* description: Load current IIR 2P2Z controller
* DP class: DSP_IIR_2P2Z
* in: net_signals[4]
* out: DUTY_CYCLE
*/
init_dsp_iir_2p2z(IIR_2P2Z_CONTROLLER_I_LOAD,
IIR_2P2Z_CONTROLLER_I_LOAD_COEFFS.b0,
IIR_2P2Z_CONTROLLER_I_LOAD_COEFFS.b1,
IIR_2P2Z_CONTROLLER_I_LOAD_COEFFS.b2,
IIR_2P2Z_CONTROLLER_I_LOAD_COEFFS.a1,
IIR_2P2Z_CONTROLLER_I_LOAD_COEFFS.a2,
PWM_MAX_DUTY, PWM_MIN_DUTY, &I_LOAD_ERROR,
&DUTY_CYCLE_MOD_1);
/************************************/
/** INITIALIZATION OF TIME SLICERS **/
/************************************/
/**
* Time-slicer for WfmRef sweep decimation
*/
cfg_timeslicer(TIMESLICER_WFMREF, WFMREF_DECIMATION);
/**
* Time-slicer for SamplesBuffer
*/
cfg_timeslicer(TIMESLICER_BUFFER, BUFFER_DECIMATION);
/**
* Samples buffer initialization
*/
init_buffer(BUF_SAMPLES, &g_buf_samples_ctom, SIZE_BUF_SAMPLES_CTOM);
enable_buffer(BUF_SAMPLES);
/**
* Reset all internal variables
*/
reset_controller();
}
