void dsp16_device::execute_run()
{
// HACK TO MAKE CPU DO NOTHING.
// REMOVE IF DEVELOPING CPU CORE.
m_icount = 0;
return;
do
{
// debugging
m_ppc = m_pc; // copy PC to previous PC
debugger_instruction_hook(this, m_pc);
// instruction fetch & execute
UINT8 cycles;
UINT8 pcAdvance;
const UINT16 op = opcode_read();
execute_one(op, cycles, pcAdvance);
// step
m_pc += pcAdvance;
m_icount -= cycles;
// The 16 bit PI "shadow" register gets set to PC on each instruction except
// when an interrupt service routine is active (TODO: Interrupt check) (page 2-4)
m_pi = m_pc;
} while (m_icount > 0);
}
void dsp32c_device::execute_run()
{
// skip if halted
if ((m_pcr & PCR_RESET) == 0)
{
m_icount = 0;
return;
}
// update buffered accumulator values
m_abufcycle[0] += m_icount;
m_abufcycle[1] += m_icount;
m_abufcycle[2] += m_icount;
m_abufcycle[3] += m_icount;
// handle interrupts
check_irqs();
while (m_icount > 0)
execute_one();
// normalize buffered accumulator values
m_abufcycle[0] -= m_icount;
m_abufcycle[1] -= m_icount;
m_abufcycle[2] -= m_icount;
m_abufcycle[3] -= m_icount;
}
void m6809_base_device::execute_run()
{
do
{
execute_one();
} while(m_icount > 0);
}
void minx_cpu_device::execute_run()
{
do
{
m_curpc = GET_MINX_PC;
debugger_instruction_hook(this, m_curpc);
if ( m_interrupt_pending )
{
m_halted = 0;
if ( ! ( m_F & 0xc0 ) && m_U == m_V )
{
//logerror("minx_execute(): taking IRQ\n");
PUSH8( m_V );
PUSH16( m_PC );
PUSH8( m_F );
/* Set Interrupt Branch flag */
m_F |= 0x80;
m_V = 0;
m_PC = rd16( standard_irq_callback( 0 ) << 1 );
m_icount -= 28; /* This cycle count is a guess */
}
}
if ( m_halted )
{
m_icount -= insnminx_cycles_CE[0xAE];
}
else
{
execute_one();
}
} while ( m_icount > 0 );
}
static int dsp32c_execute(int cycles)
{
/* skip if halted */
if ((dsp32.pcr & PCR_RESET) == 0)
return cycles;
/* count cycles and interrupt cycles */
dsp32_icount = cycles;
dsp32_icount -= dsp32.interrupt_cycles;
dsp32.interrupt_cycles = 0;
/* update buffered accumulator values */
dsp32.abufcycle[0] += dsp32_icount;
dsp32.abufcycle[1] += dsp32_icount;
dsp32.abufcycle[2] += dsp32_icount;
dsp32.abufcycle[3] += dsp32_icount;
while (dsp32_icount > 0)
execute_one();
dsp32_icount -= dsp32.interrupt_cycles;
dsp32.interrupt_cycles = 0;
/* normalize buffered accumulator values */
dsp32.abufcycle[0] -= dsp32_icount;
dsp32.abufcycle[1] -= dsp32_icount;
dsp32.abufcycle[2] -= dsp32_icount;
dsp32.abufcycle[3] -= dsp32_icount;
return cycles - dsp32_icount;
}
static CPU_EXECUTE( dsp32c )
{
dsp32_state *cpustate = get_safe_token(device);
/* skip if halted */
if ((cpustate->pcr & PCR_RESET) == 0)
return cycles;
/* count cycles and interrupt cycles */
cpustate->icount = cycles;
/* update buffered accumulator values */
cpustate->abufcycle[0] += cpustate->icount;
cpustate->abufcycle[1] += cpustate->icount;
cpustate->abufcycle[2] += cpustate->icount;
cpustate->abufcycle[3] += cpustate->icount;
/* handle interrupts */
check_irqs(cpustate);
while (cpustate->icount > 0)
execute_one(cpustate);
/* normalize buffered accumulator values */
cpustate->abufcycle[0] -= cpustate->icount;
cpustate->abufcycle[1] -= cpustate->icount;
cpustate->abufcycle[2] -= cpustate->icount;
cpustate->abufcycle[3] -= cpustate->icount;
return cycles - cpustate->icount;
}
static int dsp56k_execute(int cycles)
{
/* skip if halted */
if (LINE_RESET)
return cycles;
dsp56k_icount = cycles;
dsp56k_icount -= dsp56k.interrupt_cycles;
dsp56k.interrupt_cycles = 0;
while(dsp56k_icount > 0)
execute_one() ;
dsp56k_icount -= dsp56k.interrupt_cycles;
dsp56k.interrupt_cycles = 0;
return cycles - dsp56k_icount ;
}
void melps4_cpu_device::execute_run()
{
while (m_icount > 0)
{
// remember previous state
m_prev_op = m_op;
m_prev_pc = m_pc;
// Interrupts are not accepted during skips or LXY, LA, EI, DI, RT/RTS/RTI or any branch.
// Documentation is conflicting here: older docs say that it is allowed during skips,
// newer docs specifically say when interrupts are prohibited.
if (m_possible_irq && !m_prohibit_irq && !m_skip)
{
m_possible_irq = false;
check_interrupt();
}
m_prohibit_irq = false;
// fetch next opcode
debugger_instruction_hook(this, m_pc);
m_icount--;
m_op = m_program->read_word(m_pc << 1) & 0x1ff;
m_bitmask = 1 << (m_op & 3);
m_pc = (m_pc & ~0x7f) | ((m_pc + 1) & 0x7f); // stays in the same page
// handle opcode if it's not skipped
if (m_skip)
{
// if it's a long jump, skip next one as well
if (m_op != m_ba_op && (m_op & ~0xf) != m_sp_mask)
{
m_skip = false;
m_op = 0; // fake nop
}
}
else
execute_one();
}
}
void hp_nanoprocessor_device::execute_run()
{
do {
// Check for interrupts (interrupt line is always enabled. Masking is done
// outside of the NP, usually by ANDing the DC7 line with the interrupt
// request signal)
if (BIT(m_flags , NANO_I_BIT)) {
m_reg_ISR = m_reg_PA;
m_reg_PA = (uint16_t)(standard_irq_callback(0) & 0xff);
dc_clr(HP_NANO_IE_DC);
// Vector fetching takes 1 cycle
m_icount -= 1;
} else {
debugger_instruction_hook(this , m_reg_PA);
uint8_t opcode = fetch();
execute_one(opcode);
// All opcodes execute in 2 cycles
m_icount -= 2;
}
} while (m_icount > 0);
}
