void __init exynos5_arndale_octa_display_init(void)
{
#ifdef CONFIG_FB_MIPI_DSIM
s5p_dsim1_set_platdata(&dsim_platform_data);
#endif
#ifdef CONFIG_S5P_DP
s5p_dp_set_platdata(&arndale_octa_dp_data);
#endif
s5p_fimd1_set_platdata(&arndale_octa_lcd1_pdata);
#ifdef CONFIG_BACKLIGHT_PWM
samsung_bl_set(&arndale_octa_bl_gpio_info, &arndale_octa_bl_data);
#endif
platform_add_devices(arndale_octa_display_devices,
ARRAY_SIZE(arndale_octa_display_devices));
#ifdef CONFIG_S5P_DP
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_fimd", "mout_rpll", 266 * MHZ);
#endif
#ifdef CONFIG_FB_MIPI_DSIM
/* RPLL rate is 300Mhz, 300/5=60Hz */
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_fimd", "mout_fimd1", 67 * MHZ);
#endif
}
void __init exynos5_xyref5260_display_init(void)
{
#ifdef CONFIG_S5P_DP
int irq;
#endif
clk_add_alias("sclk_fimd", "exynos5-fb.1", "sclk_fimd1_128_extclkpl",
&s5p_device_fimd1.dev);
#ifdef CONFIG_FB_MIPI_DSIM
s5p_dsim1_set_platdata(&dsim_platform_data);
#endif
#ifdef CONFIG_S5P_DP
s5p_dp_set_platdata(&xyref5260_dp_data);
#endif
s5p_fimd1_set_platdata(&smdk5260_lcd1_pdata);
#ifdef CONFIG_BACKLIGHT_PWM
samsung_bl_set(&smdk5260_bl_gpio_info, &smdk5260_bl_data);
#endif
platform_add_devices(smdk5260_display_devices,
ARRAY_SIZE(smdk5260_display_devices));
#ifdef CONFIG_S5P_DP
irq = s5p_register_gpio_interrupt(EXYNOS5260_GPK0(0));
if (IS_ERR_VALUE(irq)) {
pr_err("%s: Failed to configure GPK0(0) GPIO\n", __func__);
return;
}
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_fimd", "sclk_disp_pixel", 267 * MHZ);
#endif
#ifdef CONFIG_FB_MIPI_DSIM
/* RPLL rate is 300Mhz, 300/5=60Hz */
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_fimd", "sclk_disp_pixel", 266 * MHZ);
#endif
}
void __init exynos5_universal5410_display_init(void)
{
struct resource *res;
#if defined(CONFIG_LCD_MIPI_S6E8FA0)
unsigned int lcd_id = lcdtype & 0xF;
if (!gpio_get_value(GPIO_OLED_ID)) {
dsim_info.dsim_ddi_pd = &ea8062_mipi_lcd_driver;
pr_err("panel M\n");
} else {
if (lcd_id == 1 || lcd_id == 2) {
dsim_info.dsim_ddi_pd = &s6e8fa0_mipi_lcd_driver;
pr_err("panel A,B,C\n");
} else if (lcd_id == 3 || lcd_id == 4) {
dsim_info.dsim_ddi_pd = &s6e8fa0_6P_mipi_lcd_driver;
pr_err("panel D,E,F\n");
} else if (lcd_id == 5 || lcd_id == 6) {
dsim_info.dsim_ddi_pd = &s6e8fa0_G_mipi_lcd_driver;
pr_err("panel G\n");
} else if (lcd_id == 7) {
dsim_info.dsim_ddi_pd = &s6e8fa0_I_mipi_lcd_driver;
pr_err("panel I\n");
} else {
dsim_info.dsim_ddi_pd = &s6e8fa0_I_mipi_lcd_driver;
pr_err("panel select fail\n");
}
}
#elif defined(CONFIG_LCD_MIPI_S6E3FA0)
dsim_info.dsim_ddi_pd = &s6e3fa0_mipi_lcd_driver;
#endif
#ifdef CONFIG_FB_MIPI_DSIM
s5p_dsim1_set_platdata(&dsim_platform_data);
#endif
s5p_fimd1_set_platdata(&universal5410_lcd1_pdata);
#ifdef CONFIG_FB_S5P_EXTDSP
s3cfb_extdsp_set_platdata(&default_extdsp_data);
#endif
platform_add_devices(universal5410_display_devices,
ARRAY_SIZE(universal5410_display_devices));
#ifdef CONFIG_FB_MIPI_DSIM
#if defined(CONFIG_LCD_MIPI_S6E8FA0) || defined(CONFIG_LCD_MIPI_S6E3FA0)
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_fimd", "mout_mpll_bpll", 134 * MHZ);
#endif
#endif
#ifdef CONFIG_FB_S5P_MDNIE
keep_lcd_clk(&s5p_device_fimd1.dev);
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_mdnie", "mout_mpll_bpll", 134 * MHZ);
mdnie_device_register();
#endif
#if defined(CONFIG_FB_LCD_FREQ_SWITCH)
lcdfreq_device_register();
#endif
res = platform_get_resource(&s5p_device_fimd1, IORESOURCE_MEM, 1);
if (res) {
res->start = bootloaderfb_start;
res->end = res->start + bootloaderfb_size - 1;
pr_info("bootloader fb located at %8X-%8X\n", res->start, res->end);
} else {
pr_err("failed to find bootloader fb resource\n");
}
}
void __init exynos5_universal5420_display_init(void)
{
struct resource *res;
struct clk *mout_mdnie1;
struct clk *mout_mpll;
#ifdef CONFIG_FB_MIPI_DSIM
s5p_dsim1_set_platdata(&dsim_platform_data);
#endif
#ifdef CONFIG_S5P_DP
s5p_dp_set_platdata(&universal5420_dp_data);
#endif
s5p_fimd1_set_platdata(&universal5420_lcd1_pdata);
#ifdef CONFIG_BACKLIGHT_PWM
samsung_bl_set(&universal5420_bl_gpio_info, &smdk5420_bl_data);
#endif
platform_add_devices(universal5420_display_devices,
ARRAY_SIZE(universal5420_display_devices));
#ifdef CONFIG_S5P_DP
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_fimd", "mout_mpll_bpll", 267 * MHZ);
#endif
mout_mdnie1 = clk_get(NULL, "mout_mdnie1");
if ((IS_ERR(mout_mdnie1)))
pr_err("Can't get clock[%s]\n", "mout_mdnie1");
mout_mpll = clk_get(NULL, "mout_mpll");
if ((IS_ERR(mout_mpll)))
pr_err("Can't get clock[%s]\n", "mout_mpll");
if (mout_mdnie1 && mout_mpll)
clk_set_parent(mout_mdnie1, mout_mpll);
if (mout_mdnie1)
clk_put(mout_mdnie1);
if (mout_mpll)
clk_put(mout_mpll);
#ifdef CONFIG_FB_MIPI_DSIM
#if defined(CONFIG_LCD_MIPI_S6E8FA0) || defined(CONFIG_LCD_MIPI_S6E3FA0)
#if defined(CONFIG_FB_I80IF) && !defined(CONFIG_FB_S5P_MDNIE)
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_fimd", "mout_mdnie1", 266 * MHZ);
#else
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_fimd", "mout_mdnie1", 133 * MHZ);
#endif
#else
/* RPLL rate is 300Mhz, 300/5=60Hz */
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_fimd", "mout_rpll", 67 * MHZ);
#endif
#endif
#ifdef CONFIG_FB_S5P_MDNIE
keep_lcd_clk(&s5p_device_fimd1.dev);
#if defined(CONFIG_LCD_MIPI_S6E8FA0) || defined(CONFIG_LCD_MIPI_S6E3FA0)
#ifdef CONFIG_FB_I80IF
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_mdnie", "mout_mdnie1", 266 * MHZ);
#else
exynos5_fimd1_setup_clock(&s5p_device_fimd1.dev,
"sclk_mdnie", "mout_mdnie1", 133 * MHZ);
#endif
#endif
mdnie_device_register();
#endif
res = platform_get_resource(&s5p_device_fimd1, IORESOURCE_MEM, 1);
if (res) {
res->start = bootloaderfb_start;
res->end = res->start + bootloaderfb_size - 1;
pr_info("bootloader fb located at %8X-%8X\n", res->start, res->end);
} else {
pr_err("failed to find bootloader fb resource\n");
}
}
