int fdtdec_get_child_count(const void *blob, int node) { int subnode; int num = 0; fdt_for_each_subnode(subnode, blob, node) num++; return num; }
static int fsl_qspi_ofdata_to_platdata(struct udevice *bus) { struct reg_data { u32 addr; u32 size; } regs_data[2]; struct fsl_qspi_platdata *plat = bus->platdata; const void *blob = gd->fdt_blob; int node = bus->of_offset; int ret, flash_num = 0, subnode; if (fdtdec_get_bool(blob, node, "big-endian")) plat->flags |= QSPI_FLAG_REGMAP_ENDIAN_BIG; ret = fdtdec_get_int_array(blob, node, "reg", (u32 *)regs_data, sizeof(regs_data)/sizeof(u32)); if (ret) { debug("Error: can't get base addresses (ret = %d)!\n", ret); return -ENOMEM; } /* Count flash numbers */ fdt_for_each_subnode(blob, subnode, node) ++flash_num; if (flash_num == 0) { debug("Error: Missing flashes!\n"); return -ENODEV; } plat->speed_hz = fdtdec_get_int(blob, node, "spi-max-frequency", FSL_QSPI_DEFAULT_SCK_FREQ); plat->num_chipselect = fdtdec_get_int(blob, node, "num-cs", FSL_QSPI_MAX_CHIPSELECT_NUM); plat->reg_base = regs_data[0].addr; plat->amba_base = regs_data[1].addr; plat->amba_total_size = regs_data[1].size; plat->flash_num = flash_num; debug("%s: regs=<0x%x> <0x%x, 0x%x>, max-frequency=%d, endianess=%s\n", __func__, plat->reg_base, plat->amba_base, plat->amba_total_size, plat->speed_hz, plat->flags & QSPI_FLAG_REGMAP_ENDIAN_BIG ? "be" : "le" ); return 0; }
void dump_tree(const char *dtb, int node, int parent, int indent) { const char *node_name = fdt_get_name(dtb, node, NULL); const char *compat = fdt_getprop(dtb, node, "compatible", NULL); if(node_name) { for(int i = 0; i < indent; i++) printf(" "); printf(node_name); if(compat) printf("(%s)", compat); printf(" "); parse_reg(dtb, node, parent, dump_cb); printf("\n"); } int subnode; fdt_for_each_subnode(subnode, dtb, node) dump_tree(dtb, subnode, node, indent + 1); }