void __cpuinit platform_secondary_init(unsigned int cpu) { printk(KERN_CRIT "Slave cpu init\n"); mt_gic_secondary_init(); HOTPLUG_INFO("platform_secondary_init, cpu: %d\n", cpu); pen_release = -1; smp_wmb(); #ifdef CONFIG_LOCAL_WDT printk("[WDK]cpu %d plug on platform_secondary_init++++++\n", cpu); wk_start_kick_cpu_hotplug(cpu); mtk_wdt_restart(WK_WDT_LOC_TYPE); mtk_wdt_restart(WK_WDT_EXT_TYPE); printk("[WDK]cpu %d plug on platform_secondary_init------\n", cpu); #endif fiq_glue_resume(); /* * Synchronise with the boot thread. */ spin_lock(&boot_lock); spin_unlock(&boot_lock); }
void __cpuinit mt_smp_secondary_init(unsigned int cpu) { #if 0 struct wd_api *wd_api = NULL; //fix build error get_wd_api(&wd_api); if (wd_api) wd_api->wd_cpu_hot_plug_on_notify(cpu); #endif pr_debug("Slave cpu init\n"); HOTPLUG_INFO("platform_secondary_init, cpu: %d\n", cpu); mt_gic_secondary_init(); /* * let the primary processor know we're out of the * pen, then head off into the C entry point */ write_pen_release(-1); #if !defined (CONFIG_ARM_PSCI) //cannot enable in secure world fiq_glue_resume(); #endif //#if !defined (CONFIG_ARM_PSCI) /* * Synchronise with the boot thread. */ spin_lock(&boot_lock); spin_unlock(&boot_lock); }
void __cpuinit platform_secondary_init(unsigned int cpu) { /* * if any interrupts are already enabled for the primary * core (e.g. timer irq), then they will not have been enabled * for us: do so */ gic_secondary_init(0); #ifdef CONFIG_FIQ gic_secondary_init_non_secure(); fiq_glue_resume(); #endif }
static int fiq_glue_cpu_pm_notify(struct notifier_block *self, unsigned long cmd, void *v) { switch (cmd) { case CPU_PM_ENTER: //pr_info("cpu pm enter %d\n", smp_processor_id()); local_fiq_disable(); break; case CPU_PM_ENTER_FAILED: case CPU_PM_EXIT: fiq_glue_resume(); local_fiq_enable(); //pr_info("cpu pm exit %d\n", smp_processor_id()); break; } return NOTIFY_OK; }
static void fiq_glue_syscore_resume(void) { fiq_glue_resume(); local_fiq_enable(); }
static int s3c_pm_enter(suspend_state_t state) { static unsigned long regs_save[16]; unsigned int gpio; /* ensure the debug is initialised (if enabled) */ s3c_pm_debug_init(); S3C_PMDBG("%s(%d)\n", __func__, state); if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__); return -EINVAL; } /* check if we have anything to wake-up with... bad things seem * to happen if you suspend with no wakeup (system will often * require a full power-cycle) */ if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { printk(KERN_ERR "%s: No wake-up sources!\n", __func__); printk(KERN_ERR "%s: Aborting sleep\n", __func__); return -EINVAL; } /* store the physical address of the register recovery block */ s3c_sleep_save_phys = virt_to_phys(regs_save); S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys); /* save all necessary core registers not covered by the drivers */ #if 0 /* control power of moviNAND at PM and add 700ms delay for stabilization of moviNAND. */ gpio = readl(S5PV210_GPJ2DAT); writel(gpio & (~0x80), S5PV210_GPJ2DAT); mdelay(700); #endif s3c_pm_save_gpios(); s3c_pm_save_uarts(); s3c_pm_save_core(); config_sleep_gpio(); /* set the irq configuration for wake */ s3c_pm_configure_extint(); S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n", s3c_irqwake_intmask, s3c_irqwake_eintmask); s3c_pm_arch_prepare_irqs(); /* call cpu specific preparation */ pm_cpu_prep(); /* flush cache back to ram */ flush_cache_all(); s3c_pm_check_store(); /* clear wakeup_stat register for next wakeup reason */ __raw_writel(__raw_readl(S5P_WAKEUP_STAT), S5P_WAKEUP_STAT); /* send the cpu to sleep... */ s3c_pm_arch_stop_clocks(); /* s3c_cpu_save will also act as our return point from when * we resume as it saves its own register state and restores it * during the resume. */ pmstats->sleep_count++; pmstats->sleep_freq = __raw_readl(S5P_CLK_DIV0); s3c_cpu_save(regs_save); pmstats->wake_count++; pmstats->wake_freq = __raw_readl(S5P_CLK_DIV0); /* restore the cpu state using the kernel's cpu init code. */ cpu_init(); fiq_glue_resume(); local_fiq_enable(); s3c_pm_restore_core(); s3c_pm_restore_uarts(); s3c_pm_restore_gpios(); s5pv210_restore_eint_group(); s3c_pm_debug_init(); /* restore the system state */ if (pm_cpu_restore) pm_cpu_restore(); /* check what irq (if any) restored the system */ s3c_pm_arch_show_resume_irqs(); S3C_PMDBG("%s: post sleep, preparing to return\n", __func__); /* LEDs should now be 1110 */ s3c_pm_debug_smdkled(1 << 1, 0); s3c_pm_check_restore(); /* ok, let's return from sleep */ S3C_PMDBG("S3C PM Resume (post-restore)\n"); return 0; }
*/ static int s3c_pm_enter(suspend_state_t state) { int tmp; static unsigned long regs_save[16]; /* ensure the debug is initialised (if enabled) */ s3c_pm_debug_init(); S3C_PMDBG("%s(%d)\n", __func__, state); if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__); return -EINVAL; } //Apollo + s5p_pad_pdn_control(); s3c_irqwake_intmask = 0xFFDF; // key //Apollo - /* check if we have anything to wake-up with... bad things seem * to happen if you suspend with no wakeup (system will often * require a full power-cycle) */ //printk("s3c_irqwake_intmask = 0x%08x, s3c_irqwake_intallow = 0x%08x+++++++\n", s3c_irqwake_intmask, s3c_irqwake_intallow); //printk("s3c_irqwake_eintmask = 0x%08x, s3c_irqwake_eintallow = 0x%08x+++++++\n", s3c_irqwake_eintmask, s3c_irqwake_eintallow); if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { printk(KERN_ERR "%s: No wake-up sources!\n", __func__); printk(KERN_ERR "%s: Aborting sleep\n", __func__); return -EINVAL; } /* store the physical address of the register recovery block */ s3c_sleep_save_phys = virt_to_phys(regs_save); //Apollo + /* set flag for sleep mode idle2 flag is also reserved */ #define SLEEP_MODE 0 #define IDLE2_MODE 1 __raw_writel(SLEEP_MODE, S5P_INFORM1); //Apollo - S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys); /* save all necessary core registers not covered by the drivers */ s3c_pm_save_gpios(); s3c_pm_save_uarts(); s3c_pm_save_core(); //Apollo + s3c_config_sleep_gpio(); //ÅäÖÃÐÝÃßʱ¸÷io״̬ //Apollo - /* set the irq configuration for wake */ s3c_pm_configure_extint(); //printk(KERN_INFO"sleep: irq wakeup masks: %08lx,%08lx\n", s3c_irqwake_intmask, s3c_irqwake_eintmask); s3c_irqwake_intmask = 0xFFDF; s3c_pm_arch_prepare_irqs(); /* call cpu specific preparation */ pm_cpu_prep(); /* flush cache back to ram */ flush_cache_all(); s3c_pm_check_store(); /* clear wakeup_stat register for next wakeup reason */ __raw_writel(__raw_readl(S5P_WAKEUP_STAT), S5P_WAKEUP_STAT); /* send the cpu to sleep... */ s3c_pm_arch_stop_clocks(); /* s3c_cpu_save will also act as our return point from when * we resume as it saves its own register state and restores it * during the resume. */ pmstats->sleep_count++; pmstats->sleep_freq = __raw_readl(S5P_CLK_DIV0); s3c_cpu_save(regs_save); pmstats->wake_count++; pmstats->wake_freq = __raw_readl(S5P_CLK_DIV0); /* restore the cpu state using the kernel's cpu init code. */ cpu_init(); tmp = readl(S5P_WAKEUP_STAT); fiq_glue_resume(); local_fiq_enable(); s3c_pm_restore_core(); s3c_pm_restore_uarts(); s3c_pm_restore_gpios(); s5pv210_restore_eint_group(); s3c_pm_debug_init(); /* restore the system state */ if (pm_cpu_restore) pm_cpu_restore(); /* check what irq (if any) restored the system */ s3c_pm_arch_show_resume_irqs(); S3C_PMDBG("%s: post sleep, preparing to return\n", __func__); /* LEDs should now be 1110 */ // s3c_pm_debug_smdkled(1 << 1, 0); s3c_pm_check_restore(); /* ok, let's return from sleep */ S3C_PMDBG("S3C PM Resume (post-restore)\n");
static int s3c_pm_enter(suspend_state_t state) { static unsigned long regs_save[16]; /* ensure the debug is initialised (if enabled) */ s3c_pm_debug_init(); S3C_PMDBG("%s(%d)\n", __func__, state); if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__); return -EINVAL; } /* check if we have anything to wake-up with... bad things seem * to happen if you suspend with no wakeup (system will often * require a full power-cycle) */ if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { printk(KERN_ERR "%s: No wake-up sources!\n", __func__); printk(KERN_ERR "%s: Aborting sleep\n", __func__); return -EINVAL; } /* store the physical address of the register recovery block */ s3c_sleep_save_phys = virt_to_phys(regs_save); S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys); /* save all necessary core registers not covered by the drivers */ s3c_pm_save_gpios(); s3c_pm_save_uarts(); s3c_pm_save_core(); s3c_config_sleep_gpio(); /* set the irq configuration for wake */ s3c_pm_configure_extint(); S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n", s3c_irqwake_intmask, s3c_irqwake_eintmask); s3c_pm_arch_prepare_irqs(); /* call cpu specific preparation */ #if defined(CONFIG_WIMAX) || defined(CONFIG_WIMAX_MODULE) //cky 20101116 WiMAX ext-interrupt /* FIXME if (gpio_get_value(GPIO_WIMAX_EN)) { DBG("WIMAX POWER ON!! Set WIMAX_INT as Ext-Int.\n"); s3c_pm_set_eint(6, 0x0); // WIMAX_INT: GPH0(6); LOW LEVEL DETECT } */ #endif #ifdef FEATURE_FTM_SLEEP s3c_pm_check_auto_wakeup(); #endif pm_cpu_prep(); /* flush cache back to ram */ flush_cache_all(); s3c_pm_check_store(); /* clear wakeup_stat register for next wakeup reason */ __raw_writel(__raw_readl(S5P_WAKEUP_STAT), S5P_WAKEUP_STAT); /* send the cpu to sleep... */ s3c_pm_arch_stop_clocks(); /* s3c_cpu_save will also act as our return point from when * we resume as it saves its own register state and restores it * during the resume. */ pmstats->sleep_count++; pmstats->sleep_freq = __raw_readl(S5P_CLK_DIV0); s3c_cpu_save(regs_save); pmstats->wake_count++; pmstats->wake_freq = __raw_readl(S5P_CLK_DIV0); /* restore the cpu state using the kernel's cpu init code. */ cpu_init(); fiq_glue_resume(); local_fiq_enable(); s3c_pm_restore_core(); s3c_pm_restore_uarts(); s3c_pm_restore_gpios(); s5pv210_restore_eint_group(); s3c_pm_debug_init(); /* restore the system state */ if (pm_cpu_restore) pm_cpu_restore(); /* check what irq (if any) restored the system */ s3c_pm_arch_show_resume_irqs(); S3C_PMDBG("%s: post sleep, preparing to return\n", __func__); /* LEDs should now be 1110 */ s3c_pm_debug_smdkled(1 << 1, 0); #if defined(CONFIG_WIMAX) || defined(CONFIG_WIMAX_MODULE) //cky 20101116 ext-int for wimax /* FIXME if (gpio_get_value(GPIO_WIMAX_EN)) { DBG("WIMAX POWER ON!! Set WIMAX_INT: INPUT.\n"); s3c_pm_clear_eint(6); s3c_gpio_cfgpin(GPIO_WIMAX_INT, S3C_GPIO_INPUT); s3c_gpio_setpull(GPIO_WIMAX_INT, S3C_GPIO_PULL_UP); } */ #endif #ifdef FEATURE_FTM_SLEEP if (ftm_sleep == 1) { ftm_sleep = 0; pm_disable_rtctic(); wake_lock_timeout(&ftm_wake_lock, 11 * HZ); printk(KERN_DEBUG "pm_disable_rtctic...\n"); } #endif s3c_pm_check_restore(); /* ok, let's return from sleep */ S3C_PMDBG("S3C PM Resume (post-restore)\n"); return 0; }