int flash_physical_get_protect(int block)
{
/*
* If the entire flash interface is locked, then all blocks are
* protected until reboot.
*/
if (flash_physical_get_protect_flags() & EC_FLASH_PROTECT_ALL_NOW)
return 1;
/* Check the active write protect status */
return STM32_FLASH_WRPR & (1 << block);
}
uint32_t flash_get_protect(void)
{
struct persist_state pstate;
uint32_t flags = 0;
int not_protected[2] = {0};
int i;
/* Read write protect GPIO */
#ifdef CONFIG_WP_ACTIVE_HIGH
if (gpio_get_level(GPIO_WP))
flags |= EC_FLASH_PROTECT_GPIO_ASSERTED;
#else
if (!gpio_get_level(GPIO_WP_L))
flags |= EC_FLASH_PROTECT_GPIO_ASSERTED;
#endif
/* Read persistent state of RO-at-boot flag */
flash_read_pstate(&pstate);
if (pstate.flags & PERSIST_FLAG_PROTECT_RO)
flags |= EC_FLASH_PROTECT_RO_AT_BOOT;
/* Scan flash protection */
for (i = 0; i < PHYSICAL_BANKS; i++) {
/*
* Is this bank part of RO? Needs to handle PSTATE not
* immediately following RO code, since it doesn't on link.
*/
int is_ro = ((i >= RO_BANK_OFFSET &&
i < RO_BANK_OFFSET + RO_BANK_COUNT) ||
(i >= PSTATE_BANK &&
i < PSTATE_BANK + PSTATE_BANK_COUNT)) ? 1 : 0;
int bank_flag = (is_ro ? EC_FLASH_PROTECT_RO_NOW :
EC_FLASH_PROTECT_ALL_NOW);
if (flash_physical_get_protect(i)) {
/* At least one bank in the region is protected */
flags |= bank_flag;
if (not_protected[is_ro])
flags |= EC_FLASH_PROTECT_ERROR_INCONSISTENT;
} else {
/* At least one bank in the region is NOT protected */
not_protected[is_ro] = 1;
if (flags & bank_flag)
flags |= EC_FLASH_PROTECT_ERROR_INCONSISTENT;
}
}
/*
* If the RW banks are protected but the RO banks aren't, that's
* inconsistent.
*
* Note that we check this before adding in the physical flags below,
* since some chips can also protect ALL_NOW for the current boot by
* locking up the flash program-erase registers.
*/
if ((flags & EC_FLASH_PROTECT_ALL_NOW) &&
!(flags & EC_FLASH_PROTECT_RO_NOW))
flags |= EC_FLASH_PROTECT_ERROR_INCONSISTENT;
/* Add in flags from physical layer */
return flags | flash_physical_get_protect_flags();
}
