void HELPER(gvec_fcmlad)(void *vd, void *vn, void *vm,
void *vfpst, uint32_t desc)
{
uintptr_t opr_sz = simd_oprsz(desc);
float64 *d = vd;
float64 *n = vn;
float64 *m = vm;
float_status *fpst = vfpst;
intptr_t flip = extract32(desc, SIMD_DATA_SHIFT, 1);
uint64_t neg_imag = extract32(desc, SIMD_DATA_SHIFT + 1, 1);
uint64_t neg_real = flip ^ neg_imag;
uintptr_t i;
/* Shift boolean to the sign bit so we can xor to negate. */
neg_real <<= 63;
neg_imag <<= 63;
for (i = 0; i < opr_sz / 8; i += 2) {
float64 e2 = n[i + flip];
float64 e1 = m[i + flip] ^ neg_real;
float64 e4 = e2;
float64 e3 = m[i + 1 - flip] ^ neg_imag;
d[i] = float64_muladd(e2, e1, d[i], 0, fpst);
d[i + 1] = float64_muladd(e4, e3, d[i + 1], 0, fpst);
}
clear_tail(d, opr_sz, simd_maxsz(desc));
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VFNMADD231SD_VpdHsdWsdR(bxInstruction_c *i)
{
float64 op1 = BX_READ_XMM_REG_LO_QWORD(i->nnn());
float64 op2 = BX_READ_XMM_REG_LO_QWORD(i->vvv());
float64 op3 = BX_READ_XMM_REG_LO_QWORD(i->rm());
float_status_t status;
mxcsr_to_softfloat_status_word(status, MXCSR);
op1 = float64_muladd(op2, op3, op1, float_muladd_negate_product, status);
check_exceptionsSSE(status.float_exception_flags);
BX_WRITE_XMM_REG_LO_QWORD(i->nnn(), op1);
BX_CLEAR_AVX_HIGH(i->nnn());
BX_NEXT_INSTR(i);
}
