void
gen8_vec4_generator::generate_pull_constant_load(vec4_instruction *inst,
struct brw_reg dst,
struct brw_reg index,
struct brw_reg offset)
{
assert(index.file == BRW_IMMEDIATE_VALUE &&
index.type == BRW_REGISTER_TYPE_UD);
uint32_t surf_index = index.dw1.ud;
assert(offset.file == BRW_GENERAL_REGISTER_FILE);
/* Each of the 8 channel enables is considered for whether each
* dword is written.
*/
gen8_instruction *send = next_inst(BRW_OPCODE_SEND);
gen8_set_dst(brw, send, dst);
gen8_set_src0(brw, send, offset);
gen8_set_dp_message(brw, send, GEN7_SFID_DATAPORT_DATA_CACHE,
surf_index,
GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ,
0, /* message control */
1, /* mlen */
1, /* rlen */
false, /* no header */
false); /* EOT */
mark_surface_used(surf_index);
}
void
gen8_vec4_generator::generate_scratch_write(vec4_instruction *ir,
struct brw_reg dst,
struct brw_reg src,
struct brw_reg index)
{
struct brw_reg header = brw_vec8_grf(GEN7_MRF_HACK_START + ir->base_mrf, 0);
MOV_RAW(header, brw_vec8_grf(0, 0));
generate_oword_dual_block_offsets(brw_message_reg(ir->base_mrf + 1), index);
MOV(retype(brw_message_reg(ir->base_mrf + 2), BRW_REGISTER_TYPE_D),
retype(src, BRW_REGISTER_TYPE_D));
/* Each of the 8 channel enables is considered for whether each
* dword is written.
*/
gen8_instruction *send = next_inst(BRW_OPCODE_SEND);
gen8_set_dst(brw, send, dst);
gen8_set_src0(brw, send, header);
gen8_set_pred_control(send, ir->predicate);
gen8_set_dp_message(brw, send, GEN7_SFID_DATAPORT_DATA_CACHE,
255, /* binding table index: stateless access */
GEN7_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE,
BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD,
3, /* mlen */
0, /* rlen */
true, /* header present */
false); /* EOT */
}
void
gen8_vec4_generator::generate_untyped_atomic(vec4_instruction *ir,
struct brw_reg dst,
struct brw_reg atomic_op,
struct brw_reg surf_index)
{
assert(atomic_op.file == BRW_IMMEDIATE_VALUE &&
atomic_op.type == BRW_REGISTER_TYPE_UD &&
surf_index.file == BRW_IMMEDIATE_VALUE &&
surf_index.type == BRW_REGISTER_TYPE_UD);
assert((atomic_op.dw1.ud & ~0xf) == 0);
unsigned msg_control =
atomic_op.dw1.ud | /* Atomic Operation Type: BRW_AOP_* */
(1 << 5); /* Return data expected */
gen8_instruction *inst = next_inst(BRW_OPCODE_SEND);
gen8_set_dst(brw, inst, retype(dst, BRW_REGISTER_TYPE_UD));
gen8_set_src0(brw, inst, brw_message_reg(ir->base_mrf));
gen8_set_dp_message(brw, inst, HSW_SFID_DATAPORT_DATA_CACHE_1,
surf_index.dw1.ud,
HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2,
msg_control,
ir->mlen,
1,
ir->header_present,
false);
brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
}
void
gen8_vec4_generator::generate_untyped_surface_read(vec4_instruction *ir,
struct brw_reg dst,
struct brw_reg surf_index)
{
assert(surf_index.file == BRW_IMMEDIATE_VALUE &&
surf_index.type == BRW_REGISTER_TYPE_UD);
gen8_instruction *inst = next_inst(BRW_OPCODE_SEND);
gen8_set_dst(brw, inst, retype(dst, BRW_REGISTER_TYPE_UD));
gen8_set_src0(brw, inst, brw_message_reg(ir->base_mrf));
gen8_set_dp_message(brw, inst, HSW_SFID_DATAPORT_DATA_CACHE_1,
surf_index.dw1.ud,
HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ,
0xe, /* enable only the R channel */
ir->mlen,
1,
ir->header_present,
false);
brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
}