static void display_driver_shutdown(struct platform_device *pdev)
{
#ifdef CONFIG_FB_HIBERNATION_DISPLAY
struct display_driver *dispdrv = get_display_driver();
disp_set_pm_status(DISP_STATUS_PM2);
disp_pm_gate_lock(dispdrv, true);
disp_pm_add_refcount(get_display_driver());
#endif
#ifdef CONFIG_DECON_MIPI_DSI
s5p_mipi_dsi_disable(g_display_driver.dsi_driver.dsim);
#endif
}
static void display_driver_shutdown(struct platform_device *pdev)
{
#ifdef CONFIG_FB_HIBERNATION_DISPLAY
disp_pm_add_refcount(get_display_driver());
#endif
s5p_mipi_dsi_disable(g_display_driver.dsi_driver.dsim);
}
int enable_display_driver_power(struct device *dev)
{
struct display_gpio *gpio;
struct display_driver *dispdrv;
#if defined(CONFIG_FB_I80_COMMAND_MODE) && !defined(CONFIG_FB_I80_SW_TRIGGER)
struct pinctrl *pinctrl;
#endif
int ret = 0;
dispdrv = get_display_driver();
gpio = dispdrv->dt_ops.get_display_dsi_reset_gpio();
gpio_request_one(gpio->id[0], GPIOF_OUT_INIT_HIGH, "lcd_power");
usleep_range(5000, 6000);
gpio_free(gpio->id[0]);
gpio_request_one(gpio->id[1], GPIOF_OUT_INIT_HIGH, "lcd_reset");
usleep_range(5000, 6000);
gpio_set_value(gpio->id[1], 0);
usleep_range(5000, 6000);
gpio_set_value(gpio->id[1], 1);
usleep_range(5000, 6000);
gpio_free(gpio->id[1]);
#if defined(CONFIG_FB_I80_COMMAND_MODE) && !defined(CONFIG_FB_I80_SW_TRIGGER)
pinctrl = devm_pinctrl_get_select(dev, "turnon_tes");
if (IS_ERR(pinctrl))
pr_err("failed to get tes pinctrl - ON");
#endif
return ret;
}
static void request_dynamic_hotplug(bool hotplug)
{
#ifdef CONFIG_EXYNOS5_DYNAMIC_CPU_HOTPLUG
struct display_driver *dispdrv = get_display_driver();
if (dispdrv->pm_status.hotplug_gating_on)
force_dynamic_hotplug(hotplug);
#endif
}
int create_decon_mic(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct display_driver *dispdrv;
struct decon_mic *mic;
struct resource *res;
dispdrv = get_display_driver();
mic = devm_kzalloc(dev, sizeof(struct decon_mic), GFP_KERNEL);
if (!mic) {
dev_err(dev, "no memory for mic driver");
return -ENOMEM;
}
mic->dev = dev;
mic->lcd = decon_get_lcd_info();
mic->mic_config = dispdrv->dt_ops.get_display_mic_config();
mic->decon_mic_on = false;
res = dispdrv->mic_driver.regs;
if (!res) {
dev_err(dev, "failed to find resource\n");
return -ENOENT;
}
mic->reg_base = ioremap(res->start, resource_size(res));
if (!mic->reg_base) {
dev_err(dev, "failed to map registers\n");
return -ENXIO;
}
decon_mic_set_sys_reg(mic, DECON_MIC_ON);
decon_mic_set_image_size(mic);
decon_mic_set_2d_bit_stream_size(mic);
decon_mic_set_mic_base_operation(mic, DECON_MIC_ON);
mic_for_decon = mic;
mic->decon_mic_on = true;
dispdrv->mic_driver.mic = mic;
#ifdef CONFIG_FB_HIBERNATION_DISPLAY
dispdrv->mic_driver.ops->pwr_on = decon_mic_hibernation_power_on;
dispdrv->mic_driver.ops->pwr_off = decon_mic_hibernation_power_off;
#endif
dev_info(dev, "MIC driver has been probed\n");
return 0;
}
static void request_dynamic_hotplug(bool hotplug)
{
#ifdef CONFIG_EXYNOS5_DYNAMIC_CPU_HOTPLUG
struct display_driver *dispdrv = get_display_driver();
if ((dispdrv->pm_status.hotplug_gating_on) &&
(dispdrv->platform_status == DISP_STATUS_PM1))
force_dynamic_hotplug(hotplug,
dispdrv->pm_status.hotplug_delay_msec);
#endif
}
static void decon_clock_gating_handler(struct kthread_work *work)
{
struct display_driver *dispdrv = get_display_driver();
if (dispdrv->pm_status.clk_idle_count > MAX_CLK_GATING_COUNT)
display_block_clock_off(dispdrv);
init_gating_idle_count(dispdrv);
disp_pm_gate_lock(dispdrv, false);
pm_debug("display_block_clock_off -");
}
int create_decon_mic(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct display_driver *dispdrv;
struct decon_mic *mic;
struct resource *res;
dispdrv = get_display_driver();
mic = devm_kzalloc(dev, sizeof(struct decon_mic), GFP_KERNEL);
if (!mic) {
dev_err(&pdev->dev, "no memory for mic driver\n");
return -ENOMEM;
}
mic->dev = dev;
mic->lcd = decon_get_lcd_info();
mic->mic_config = dispdrv->dt_ops.get_display_mic_config();
mic->decon_mic_on = false;
res = dispdrv->mic_driver.regs;
if (!res) {
mic_err("failed to find resource\n");
return -ENOENT;
}
mic->reg_base = ioremap(res->start, resource_size(res));
if (!mic->reg_base) {
mic_err("failed to map registers\n");
return -ENXIO;
}
mic_for_decon = mic;
dispdrv->mic_driver.mic = mic;
#ifdef CONFIG_S5P_LCD_INIT
decon_mic_enable(mic);
#endif
#ifdef CONFIG_FB_HIBERNATION_DISPLAY
dispdrv->mic_driver.ops->pwr_on = decon_mic_hibernation_power_on;
dispdrv->mic_driver.ops->pwr_off = decon_mic_hibernation_power_off;
mic->lcd_update = kzalloc(sizeof(struct decon_lcd), GFP_KERNEL);
memcpy(mic->lcd_update, mic->lcd, sizeof(struct decon_lcd));
#endif
mic_info("MIC driver has been probed\n");
return 0;
}
int enable_display_decon_clocks(struct device *dev)
{
int ret = 0;
struct display_driver *dispdrv;
struct s3c_fb *sfb;
dispdrv = get_display_driver();
sfb = dispdrv->decon_driver.sfb;
DISPLAY_CLOCK_INLINE_SET_PARENT(mout_fimd1, mout_mpll_ctrl);
#if !defined (CONFIG_SOC_EXYNOS5422_REV_0)
DISPLAY_CLOCK_INLINE_SET_PARENT(mout_fimd1_mdnie1, mout_fimd1);
#endif
#if defined(CONFIG_DECON_LCD_S6E8AA0)
DISPLAY_INLINE_SET_RATE(dout_fimd1, 67 * MHZ);
#elif defined(CONFIG_DECON_LCD_S6E3FA0) || defined(CONFIG_DECON_LCD_S6E3FA2)
DISPLAY_INLINE_SET_RATE(dout_fimd1, 133 * MHZ);
#else
DISPLAY_INLINE_SET_RATE(dout_fimd1, 266 * MHZ);
#endif
DISPLAY_CLOCK_INLINE_SET_PARENT(mout_aclk_300_disp1_user, mout_aclk_300_disp1_sw);
DISPLAY_CLOCK_INLINE_SET_PARENT(mout_aclk_300_disp1_sw, dout_aclk_300_disp1);
DISPLAY_CLOCK_INLINE_SET_PARENT(mout_aclk_300_disp1, mout_dpll_ctrl);
DISPLAY_INLINE_SET_RATE(dout_aclk_300_disp1, 300 * MHZ);
DISPLAY_CLOCK_INLINE_SET_PARENT(mout_aclk_400_disp1_user, mout_aclk_400_disp1_sw);
DISPLAY_CLOCK_INLINE_SET_PARENT(mout_aclk_400_disp1_sw, dout_aclk_400_disp1);
DISPLAY_CLOCK_INLINE_SET_PARENT(mout_aclk_400_disp1, mout_dpll_ctrl);
#ifdef CONFIG_FB_HIBERNATION_DISPLAY_CLOCK_GATING
dispdrv->pm_status.ops->clk_on(dispdrv);
#else
if (!dispdrv->dsi_driver.clk) {
dispdrv->dsi_driver.clk = __clk_lookup("clk_dsim1");
if (IS_ERR(dispdrv->dsi_driver.clk)) {
pr_err("Failed to clk_get - clk_dsim1\n");
return ret;
}
}
clk_prepare_enable(dispdrv->dsi_driver.clk);
clk_prepare_enable(sfb->bus_clk);
clk_prepare_enable(sfb->axi_disp1);
if (!sfb->variant.has_clksel)
clk_prepare_enable(sfb->lcd_clk);
#endif
return ret;
}
static void decon_power_gating_handler(struct kthread_work *work)
{
struct display_driver *dispdrv = get_display_driver();
if (dispdrv->pm_status.pwr_idle_count > MAX_PWR_GATING_COUNT) {
if (!check_camera_is_running()) {
display_hibernation_power_off(dispdrv);
init_gating_idle_count(dispdrv);
}
} else if (dispdrv->decon_driver.sfb->power_state == POWER_HIBER_DOWN) {
display_hibernation_power_on(dispdrv);
}
}
void disp_debug_power_info(void)
{
struct display_driver *dispdrv = get_display_driver();
pm_info("clk: %d, \
lock: %d, clk_idle: %d, pwr_idle: %d\n, \
output_on: %d, pwr_state: %d, vsync: %lld, frame_cnt: %d, te_cnt: %d",
dispdrv->pm_status.clock_enabled,
atomic_read(&dispdrv->pm_status.lock_count),
dispdrv->pm_status.clk_idle_count,
dispdrv->pm_status.pwr_idle_count,
dispdrv->decon_driver.sfb->output_on,
dispdrv->decon_driver.sfb->power_state,
ktime_to_ns(dispdrv->decon_driver.sfb->vsync_info.timestamp),
frame_done_count,
te_count);
}
int create_decon_mic(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct display_driver *dispdrv;
struct decon_mic *mic;
struct resource *res;
int ret;
dispdrv = get_display_driver();
mic = devm_kzalloc(dev, sizeof(struct decon_mic), GFP_KERNEL);
if (!mic) {
dev_err(dev, "no memory for mic driver");
return -ENOMEM;
}
mic->dev = dev;
mic->lcd = decon_get_lcd_info();
mic->mic_config = dispdrv->dt_ops.get_display_mic_config();
mic->decon_mic_on = false;
res = dispdrv->mic_driver.regs;
if (!res) {
dev_err(dev, "failed to find resource\n");
ret = -ENOENT;
}
mic->reg_base = ioremap(res->start, resource_size(res));
if (!mic->reg_base) {
dev_err(dev, "failed to map registers\n");
ret = -ENXIO;
}
decon_mic_enable(mic);
mic_for_decon = mic;
mic->decon_mic_on = true;
dispdrv->mic_driver.mic = mic;
dev_info(dev, "MIC driver has been probed\n");
return 0;
}
int reset_display_driver_panel(struct device *dev)
{
struct display_gpio *gpio;
struct display_driver *dispdrv;
dispdrv = get_display_driver();
gpio = dispdrv->dt_ops.get_display_dsi_reset_gpio();
usleep_range(5000, 6000); /* need 5ms delay after LP11 high*/
gpio_request_one(gpio->id[0], GPIOF_OUT_INIT_HIGH, "lcd_reset");
usleep_range(5000, 6000);
gpio_set_value(gpio->id[0], 0);
usleep_range(5000, 6000);
gpio_set_value(gpio->id[0], 1);
usleep_range(5000, 6000);
gpio_free(gpio->id[0]);
return 0;
}
int disable_display_driver_power(struct device *dev)
{
struct display_gpio *gpio;
struct display_driver *dispdrv;
int ret = 0;
dispdrv = get_display_driver();
/* Reset */
gpio = dispdrv->dt_ops.get_display_dsi_reset_gpio();
gpio_request_one(gpio->id[1], GPIOF_OUT_INIT_LOW, "lcd_reset");
usleep_range(5000, 6000);
gpio_free(gpio->id[1]);
/* Power */
gpio_request_one(gpio->id[0], GPIOF_OUT_INIT_LOW, "lcd_power");
usleep_range(5000, 6000);
gpio_free(gpio->id[0]);
return ret;
}
int enable_display_driver_power(struct device *dev)
{
int i, ret = 0;
struct display_gpio *gpio;
struct display_driver *dispdrv;
struct regulator *regulator;
dispdrv = get_display_driver();
gpio = dispdrv->dt_ops.get_display_dsi_reset_gpio();
for (i = 0; i < ARRAY_SIZE(lcd_regulator_arr); i++) {
regulator = regulator_get(dev, lcd_regulator_arr[i]);
if (IS_ERR(regulator))
pr_err("failed to get %s\n", lcd_regulator_arr[i]);
else {
ret = regulator_enable(regulator);
if (ret)
dev_err(dev, "failed to enable %s: %d\n",
lcd_regulator_arr[i], ret);
regulator_put(regulator);
}
}
/* 0. GPY7[4] : MLCD_RST
1. GPY3[2] : MIPI_1.8V_EN
2. GPB0[0] : LCD_1P5_EN */
gpio_request_one(gpio->id[1], GPIOF_OUT_INIT_HIGH, "mipi_power");
gpio_free(gpio->id[1]);
usleep_range(5000, 6000);
#ifdef CONFIG_MACH_UNIVERSAL5422
gpio_request_one(gpio->id[2], GPIOF_OUT_INIT_HIGH, "lcd_power");
gpio_free(gpio->id[2]);
usleep_range(10000, 11000);
#endif
set_pinctrl(dev, 1);
return ret;
}
int disable_display_decon_clocks(struct device *dev)
{
struct display_driver *dispdrv;
struct s3c_fb *sfb;
dispdrv = get_display_driver();
sfb = dispdrv->decon_driver.sfb;
#ifdef CONFIG_FB_HIBERNATION_DISPLAY_CLOCK_GATING
dispdrv->pm_status.ops->clk_off(dispdrv);
#else
if (!sfb->variant.has_clksel)
clk_disable_unprepare(sfb->lcd_clk);
clk_disable_unprepare(sfb->axi_disp1);
clk_disable_unprepare(sfb->bus_clk);
clk_disable_unprepare(dispdrv->dsi_driver.clk);
#endif
return 0;
}
int disable_display_driver_power(struct device *dev)
{
int i, ret = 0;
struct display_gpio *gpio;
struct display_driver *dispdrv;
struct regulator *regulator;
dispdrv = get_display_driver();
gpio = dispdrv->dt_ops.get_display_dsi_reset_gpio();
/* Reset & Power */
gpio_request_one(gpio->id[0], GPIOF_OUT_INIT_LOW, "lcd_reset");
gpio_free(gpio->id[0]);
usleep_range(5000, 6000);
#ifdef CONFIG_MACH_UNIVERSAL5422
gpio_request_one(gpio->id[2], GPIOF_OUT_INIT_LOW, "lcd_power");
gpio_free(gpio->id[2]);
usleep_range(5000, 6000);
#endif
for (i = 0; i < ARRAY_SIZE(lcd_regulator_arr); i++) {
regulator = regulator_get(dev, lcd_regulator_arr[i]);
if (IS_ERR(regulator))
pr_err("failed to get %s\n", lcd_regulator_arr[i]);
else {
ret = regulator_disable(regulator);
if (ret)
dev_err(dev, "failed to enable %s: %d\n",
lcd_regulator_arr[i], ret);
regulator_put(regulator);
}
}
set_pinctrl(dev, 0);
return ret;
}
void disp_set_pm_status(int flag)
{
struct display_driver *dispdrv = get_display_driver();
if ((flag >= DISP_STATUS_PM0) || (flag < DISP_STATUS_PM_MAX))
dispdrv->platform_status = flag;
}
