/* Finalization of the RTL loop passes. */
static unsigned int
rtl_loop_done (void)
{
basic_block bb;
if (current_loops)
loop_optimizer_finalize (current_loops);
free_dominance_info (CDI_DOMINATORS);
/* Finalize layout changes. */
FOR_EACH_BB (bb)
if (bb->next_bb != EXIT_BLOCK_PTR)
bb->aux = bb->next_bb;
cfg_layout_finalize ();
cleanup_cfg (CLEANUP_EXPENSIVE);
delete_trivially_dead_insns (get_insns (), max_reg_num ());
reg_scan (get_insns (), max_reg_num ());
if (dump_file)
dump_flow_info (dump_file, dump_flags);
current_loops = NULL;
return 0;
}
static void
rest_of_handle_web (void)
{
web_main ();
delete_trivially_dead_insns (get_insns (), max_reg_num ());
cleanup_cfg (CLEANUP_EXPENSIVE);
reg_scan (get_insns (), max_reg_num ());
}
/*
* find all asm level function returns and forcibly set the highest bit of the return address
*/
static unsigned int execute_kernexec_retaddr(void)
{
rtx insn;
// 1. find function returns
for (insn = get_insns(); insn; insn = NEXT_INSN(insn)) {
// rtl match: (jump_insn 41 40 42 2 (return) fptr.c:42 634 {return_internal} (nil))
// (jump_insn 12 9 11 2 (parallel [ (return) (unspec [ (0) ] UNSPEC_REP) ]) fptr.c:46 635 {return_internal_long} (nil))
// (jump_insn 97 96 98 6 (simple_return) fptr.c:50 -1 (nil) -> simple_return)
rtx body;
// is it a retn
if (!JUMP_P(insn))
continue;
body = PATTERN(insn);
if (GET_CODE(body) == PARALLEL)
body = XVECEXP(body, 0, 0);
if (!ANY_RETURN_P(body))
continue;
kernexec_instrument_retaddr(insn);
}
// print_simple_rtl(stderr, get_insns());
// print_rtl(stderr, get_insns());
return 0;
}
static unsigned int
insert_uses (void)
{
static const int num_modes[] = NUM_MODES_FOR_MODE_SWITCHING;
#define N_ENTITIES ARRAY_SIZE (num_modes)
int e;
void (*target_insert_mode_switch_use) (rtx_insn *insn, int, int)
= TARGET_INSERT_MODE_SWITCH_USE;
for (e = N_ENTITIES - 1; e >= 0; e--)
{
int no_mode = num_modes[e];
rtx_insn *insn;
int mode;
if (!OPTIMIZE_MODE_SWITCHING (e))
continue;
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
{
if (!INSN_P (insn))
continue;
mode = epiphany_mode_needed (e, insn);
if (mode == no_mode)
continue;
if (target_insert_mode_switch_use)
{
target_insert_mode_switch_use (insn, e, mode);
df_insn_rescan (insn);
}
}
}
return 0;
}
static rtx
gen_speculative_prefetch (rtx address, gcov_type delta, int write)
{
rtx tmp;
rtx sequence;
/* TODO: we do the prefetching for just one iteration ahead, which
often is not enough. */
start_sequence ();
if (offsettable_address_p (0, VOIDmode, address))
tmp = plus_constant (copy_rtx (address), delta);
else
{
tmp = simplify_gen_binary (PLUS, Pmode,
copy_rtx (address), GEN_INT (delta));
tmp = force_operand (tmp, NULL);
}
if (! (*insn_data[(int)CODE_FOR_prefetch].operand[0].predicate)
(tmp, insn_data[(int)CODE_FOR_prefetch].operand[0].mode))
tmp = force_reg (Pmode, tmp);
emit_insn (gen_prefetch (tmp, GEN_INT (write), GEN_INT (3)));
sequence = get_insns ();
end_sequence ();
return sequence;
}
static void
add_test (rtx cond, basic_block bb, basic_block dest)
{
rtx seq, jump, label;
enum machine_mode mode;
rtx op0 = XEXP (cond, 0), op1 = XEXP (cond, 1);
enum rtx_code code = GET_CODE (cond);
mode = GET_MODE (XEXP (cond, 0));
if (mode == VOIDmode)
mode = GET_MODE (XEXP (cond, 1));
start_sequence ();
op0 = force_operand (op0, NULL_RTX);
op1 = force_operand (op1, NULL_RTX);
label = block_label (dest);
do_compare_rtx_and_jump (op0, op1, code, 0, mode, NULL_RTX, NULL_RTX, label);
jump = get_last_insn ();
JUMP_LABEL (jump) = label;
/* The jump is supposed to handle an unlikely special case. */
REG_NOTES (jump)
= gen_rtx_EXPR_LIST (REG_BR_PROB,
const0_rtx, REG_NOTES (jump));
LABEL_NUSES (label)++;
seq = get_insns ();
end_sequence ();
emit_insn_after (seq, BB_END (bb));
}
/* Splits superblocks. */
static void
break_superblocks (void)
{
sbitmap superblocks;
int i, need;
superblocks = sbitmap_alloc (n_basic_blocks);
sbitmap_zero (superblocks);
need = 0;
for (i = 0; i < n_basic_blocks; i++)
if (BASIC_BLOCK(i)->flags & BB_SUPERBLOCK)
{
BASIC_BLOCK(i)->flags &= ~BB_SUPERBLOCK;
SET_BIT (superblocks, i);
need = 1;
}
if (need)
{
rebuild_jump_labels (get_insns ());
find_many_sub_basic_blocks (superblocks);
}
free (superblocks);
}
/* Splits superblocks. */
void
break_superblocks (void)
{
sbitmap superblocks;
bool need = false;
basic_block bb;
superblocks = sbitmap_alloc (last_basic_block);
sbitmap_zero (superblocks);
FOR_EACH_BB (bb)
if (bb->flags & BB_SUPERBLOCK)
{
bb->flags &= ~BB_SUPERBLOCK;
SET_BIT (superblocks, bb->index);
need = true;
}
if (need)
{
rebuild_jump_labels (get_insns ());
find_many_sub_basic_blocks (superblocks);
}
free (superblocks);
}
void
pop_sequence ()
{
rtx sequence_first = get_insns ();
end_sequence ();
emit_insns (sequence_first);
}
/* Run tracer. */
static unsigned int
rest_of_handle_tracer (void)
{
if (dump_file)
dump_flow_info (dump_file, dump_flags);
tracer (0);
cleanup_cfg (CLEANUP_EXPENSIVE);
reg_scan (get_insns (), max_reg_num ());
return 0;
}
/* Generate code for transformations 3 and 4 (with MODE and OPERATION,
operands OP1 and OP2, result TARGET, at most SUB subtractions, and
probability of taking the optimal path(s) PROB1 and PROB2). */
static rtx
gen_mod_subtract (enum machine_mode mode, enum rtx_code operation,
rtx target, rtx op1, rtx op2, int sub, int prob1, int prob2)
{
rtx tmp, tmp1, jump;
rtx end_label = gen_label_rtx ();
rtx sequence;
int i;
start_sequence ();
if (!REG_P (op2))
{
tmp = gen_reg_rtx (mode);
emit_move_insn (tmp, copy_rtx (op2));
}
else
tmp = op2;
emit_move_insn (target, copy_rtx (op1));
do_compare_rtx_and_jump (target, tmp, LTU, 0, mode, NULL_RTX,
NULL_RTX, end_label);
/* Add branch probability to jump we just created. */
jump = get_last_insn ();
REG_NOTES (jump) = gen_rtx_EXPR_LIST (REG_BR_PROB,
GEN_INT (prob1), REG_NOTES (jump));
for (i = 0; i < sub; i++)
{
tmp1 = expand_simple_binop (mode, MINUS, target, tmp, target,
0, OPTAB_WIDEN);
if (tmp1 != target)
emit_move_insn (target, tmp1);
do_compare_rtx_and_jump (target, tmp, LTU, 0, mode, NULL_RTX,
NULL_RTX, end_label);
/* Add branch probability to jump we just created. */
jump = get_last_insn ();
REG_NOTES (jump) = gen_rtx_EXPR_LIST (REG_BR_PROB,
GEN_INT (prob2), REG_NOTES (jump));
}
tmp1 = simplify_gen_binary (operation, mode, copy_rtx (target), copy_rtx (tmp));
tmp1 = force_operand (tmp1, target);
if (tmp1 != target)
emit_move_insn (target, tmp1);
emit_label (end_label);
sequence = get_insns ();
end_sequence ();
rebuild_jump_labels (sequence);
return sequence;
}
static void
insert_value_copy_on_edge (edge e, int dest, tree src, source_location locus)
{
rtx seq, x;
enum machine_mode dest_mode, src_mode;
int unsignedp;
tree var;
if (dump_file && (dump_flags & TDF_DETAILS))
{
fprintf (dump_file,
"Inserting a value copy on edge BB%d->BB%d : PART.%d = ",
e->src->index,
e->dest->index, dest);
print_generic_expr (dump_file, src, TDF_SLIM);
fprintf (dump_file, "\n");
}
gcc_assert (SA.partition_to_pseudo[dest]);
set_location_for_edge (e);
/* If a locus is provided, override the default. */
if (locus)
set_curr_insn_source_location (locus);
start_sequence ();
var = SSA_NAME_VAR (partition_to_var (SA.map, dest));
src_mode = TYPE_MODE (TREE_TYPE (src));
dest_mode = GET_MODE (SA.partition_to_pseudo[dest]);
gcc_assert (src_mode == TYPE_MODE (TREE_TYPE (var)));
gcc_assert (!REG_P (SA.partition_to_pseudo[dest])
|| dest_mode == promote_decl_mode (var, &unsignedp));
if (src_mode != dest_mode)
{
x = expand_expr (src, NULL, src_mode, EXPAND_NORMAL);
x = convert_modes (dest_mode, src_mode, x, unsignedp);
}
else if (src_mode == BLKmode)
{
x = SA.partition_to_pseudo[dest];
store_expr (src, x, 0, false);
}
else
x = expand_expr (src, SA.partition_to_pseudo[dest],
dest_mode, EXPAND_NORMAL);
if (x != SA.partition_to_pseudo[dest])
emit_move_insn (SA.partition_to_pseudo[dest], x);
seq = get_insns ();
end_sequence ();
insert_insn_on_edge (seq, e);
}
static rtx
insert_move_insn_before (rtx next_insn, rtx dest_reg, rtx src_reg)
{
rtx insns;
start_sequence ();
emit_move_insn (dest_reg, src_reg);
insns = get_insns ();
end_sequence ();
emit_insn_before (insns, next_insn);
return insns;
}
static void
record_effective_endpoints (void)
{
rtx next_insn;
basic_block bb;
rtx insn;
for (insn = get_insns ();
insn
&& NOTE_P (insn)
&& NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK;
insn = NEXT_INSN (insn))
continue;
/* No basic blocks at all? */
gcc_assert (insn);
if (PREV_INSN (insn))
cfg_layout_function_header =
unlink_insn_chain (get_insns (), PREV_INSN (insn));
else
cfg_layout_function_header = NULL_RTX;
next_insn = get_insns ();
FOR_EACH_BB (bb)
{
rtx end;
if (PREV_INSN (BB_HEAD (bb)) && next_insn != BB_HEAD (bb))
bb->il.rtl->header = unlink_insn_chain (next_insn,
PREV_INSN (BB_HEAD (bb)));
end = skip_insns_after_block (bb);
if (NEXT_INSN (BB_END (bb)) && BB_END (bb) != end)
bb->il.rtl->footer = unlink_insn_chain (NEXT_INSN (BB_END (bb)), end);
next_insn = NEXT_INSN (BB_END (bb));
}
cfg_layout_function_footer = next_insn;
if (cfg_layout_function_footer)
cfg_layout_function_footer = unlink_insn_chain (cfg_layout_function_footer, get_last_insn ());
}
/* Generate code for transformation 1 (with MODE and OPERATION, operands OP1
and OP2, whose value is expected to be VALUE, result TARGET and
probability of taking the optimal path PROB). */
static rtx
gen_divmod_fixed_value (enum machine_mode mode, enum rtx_code operation,
rtx target, rtx op1, rtx op2, gcov_type value,
int prob)
{
rtx tmp, tmp1, jump;
rtx neq_label = gen_label_rtx ();
rtx end_label = gen_label_rtx ();
rtx sequence;
start_sequence ();
if (!REG_P (op2))
{
tmp = gen_reg_rtx (mode);
emit_move_insn (tmp, copy_rtx (op2));
}
else
tmp = op2;
do_compare_rtx_and_jump (tmp, GEN_INT (value), NE, 0, mode, NULL_RTX,
NULL_RTX, neq_label);
/* Add branch probability to jump we just created. */
jump = get_last_insn ();
REG_NOTES (jump) = gen_rtx_EXPR_LIST (REG_BR_PROB,
GEN_INT (REG_BR_PROB_BASE - prob),
REG_NOTES (jump));
tmp1 = simplify_gen_binary (operation, mode,
copy_rtx (op1), GEN_INT (value));
tmp1 = force_operand (tmp1, target);
if (tmp1 != target)
emit_move_insn (copy_rtx (target), copy_rtx (tmp1));
emit_jump_insn (gen_jump (end_label));
emit_barrier ();
emit_label (neq_label);
tmp1 = simplify_gen_binary (operation, mode,
copy_rtx (op1), copy_rtx (tmp));
tmp1 = force_operand (tmp1, target);
if (tmp1 != target)
emit_move_insn (copy_rtx (target), copy_rtx (tmp1));
emit_label (end_label);
sequence = get_insns ();
end_sequence ();
rebuild_jump_labels (sequence);
return sequence;
}
/* Generate code for transformation 2 (with MODE and OPERATION, operands OP1
and OP2, result TARGET and probability of taking the optimal path PROB). */
static rtx
gen_mod_pow2 (enum machine_mode mode, enum rtx_code operation, rtx target,
rtx op1, rtx op2, int prob)
{
rtx tmp, tmp1, tmp2, tmp3, jump;
rtx neq_label = gen_label_rtx ();
rtx end_label = gen_label_rtx ();
rtx sequence;
start_sequence ();
if (!REG_P (op2))
{
tmp = gen_reg_rtx (mode);
emit_move_insn (tmp, copy_rtx (op2));
}
else
tmp = op2;
tmp1 = expand_simple_binop (mode, PLUS, tmp, constm1_rtx, NULL_RTX,
0, OPTAB_WIDEN);
tmp2 = expand_simple_binop (mode, AND, tmp, tmp1, NULL_RTX,
0, OPTAB_WIDEN);
do_compare_rtx_and_jump (tmp2, const0_rtx, NE, 0, mode, NULL_RTX,
NULL_RTX, neq_label);
/* Add branch probability to jump we just created. */
jump = get_last_insn ();
REG_NOTES (jump) = gen_rtx_EXPR_LIST (REG_BR_PROB,
GEN_INT (REG_BR_PROB_BASE - prob),
REG_NOTES (jump));
tmp3 = expand_simple_binop (mode, AND, op1, tmp1, target,
0, OPTAB_WIDEN);
if (tmp3 != target)
emit_move_insn (copy_rtx (target), tmp3);
emit_jump_insn (gen_jump (end_label));
emit_barrier ();
emit_label (neq_label);
tmp1 = simplify_gen_binary (operation, mode, copy_rtx (op1), copy_rtx (tmp));
tmp1 = force_operand (tmp1, target);
if (tmp1 != target)
emit_move_insn (target, tmp1);
emit_label (end_label);
sequence = get_insns ();
end_sequence ();
rebuild_jump_labels (sequence);
return sequence;
}
void
reemit_insn_block_notes (void)
{
tree cur_block = DECL_INITIAL (cfun->decl);
rtx insn, note;
insn = get_insns ();
if (!active_insn_p (insn))
insn = next_active_insn (insn);
for (; insn; insn = next_active_insn (insn))
{
tree this_block;
/* Avoid putting scope notes between jump table and its label. */
if (JUMP_P (insn)
&& (GET_CODE (PATTERN (insn)) == ADDR_VEC
|| GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
continue;
this_block = insn_scope (insn);
/* For sequences compute scope resulting from merging all scopes
of instructions nested inside. */
if (GET_CODE (PATTERN (insn)) == SEQUENCE)
{
int i;
rtx body = PATTERN (insn);
this_block = NULL;
for (i = 0; i < XVECLEN (body, 0); i++)
this_block = choose_inner_scope (this_block,
insn_scope (XVECEXP (body, 0, i)));
}
if (! this_block)
continue;
if (this_block != cur_block)
{
change_scope (insn, cur_block, this_block);
cur_block = this_block;
}
}
/* change_scope emits before the insn, not after. */
note = emit_note (NOTE_INSN_DELETED);
change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
delete_insn (note);
reorder_blocks ();
}
static bool
rtl_value_profile_transformations (void)
{
rtx insn, next;
int changed = false;
for (insn = get_insns (); insn; insn = next)
{
next = NEXT_INSN (insn);
if (!INSN_P (insn))
continue;
/* Scan for insn carrying a histogram. */
if (!find_reg_note (insn, REG_VALUE_PROFILE, 0))
continue;
/* Ignore cold areas -- we are growing a code. */
if (!maybe_hot_bb_p (BLOCK_FOR_INSN (insn)))
continue;
if (dump_file)
{
fprintf (dump_file, "Trying transformations on insn %d\n",
INSN_UID (insn));
print_rtl_single (dump_file, insn);
}
/* Transformations: */
if (flag_value_profile_transformations
&& (mod_subtract_transform (insn)
|| divmod_fixed_value_transform (insn)
|| mod_pow2_value_transform (insn)))
changed = true;
#ifdef HAVE_prefetch
if (flag_speculative_prefetching
&& speculative_prefetching_transform (insn))
changed = true;
#endif
}
if (changed)
{
commit_edge_insertions ();
allocate_reg_info (max_reg_num (), FALSE, FALSE);
}
return changed;
}
static int
get_uncond_jump_length (void)
{
rtx label, jump;
int length;
label = emit_label_before (gen_label_rtx (), get_insns ());
jump = emit_jump_insn (gen_jump (label));
length = get_attr_length (jump);
delete_insn (jump);
delete_insn (label);
return length;
}
rtx
compare_and_jump_seq (rtx op0, rtx op1, enum rtx_code comp, rtx label, int prob,
rtx cinsn)
{
rtx seq, jump, cond;
enum machine_mode mode;
mode = GET_MODE (op0);
if (mode == VOIDmode)
mode = GET_MODE (op1);
start_sequence ();
if (GET_MODE_CLASS (mode) == MODE_CC)
{
/* A hack -- there seems to be no easy generic way how to make a
conditional jump from a ccmode comparison. */
gcc_assert (cinsn);
cond = XEXP (SET_SRC (pc_set (cinsn)), 0);
gcc_assert (GET_CODE (cond) == comp);
gcc_assert (rtx_equal_p (op0, XEXP (cond, 0)));
gcc_assert (rtx_equal_p (op1, XEXP (cond, 1)));
emit_jump_insn (copy_insn (PATTERN (cinsn)));
jump = get_last_insn ();
gcc_assert (JUMP_P (jump));
JUMP_LABEL (jump) = JUMP_LABEL (cinsn);
LABEL_NUSES (JUMP_LABEL (jump))++;
redirect_jump (jump, label, 0);
}
else
{
gcc_assert (!cinsn);
op0 = force_operand (op0, NULL_RTX);
op1 = force_operand (op1, NULL_RTX);
do_compare_rtx_and_jump (op0, op1, comp, 0,
mode, NULL_RTX, NULL_RTX, label, -1);
jump = get_last_insn ();
gcc_assert (JUMP_P (jump));
JUMP_LABEL (jump) = label;
LABEL_NUSES (label)++;
}
add_reg_note (jump, REG_BR_PROB, GEN_INT (prob));
seq = get_insns ();
end_sequence ();
return seq;
}
/* Some old code expects exactly one BARRIER as the NEXT_INSN of a
non-fallthru insn. This is not generally true, as multiple barriers
may have crept in, or the BARRIER may be separated from the last
real insn by one or more NOTEs.
This simple pass moves barriers and removes duplicates so that the
old code is happy.
*/
unsigned int
cleanup_barriers (void)
{
rtx insn, next, prev;
for (insn = get_insns (); insn; insn = next)
{
next = NEXT_INSN (insn);
if (BARRIER_P (insn))
{
prev = prev_nonnote_insn (insn);
if (BARRIER_P (prev))
delete_insn (insn);
else if (prev != PREV_INSN (insn))
reorder_insns (insn, insn, prev);
}
}
return 0;
}
unsigned int
emit_initial_value_sets (void)
{
struct initial_value_struct *ivs = crtl->hard_reg_initial_vals;
int i;
rtx seq;
if (ivs == 0)
return 0;
start_sequence ();
for (i = 0; i < ivs->num_entries; i++)
emit_move_insn (ivs->entries[i].pseudo, ivs->entries[i].hard_reg);
seq = get_insns ();
end_sequence ();
emit_insn_at_entry (seq);
return 0;
}
static basic_block
construct_init_block (void)
{
basic_block init_block, first_block;
edge e = NULL;
int flags;
/* Multiple entry points not supported yet. */
gcc_assert (EDGE_COUNT (ENTRY_BLOCK_PTR->succs) == 1);
e = EDGE_SUCC (ENTRY_BLOCK_PTR, 0);
/* When entry edge points to first basic block, we don't need jump,
otherwise we have to jump into proper target. */
if (e && e->dest != ENTRY_BLOCK_PTR->next_bb)
{
tree label = tree_block_label (e->dest);
emit_jump (label_rtx (label));
flags = 0;
}
else
flags = EDGE_FALLTHRU;
init_block = create_basic_block (NEXT_INSN (get_insns ()),
get_last_insn (),
ENTRY_BLOCK_PTR);
init_block->frequency = ENTRY_BLOCK_PTR->frequency;
init_block->count = ENTRY_BLOCK_PTR->count;
if (e)
{
first_block = e->dest;
redirect_edge_succ (e, init_block);
e = make_edge (init_block, first_block, flags);
}
else
e = make_edge (init_block, EXIT_BLOCK_PTR, EDGE_FALLTHRU);
e->probability = REG_BR_PROB_BASE;
e->count = ENTRY_BLOCK_PTR->count;
update_bb_for_insn (init_block);
return init_block;
}
static bool
commit_mode_sets (struct edge_list *edge_list, int e, struct bb_info *info)
{
bool need_commit = false;
for (int ed = NUM_EDGES (edge_list) - 1; ed >= 0; ed--)
{
edge eg = INDEX_EDGE (edge_list, ed);
int mode;
if ((mode = (int)(intptr_t)(eg->aux)) != -1)
{
HARD_REG_SET live_at_edge;
basic_block src_bb = eg->src;
int cur_mode = info[src_bb->index].mode_out;
rtx_insn *mode_set;
REG_SET_TO_HARD_REG_SET (live_at_edge, df_get_live_out (src_bb));
rtl_profile_for_edge (eg);
start_sequence ();
targetm.mode_switching.emit (e, mode, cur_mode, live_at_edge);
mode_set = get_insns ();
end_sequence ();
default_rtl_profile ();
/* Do not bother to insert empty sequence. */
if (mode_set == NULL)
continue;
/* We should not get an abnormal edge here. */
gcc_assert (! (eg->flags & EDGE_ABNORMAL));
need_commit = true;
insert_insn_on_edge (mode_set, eg);
}
}
return need_commit;
}
void
verify_insn_chain (void)
{
rtx x, prevx, nextx;
int insn_cnt1, insn_cnt2;
for (prevx = NULL, insn_cnt1 = 1, x = get_insns ();
x != 0;
prevx = x, insn_cnt1++, x = NEXT_INSN (x))
gcc_assert (PREV_INSN (x) == prevx);
gcc_assert (prevx == get_last_insn ());
for (nextx = NULL, insn_cnt2 = 1, x = get_last_insn ();
x != 0;
nextx = x, insn_cnt2++, x = PREV_INSN (x))
gcc_assert (NEXT_INSN (x) == nextx);
gcc_assert (insn_cnt1 == insn_cnt2);
}
static unsigned int arm_pertask_ssp_rtl_execute(void)
{
rtx_insn *insn;
for (insn = get_insns(); insn; insn = NEXT_INSN(insn)) {
const char *sym;
rtx body;
rtx mask, masked_sp;
/*
* Find a SET insn involving a SYMBOL_REF to __stack_chk_guard
*/
if (!INSN_P(insn))
continue;
body = PATTERN(insn);
if (GET_CODE(body) != SET ||
GET_CODE(SET_SRC(body)) != SYMBOL_REF)
continue;
sym = XSTR(SET_SRC(body), 0);
if (strcmp(sym, "__stack_chk_guard"))
continue;
/*
* Replace the source of the SET insn with an expression that
* produces the address of the copy of the stack canary value
* stored in struct thread_info
*/
mask = GEN_INT(sext_hwi(sp_mask, GET_MODE_PRECISION(Pmode)));
masked_sp = gen_reg_rtx(Pmode);
emit_insn_before(gen_rtx_set(masked_sp,
gen_rtx_AND(Pmode,
stack_pointer_rtx,
mask)),
insn);
SET_SRC(body) = gen_rtx_PLUS(Pmode, masked_sp,
GEN_INT(canary_offset));
}
return 0;
}
static void
purge_reg_equiv_notes (void)
{
rtx insn;
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
{
while (1)
{
rtx note = find_reg_note (insn, REG_EQUIV, 0);
if (note)
{
/* Remove the note and keep looking at the notes for
this insn. */
remove_note (insn, note);
continue;
}
break;
}
}
}
static inline rtx
emit_partition_copy (rtx dest, rtx src, int unsignedsrcp, tree sizeexp)
{
rtx seq;
start_sequence ();
if (GET_MODE (src) != VOIDmode && GET_MODE (src) != GET_MODE (dest))
src = convert_to_mode (GET_MODE (dest), src, unsignedsrcp);
if (GET_MODE (src) == BLKmode)
{
gcc_assert (GET_MODE (dest) == BLKmode);
emit_block_move (dest, src, expr_size (sizeexp), BLOCK_OP_NORMAL);
}
else
emit_move_insn (dest, src);
seq = get_insns ();
end_sequence ();
return seq;
}
/* Spill pseudos which are assigned to hard registers in SET. Add
affected insns for processing in the subsequent constraint
pass. */
static void
spill_pseudos (HARD_REG_SET set)
{
int i;
bitmap_head to_process;
rtx_insn *insn;
if (hard_reg_set_empty_p (set))
return;
if (lra_dump_file != NULL)
{
fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (TEST_HARD_REG_BIT (set, i))
fprintf (lra_dump_file, " %d", i);
fprintf (lra_dump_file, "\n");
}
bitmap_initialize (&to_process, ®_obstack);
for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
&& overlaps_hard_reg_set_p (set,
PSEUDO_REGNO_MODE (i), reg_renumber[i]))
{
if (lra_dump_file != NULL)
fprintf (lra_dump_file, " Spilling r%d(%d)\n",
i, reg_renumber[i]);
reg_renumber[i] = -1;
bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
}
IOR_HARD_REG_SET (lra_no_alloc_regs, set);
for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
if (bitmap_bit_p (&to_process, INSN_UID (insn)))
{
lra_push_insn (insn);
lra_set_used_insn_alternative (insn, -1);
}
bitmap_clear (&to_process);
}
void
verify_insn_chain (void)
{
rtx x, prevx, nextx;
int insn_cnt1, insn_cnt2;
for (prevx = NULL, insn_cnt1 = 1, x = get_insns ();
x != 0;
prevx = x, insn_cnt1++, x = NEXT_INSN (x))
if (PREV_INSN (x) != prevx)
abort ();
if (prevx != get_last_insn ())
abort ();
for (nextx = NULL, insn_cnt2 = 1, x = get_last_insn ();
x != 0;
nextx = x, insn_cnt2++, x = PREV_INSN (x))
if (NEXT_INSN (x) != nextx)
abort ();
if (insn_cnt1 != insn_cnt2)
abort ();
}
