static uint8 at_get_htw(char *ret_buf)
{
struct ther_info *ti = get_ti();
return sprintf((char *)ret_buf, "%d,%d,%d\n",
ti->warning_enabled, ti->high_temp_threshold, ti->next_warning_threshold);
}
static uint8 at_test(char *ret_buf)
{
struct ther_info *ti = get_ti();
bool ret = TRUE;
{
int16 temp = -38.46 * 100;
uint8 first_num, sec_num, third_num, forth_num;
first_num = temp / 1000;
sec_num = (temp / 100) % 10;
third_num = (temp / 10) % 10;
forth_num = temp % 10;
print(LOG_DBG, "%d, %d, %d, %d\n", first_num, sec_num, third_num, forth_num);
temp = -temp;
first_num = temp / 1000;
sec_num = (temp / 100) % 10;
third_num = (temp / 10) % 10;
forth_num = temp % 10;
print(LOG_DBG, "%d, %d, %d, %d\n", first_num, sec_num, third_num, forth_num);
}
if (ret)
return sprintf((char *)ret_buf, "OK\n");
else
return sprintf((char *)ret_buf, "ERROR\n");
}
static uint8 at_srestore(char *ret_buf)
{
uint8 *data;
uint16 len;
uint16 offset = 0;
struct temp_data *td;
struct ther_info *ti = get_ti();
if (ti->mode != CAL_MODE)
enter_cal_mode(ti);
storage_restore_temp(&data, &len);
if (data) {
print(LOG_DBG, "get data len %d\n", len);
for (offset = 0; offset < len; offset += sizeof(struct temp_data)) {
td = (struct temp_data *)(data + offset);
print(LOG_DBG, "%d-%02d-%02d %02d:%02d:%02d, temp %lx\n",
td->year, td->month, td->day, td->hour, td->minutes, td->seconds,
td->temp);
}
}
return 0;
}
static uint8 at_enter_cal_mode(char *ret_buf)
{
struct ther_info *ti = get_ti();
if (ti->mode != CAL_MODE)
enter_cal_mode(ti);
return sprintf((char *)ret_buf, "%s\n", "OK");
}
static uint8 at_stest(char *ret_buf)
{
struct ther_info *ti = get_ti();
if (ti->mode != CAL_MODE)
enter_cal_mode(ti);
storage_test();
return 0;
}
static uint8 at_set_temp_cal(char *ret_buf, float B_delta, float R25_delta)
{
struct ther_info *ti = get_ti();
if (ti->mode != CAL_MODE)
enter_cal_mode(ti);
ther_set_temp_delta(B_delta, R25_delta);
return sprintf((char *)ret_buf, "%s\n", "OK");
}
static uint8 at_set_adc1_k(char *ret_buf, float k)
{
struct ther_info *ti = get_ti();
if (ti->mode != CAL_MODE)
enter_cal_mode(ti);
ther_set_adc1_k(k);
return sprintf((char *)ret_buf, "%s\n", "OK");
}
static uint8 at_set_adc0_delta(char *ret_buf, short delta)
{
struct ther_info *ti = get_ti();
if (ti->mode != CAL_MODE)
enter_cal_mode(ti);
ther_set_adc0_delta(delta);
return sprintf((char *)ret_buf, "%s\n", "OK");
}
static uint8 at_serase(char *ret_buf)
{
struct ther_info *ti = get_ti();
if (ti->mode != CAL_MODE)
enter_cal_mode(ti);
if (storage_erase())
return sprintf((char *)ret_buf, "OK\n");
else
return sprintf((char *)ret_buf, "ERROR\n");
}
static uint8 at_set_high_temp_cal(char *ret_buf, float R_high, float t_high)
{
struct ther_info *ti = get_ti();
if (ti->mode != CAL_MODE)
enter_cal_mode(ti);
if (storage_write_high_temp_cal(R_high, t_high))
return sprintf((char *)ret_buf, "%s\n", "OK");
else
return sprintf((char *)ret_buf, "%s\n", "ERROR");
}
static void cipvs_submit_dest (char *pi, struct ip_vs_dest_entry *de) {
struct ip_vs_stats_user stats = de->stats;
char ti[DATA_MAX_NAME_LEN];
if (0 != get_ti (de, ti, sizeof (ti)))
return;
cipvs_submit_connections (pi, ti, stats.conns);
cipvs_submit_if (pi, "if_packets", ti, stats.inpkts, stats.outpkts);
cipvs_submit_if (pi, "if_octets", ti, stats.inbytes, stats.outbytes);
return;
} /* cipvs_submit_dest */
static uint8 at_get_mode(char *ret_buf)
{
struct ther_info *ti = get_ti();
uint8 cnt;
if (ti->mode == NORMAL_MODE) {
cnt = sprintf((char *)ret_buf, "%s\n", "+MODE:NORMAL");
} else if (ti->mode == CAL_MODE) {
cnt = sprintf((char *)ret_buf, "%s\n", "+MODE:CAL");
} else {
cnt = sprintf((char *)ret_buf, "%s\n", "+MODE:UNKNOWN");
}
return cnt;
}
static uint8 at_exit_cal_mode(char *ret_buf)
{
struct ther_info *ti = get_ti();
/*
* start temp measurement
*/
ther_temp_power_off();
ti->temp_measure_stage = TEMP_STAGE_SETUP;
osal_start_timerEx(ti->task_id, TH_TEMP_MEASURE_EVT, AT_DELAY);
/*
* start batt measurement
*/
osal_start_timerEx(ti->task_id, TH_BATT_EVT, AT_DELAY);
ti->mode = NORMAL_MODE;
return sprintf((char *)ret_buf, "%s\n", "OK");
}
static uint8 at_set_htw(char *ret_buf, uint8 warning_enabled, uint16 high_temp_threshold)
{
struct ther_info *ti = get_ti();
if (!storage_write_high_temp_enabled(warning_enabled)) {
return sprintf((char *)ret_buf, "%s\n", "ERROR");
}
ti->warning_enabled = warning_enabled;
if (!warning_enabled) {
return sprintf((char *)ret_buf, "%s\n", "OK");
}
if (!storage_write_high_temp_threshold(high_temp_threshold)) {
return sprintf((char *)ret_buf, "%s\n", "ERROR");
}
ti->high_temp_threshold = high_temp_threshold;
ti->next_warning_threshold = ti->high_temp_threshold;
return sprintf((char *)ret_buf, "%s\n", "OK");
}
long fpga_unlocked_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
{
switch (cmd) {
case FPGA_IOCTL_ALL_IN: {
struct fpga_ram *raw_data = (struct fpga_ram *)arg;
if (!access_ok(VERIFY_WRITE, raw_data, sizeof(struct fpga_ram)))
return -EFAULT;
if (__get_ti(raw_data->ti_raw) || __get_ai(raw_data->ai_raw)
|| __get_di(raw_data->di_raw) || __get_cnt(raw_data->cnt_raw))
return -EFAULT;
FPGA_IOCTL_MSG("FPGA_IOCTL_ALL_IN");
break;
}
case FPGA_IOCTL_ALL_TI: {
fpga_ti_t __user *ti_dat = (fpga_ti_t __user *)arg;
/* int j; */
if (get_ti(ti_dat))
return -EFAULT;
/* for (j = 0; j < TI_PORT_SIZE ;j++) */
/* printk(KERN_NOTICE "#%d : %x, ", j, ti_dat[j]); */
/* printk(KERN_NOTICE "\n"); */
FPGA_IOCTL_MSG("FPGA_IOCTL_ALL_TI");
break;
}
case FPGA_IOCTL_ALL_AI: {
fpga_ai_t __user *ai_dat = (fpga_ai_t __user *)arg;
if (get_ai(ai_dat))
return -EFAULT;
FPGA_IOCTL_MSG("FPGA_IOCTL_ALL_AI");
break;
}
case FPGA_IOCTL_ALL_CNT: {
fpga_cnt_t __user *cnt_dat = (fpga_cnt_t __user *)arg;
if (get_cnt(cnt_dat))
return -EFAULT;
FPGA_IOCTL_MSG("FPGA_IOCTL_ALL_CNT");
break;
}
case FPGA_IOCTL_ALL_DI: {
fpga_di_t __user *di_dat = (fpga_di_t __user *)arg;
if (get_di(di_dat))
return -EFAULT;
FPGA_IOCTL_MSG("FPGA_IOCTL_ALL_DI");
break;
}
case FPGA_IOCTL_ALL_AO: {
fpga_ao_t __user *ao_dat = (fpga_ao_t __user *)arg;
if (put_ao(ao_dat))
return -EFAULT;
FPGA_IOCTL_MSG("FPGA_IOCTL_ALL_AO");
break;
}
case FPGA_IOCTL_ALL_DO: {
fpga_do_t __user *do_dat = (fpga_do_t __user *)arg;
if (put_do(do_dat))
return -EFAULT;
FPGA_IOCTL_MSG("FPGA_IOCTL_ALL_DO");
break;
}
case FPGA_IOCTL_CONF_DI: {
fpga_di_cnf_t __user *di_cnf = (fpga_di_cnf_t __user *)arg;
if (put_di_conf(di_cnf))
return -EFAULT;
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_DI");
break;
}
case FPGA_IOCTL_CONF_DO: {
fpga_do_cnf_t __user *do_cnf = (fpga_do_cnf_t __user *)arg;
if (put_do_conf(do_cnf))
return -EFAULT;
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_DO");
break;
}
case FPGA_IOCTL_CONF_TI: {
fpga_ti_cnf_t __user *ti_cnf = (fpga_ti_cnf_t __user *)arg;
if (put_ti_conf(ti_cnf))
return -EFAULT;
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_TI");
break;
}
case FPGA_IOCTL_CONF_AI: {
fpga_ai_cnf_t __user *ai_cnf = (fpga_ai_cnf_t __user *)arg;
if (put_ai_conf(ai_cnf))
return -EFAULT;
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AI");
break;
}
case FPGA_IOCTL_CONF_CNT: {
fpga_cnt_cnf_t __user *cnt_cnf = (fpga_cnt_cnf_t __user *)arg;
if (put_cnt_conf(cnt_cnf))
return -EFAULT;
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_CNT");
break;
}
case FPGA_IOCTL_CONF_AO_GAIN_A: {
if(arg)
dac8228_config_reg |= 1<<DAC8228_GAIN_A;
else
dac8228_config_reg &= ~(1<<DAC8228_GAIN_A);
fpga_write32(FPGA_ADD_AO_CONF_GAIN_A, dac8228_config_reg);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_GAIN_A");
break;
}
case FPGA_IOCTL_CONF_AO_GAIN_B: {
if(arg)
dac8228_config_reg |= 1<<DAC8228_GAIN_B;
else
dac8228_config_reg &= ~(1<<DAC8228_GAIN_B);
fpga_write32(FPGA_ADD_AO_CONF_GAIN_B, dac8228_config_reg);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_GAIN_B");
break;
}
case FPGA_IOCTL_CONF_AO_SCE: {
if(arg)
dac8228_config_reg |= 1<<DAC8228_SCE;
else
dac8228_config_reg &= ~(1<<DAC8228_SCE);
fpga_write32(FPGA_ADD_AO_CONF_SCE, dac8228_config_reg);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_SCE");
break;
}
case FPGA_IOCTL_CONF_AO_CLEAR: {
PUT_CONF(fpga_ao_clear_t, arg, FPGA_ADD_AO_CONF_CLEAR);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_CLEAR");
break;
}
case FPGA_IOCTL_CONF_AO_OFFSET_A: {
PUT_CONF(fpga_ao_offset_a_t, arg, FPGA_ADD_AO_CONF_OFFSET_A);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_OFFSET_A");
break;
}
case FPGA_IOCTL_CONF_AO_OFFSET_B: {
PUT_CONF(fpga_ao_offset_b_t, arg, FPGA_ADD_AO_CONF_OFFSET_B);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_OFFSET_B");
break;
}
case FPGA_IOCTL_CONF_AO_ZERO_0: {
PUT_CONF(fpga_ao_zero_t, arg, FPGA_ADD_AO_CONF_ZERO_0);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_ZERO_0");
break;
}
case FPGA_IOCTL_CONF_AO_ZERO_1: {
PUT_CONF(fpga_ao_zero_t, arg, FPGA_ADD_AO_CONF_ZERO_1);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_ZERO_1");
break;
}
case FPGA_IOCTL_CONF_AO_ZERO_2: {
PUT_CONF(fpga_ao_zero_t, arg, FPGA_ADD_AO_CONF_ZERO_2);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_ZERO_2");
break;
}
case FPGA_IOCTL_CONF_AO_ZERO_3: {
PUT_CONF(fpga_ao_zero_t, arg, FPGA_ADD_AO_CONF_ZERO_3);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_ZERO_3");
break;
}
case FPGA_IOCTL_CONF_AO_ZERO_4: {
PUT_CONF(fpga_ao_zero_t, arg, FPGA_ADD_AO_CONF_ZERO_4);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_ZERO_4");
break;
}
case FPGA_IOCTL_CONF_AO_ZERO_5: {
PUT_CONF(fpga_ao_zero_t, arg, FPGA_ADD_AO_CONF_ZERO_5);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_ZERO_5");
break;
}
case FPGA_IOCTL_CONF_AO_ZERO_6: {
PUT_CONF(fpga_ao_zero_t, arg, FPGA_ADD_AO_CONF_ZERO_6);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_ZERO_6");
break;
}
case FPGA_IOCTL_CONF_AO_ZERO_7: {
PUT_CONF(fpga_ao_zero_t, arg, FPGA_ADD_AO_CONF_ZERO_7);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_ZERO_7");
break;
}
case FPGA_IOCTL_CONF_AO_GAIN_0: {
PUT_CONF(fpga_ao_gain_t, arg, FPGA_ADD_AO_CONF_GAIN_0);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_GAIN_0");
break;
}
case FPGA_IOCTL_CONF_AO_GAIN_1: {
PUT_CONF(fpga_ao_gain_t, arg, FPGA_ADD_AO_CONF_GAIN_1);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_GAIN_1");
break;
}
case FPGA_IOCTL_CONF_AO_GAIN_2: {
PUT_CONF(fpga_ao_gain_t, arg, FPGA_ADD_AO_CONF_GAIN_2);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_GAIN_2");
break;
}
case FPGA_IOCTL_CONF_AO_GAIN_3: {
PUT_CONF(fpga_ao_gain_t, arg, FPGA_ADD_AO_CONF_GAIN_3);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_GAIN_3");
break;
}
case FPGA_IOCTL_CONF_AO_GAIN_4: {
PUT_CONF(fpga_ao_gain_t, arg, FPGA_ADD_AO_CONF_GAIN_4);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_GAIN_4");
break;
}
case FPGA_IOCTL_CONF_AO_GAIN_5: {
PUT_CONF(fpga_ao_gain_t, arg, FPGA_ADD_AO_CONF_GAIN_5);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_GAIN_5");
break;
}
case FPGA_IOCTL_CONF_AO_GAIN_6: {
PUT_CONF(fpga_ao_gain_t, arg, FPGA_ADD_AO_CONF_GAIN_6);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_GAIN_6");
break;
}
case FPGA_IOCTL_CONF_AO_GAIN_7: {
PUT_CONF(fpga_ao_gain_t, arg, FPGA_ADD_AO_CONF_GAIN_7);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_GAIN_7");
break;
}
case FPGA_IOCTL_CONF_AO_FORM: {
PUT_CONF(fpga_ao_form_t, arg, FPGA_ADD_AO_CONF_FORM);
FPGA_IOCTL_MSG("FPGA_IOCTL_CONF_AO_FORM");
break;
}
default :
printk(KERN_WARNING "fpga: ERROR ioctl command : %u.\n", cmd);
return -EINVAL;
break;
}
return 0;
}