void sab8253x_init_lineS(struct sab_port *port)
{
unsigned char stat;
if(port->chip->c_cim)
{
if(port->chip->c_cim->ci_type == CIM_SP502)
{
aura_sp502_program(port, SP502_OFF_MODE);
}
}
/*
* Wait for any commands or immediate characters
*/
sab8253x_cec_wait(port);
#if 0
sab8253x_tec_wait(port); /* I have to think about this one
* should I assume the line was
* previously in async mode*/
#endif
/*
* Clear the FIFO buffers.
*/
WRITEB(port, cmdr, SAB82532_CMDR_RHR);
sab8253x_cec_wait(port);
WRITEB(port,cmdr,SAB82532_CMDR_XRES);
/*
* Clear the interrupt registers.
*/
stat = READB(port, isr0); /* acks ints */
stat = READB(port, isr1);
/*
* Now, initialize the UART
*/
WRITEB(port, ccr0, 0); /* power-down */
WRITEB(port, ccr0, getccr0configS(port));
WRITEB(port, ccr1, getccr1configS(port));
WRITEB(port, ccr2, getccr2configS(port));
WRITEB(port, ccr3, getccr3configS(port));
WRITEB(port, ccr4, getccr4configS(port)); /* 32 byte receive fifo */
WRITEB(port, mode, getmodeS(port));
WRITEB(port, tic /* really rlcr */, getrlcrconfigS(port));
/* power-up */
switch(port->ccontrol.ccr4 & SAB82532_CCR4_RF02)
{
case SAB82532_CCR4_RF32:
port->recv_fifo_size = 32;
break;
case SAB82532_CCR4_RF16:
port->recv_fifo_size = 16;
break;
case SAB82532_CCR4_RF04:
port->recv_fifo_size = 4;
break;
case SAB82532_CCR4_RF02:
port->recv_fifo_size = 2;
break;
default:
port->recv_fifo_size = 32;
port->ccontrol.ccr4 &= ~SAB82532_CCR4_RF02;
break;
}
if(port->ccontrol.ccr2 & SAB82532_CCR2_TOE)
{
RAISE(port, txclkdir);
}
else
{
LOWER(port, txclkdir);
}
SET_REG_BIT(port,ccr0,SAB82532_CCR0_PU);
if(port->chip->c_cim)
{
if(port->chip->c_cim->ci_type == CIM_SP502)
{
aura_sp502_program(port, port->sigmode);
}
}
}
static void sab8253x_check_statusS(struct sab_port *port,
union sab8253x_irq_status *stat)
{
struct tty_struct *tty = port->tty;
int modem_change = 0;
mctlsig_t *sig;
if (!tty)
{
return;
}
/* check_modem:*/
/* Checking DCD */
sig = &port->dcd;
if (stat->images[sig->irq] & sig->irqmask)
{
sig->val = ISON(port,dcd);
port->icount.dcd++;
modem_change++;
}
/* Checking CTS */
sig = &port->cts;
if (stat->images[sig->irq] & sig->irqmask)
{
sig->val = ISON(port,cts);
port->icount.cts++;
modem_change++;
}
/* Checking DSR */
sig = &port->dsr;
if (stat->images[sig->irq] & sig->irqmask)
{
sig->val = ISON(port,dsr);
port->icount.dsr++;
modem_change++;
}
if (modem_change)
{
wake_up_interruptible(&port->delta_msr_wait);
}
sig = &port->dcd;
if ((port->flags & FLAG8253X_CHECK_CD) &&
(stat->images[sig->irq] & sig->irqmask))
{
if (sig->val)
{
wake_up_interruptible(&port->open_wait);
}
else if (!((port->flags & FLAG8253X_CALLOUT_ACTIVE) &&
(port->flags & FLAG8253X_CALLOUT_NOHUP)))
{
#if 0 /* requires more investigation */
MOD_INC_USE_COUNT;
if (schedule_task(&port->tqueue_hangup) == 0)
{
MOD_DEC_USE_COUNT;
}
#endif
}
}
sig = &port->cts;
if (port->flags & FLAG8253X_CTS_FLOW)
{ /* not setting this yet */
if (port->tty->hw_stopped)
{
if (sig->val)
{
port->tty->hw_stopped = 0;
sab8253x_sched_event(port, SAB8253X_EVENT_WRITE_WAKEUP);
sab8253x_start_txS(port);
}
}
else
{
if(!(getccr2configS(port) & SAB82532_CCR2_TOE))
{
if (!(sig->val))
{
port->tty->hw_stopped = 1;
}
}
}
}
}
