/*! \brief Starts the ABDAC.
* \param sample_rate_hz Sample rate for the ABDAC.
* \param num_channels number of channel
* \param bits_per_sample number of bit per sample
* \param swap_channels true -> swap the channels
* \param callback Provide a functions that handles callback.
* \param callback_opt Callback flag
* \param pba_hz Speed of the peripheral bus A.
*/
void tpa6130_dac_start(uint32_t sample_rate_hz,
uint8_t num_channels,
uint8_t bits_per_sample,
bool swap_channels,
void (*callback)(uint32_t arg),
uint32_t callback_opt,
uint32_t pba_hz)
{
/* stop ABDAC if running*/
tpa6130_dac_stop();
/* configure used pins for ABDAC */
gpio_enable_module(TPA6130_ABDAC_GPIO_MAP,
sizeof(TPA6130_ABDAC_GPIO_MAP) /
sizeof(TPA6130_ABDAC_GPIO_MAP[0]));
/* configure and start PDC and ABDAC*/
tpa6130_dac_setup(sample_rate_hz,
num_channels,
bits_per_sample,
swap_channels,
callback,
callback_opt,
pba_hz);
/* Register a interrupt service routine for the ABDAC channel of
* the PDCA
*/
irq_register_handler(tpa6130_abdac_tx_pdca_int_handler, TPA6130_ABDAC_PDCA_IRQ, 1);
tpa6130_powerup();
}
//! this function initializes the USART module at "EXAMPLE_USART_BAUDRATE" bauds
void dsp_debug_init(int fosc)
{
static const gpio_map_t USART_GPIO_MAP =
{
{EXAMPLE_USART_RX_PIN, EXAMPLE_USART_RX_FUNCTION},
{EXAMPLE_USART_TX_PIN, EXAMPLE_USART_TX_FUNCTION}
};
// Configuration structure for the USART module
static const usart_options_t USART_OPTIONS =
{
// Baudrate
.baudrate = EXAMPLE_USART_BAUDRATE,
// Number of bits per character
.charlength = EXAMPLE_USART_BITSPERCHAR,
// Parity
.paritytype = EXAMPLE_USART_PARITY,
// Stop bit
.stopbits = EXAMPLE_USART_STOPBIT,
// Mode normal
.channelmode = USART_NORMAL_CHMODE
};
// Assign GPIO to USART.
gpio_enable_module(USART_GPIO_MAP,
sizeof(USART_GPIO_MAP) / sizeof(USART_GPIO_MAP[0]));
// Initialize USART in RS232 mode.
usart_init_rs232(EXAMPLE_USART, &USART_OPTIONS, fosc);
// New window
dsp_debug_print_fct("\x0C\r\n");
}
/*! \brief Initializes SD/MMC resources: GPIO, MCI and SD/MMC.
*/
static void sd_mmc_mci_resources_init(void)
{
static const gpio_map_t SD_MMC_MCI_GPIO_MAP = {
{SD_SLOT_8BITS_CLK_PIN, SD_SLOT_8BITS_CLK_FUNCTION}, // SD CLK.
{SD_SLOT_8BITS_CMD_PIN, SD_SLOT_8BITS_CMD_FUNCTION}, // SD CMD.
{SD_SLOT_8BITS_DATA0_PIN, SD_SLOT_8BITS_DATA0_FUNCTION}, // SD DAT[0].
{SD_SLOT_8BITS_DATA1_PIN, SD_SLOT_8BITS_DATA1_FUNCTION}, // DATA Pin.
{SD_SLOT_8BITS_DATA2_PIN, SD_SLOT_8BITS_DATA2_FUNCTION}, // DATA Pin.
{SD_SLOT_8BITS_DATA3_PIN, SD_SLOT_8BITS_DATA3_FUNCTION}, // DATA Pin.
{SD_SLOT_8BITS_DATA4_PIN, SD_SLOT_8BITS_DATA4_FUNCTION}, // DATA Pin.
{SD_SLOT_8BITS_DATA5_PIN, SD_SLOT_8BITS_DATA5_FUNCTION}, // DATA Pin.
{SD_SLOT_8BITS_DATA6_PIN, SD_SLOT_8BITS_DATA6_FUNCTION}, // DATA Pin.
{SD_SLOT_8BITS_DATA7_PIN, SD_SLOT_8BITS_DATA7_FUNCTION} // DATA Pin.
};
// MCI options.
static const mci_options_t MCI_OPTIONS = {
.card_speed = 400000,
.card_slot = SD_SLOT_8BITS, // Default card initialization.
};
// Assign I/Os to MCI.
gpio_enable_module(SD_MMC_MCI_GPIO_MAP,
sizeof(SD_MMC_MCI_GPIO_MAP) /
sizeof(SD_MMC_MCI_GPIO_MAP[0]));
// Enable pull-up for Card Detect.
gpio_enable_pin_pull_up(SD_SLOT_8BITS_CARD_DETECT);
// Enable pull-up for Write Protect.
gpio_enable_pin_pull_up(SD_SLOT_8BITS_WRITE_PROTECT);
sd_mmc_mci_init(&MCI_OPTIONS, sysclk_get_pbb_hz(), sysclk_get_cpu_hz());
}
//! Initialize the PWM to make it works as a DAC
void dac_pwm_init()
{
static const gpio_map_t DAC_PWM_GPIO_MAP =
{
{ATPASTE4(AVR32_PWM_, DAC_PWM_CHANNEL_LSB, DAC_PWM_CHANNEL_LSB_PIN, _PIN),
ATPASTE4(AVR32_PWM_, DAC_PWM_CHANNEL_LSB, DAC_PWM_CHANNEL_LSB_PIN, _FUNCTION)},
{ATPASTE4(AVR32_PWM_, DAC_PWM_CHANNEL_MSB, DAC_PWM_CHANNEL_MSB_PIN, _PIN),
ATPASTE4(AVR32_PWM_, DAC_PWM_CHANNEL_MSB, DAC_PWM_CHANNEL_MSB_PIN, _FUNCTION)}
};
INTC_register_interrupt(&dac_pwm_int_handler, AVR32_PWM_IRQ, AVR32_INTC_INT3);
gpio_enable_module(DAC_PWM_GPIO_MAP, sizeof(DAC_PWM_GPIO_MAP) / sizeof(DAC_PWM_GPIO_MAP[0]));
AVR32_PWM.channel[DAC_PWM_CHANNEL_LSB].cmr = ((AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) |
AVR32_PWM_CPOL_MASK) &
~(AVR32_PWM_CALG_MASK |
AVR32_PWM_CPD_MASK);
AVR32_PWM.channel[DAC_PWM_CHANNEL_LSB].cprd = 0x000000FF;
AVR32_PWM.channel[DAC_PWM_CHANNEL_LSB].cdty = 0x00;
AVR32_PWM.channel[DAC_PWM_CHANNEL_MSB].cmr = ((AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) |
AVR32_PWM_CPOL_MASK) &
~(AVR32_PWM_CALG_MASK |
AVR32_PWM_CPD_MASK);
AVR32_PWM.channel[DAC_PWM_CHANNEL_MSB].cprd = 0x000000FF;
AVR32_PWM.channel[DAC_PWM_CHANNEL_MSB].cdty = 0x80;
AVR32_PWM.ena = (1 << DAC_PWM_CHANNEL_LSB) | (1 << DAC_PWM_CHANNEL_MSB);
AVR32_PWM.ier = (1 << DAC_PWM_CHANNEL_LSB) | (1 << DAC_PWM_CHANNEL_MSB);
}
void ms3_dac_mute(bool mute)
{
if (mute) {
U32 save_dac_reload_callback_opt;
// Mute all channels
// ms3_write_reg(MS3_MUTE_VOL_CTRL, 0xAF);
// Disable the reload callback function
save_dac_reload_callback_opt = ms3_output_params.callback_opt;
ms3_output_params.callback_opt = 0;
// Disable the transfer complete interruption and wait until the transfer is complete
pdca_disable_interrupt_reload_counter_zero(MS3_SSC_TX_PDCA_CHANNEL);
while (!(pdca_get_transfer_status(MS3_SSC_TX_PDCA_CHANNEL) & PDCA_TRANSFER_COMPLETE));
// Re-enable the reload callback function
ms3_output_params.callback_opt = save_dac_reload_callback_opt;
// Set as gpio pin
gpio_enable_gpio(MS3_GPIO_MAP, sizeof(MS3_GPIO_MAP) / sizeof(MS3_GPIO_MAP[0]));
}
else {
// Re-enable the reload interrupt
pdca_enable_interrupt_reload_counter_zero(MS3_SSC_TX_PDCA_CHANNEL);
// Unmute all channels
// ms3_write_reg(MS3_MUTE_VOL_CTRL, 0xA0);
// Enable SSC interface
gpio_enable_module(MS3_GPIO_MAP, sizeof(MS3_GPIO_MAP) / sizeof(MS3_GPIO_MAP[0]));
}
}
/*! \brief create ethernet task, for ethernet management.
*
* \param uxPriority Input. priority for the task, it should be low
*
*/
void init_ethernet(pcl_freq_param_t *param)
{
static const gpio_map_t MACB_GPIO_MAP =
{
{EXTPHY_MACB_MDC_PIN, EXTPHY_MACB_MDC_FUNCTION },
{EXTPHY_MACB_MDIO_PIN, EXTPHY_MACB_MDIO_FUNCTION },
{EXTPHY_MACB_RXD_0_PIN, EXTPHY_MACB_RXD_0_FUNCTION },
{EXTPHY_MACB_TXD_0_PIN, EXTPHY_MACB_TXD_0_FUNCTION },
{EXTPHY_MACB_RXD_1_PIN, EXTPHY_MACB_RXD_1_FUNCTION },
{EXTPHY_MACB_TXD_1_PIN, EXTPHY_MACB_TXD_1_FUNCTION },
{EXTPHY_MACB_TX_EN_PIN, EXTPHY_MACB_TX_EN_FUNCTION },
{EXTPHY_MACB_RX_ER_PIN, EXTPHY_MACB_RX_ER_FUNCTION },
{EXTPHY_MACB_RX_DV_PIN, EXTPHY_MACB_RX_DV_FUNCTION },
{EXTPHY_MACB_TX_CLK_PIN, EXTPHY_MACB_TX_CLK_FUNCTION}
};
// Assign GPIO to MACB
gpio_enable_module(MACB_GPIO_MAP,
sizeof(MACB_GPIO_MAP) / sizeof(MACB_GPIO_MAP[0]));
/* Initialize timer for lwIP calls; generates interrupts every 1ms */
init_timer(param->pba_f);
/* Initialize lwIP. */
lwip_init();
/* Set hw and IP parameters, initialize MACB too */
prvEthernetConfigureInterface(NULL);
#if defined(HTTP_RAW_USED)
/* Bring up the web server */
httpd_init();
#endif
}
void init_dbg_rs232_ex(unsigned long baudrate, long pba_hz)
{
static const gpio_map_t DBG_USART_GPIO_MAP =
{
{DBG_USART_RX_PIN, DBG_USART_RX_FUNCTION},
{DBG_USART_TX_PIN, DBG_USART_TX_FUNCTION}
};
// Options for debug USART.
usart_options_t dbg_usart_options =
{
.baudrate = baudrate,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
// Setup GPIO for debug USART.
gpio_enable_module(DBG_USART_GPIO_MAP,
sizeof(DBG_USART_GPIO_MAP) / sizeof(DBG_USART_GPIO_MAP[0]));
// Initialize it in RS232 mode.
usart_init_rs232(DBG_USART, &dbg_usart_options, pba_hz);
}
#if RELEASEBUILD==1
void print_dbg(const char *str) { ;; }
///< Initializes ADC (configures Pins, starts Clock, sets defaults)
void adc_int_init(uint32_t adc_frequency, uint8_t reference_source)
{
///< Assign and enable GPIO pins to the ADC function.
gpio_enable_module(ADCIFA_GPIO_MAP, sizeof(ADCIFA_GPIO_MAP) / sizeof(ADCIFA_GPIO_MAP[0]));
adc_config_options.frequency=adc_frequency;
adc_config_options.reference_source=reference_source;
////</ Get ADCIFA Factory Configuration
adcifa_get_calibration_data(adcifa, (adcifa_opt_t *)&adc_config_options);
if ((uint16_t)adc_config_options.offset_calibration_value == 0xFFFF)
{
///< Set default calibration if Engineering samples and part is not programmed
adc_config_options.offset_calibration_value = 0x3B;
adc_config_options.gain_calibration_value = 0x4210;
adc_config_options.sh0_calibration_value = 0x210;
adc_config_options.sh1_calibration_value = 0x210;
}
adc_config_options.offset_calibration_value = 0x3B; ///< offset correction
///< Configure ADCIFA core
adcifa_configure(adcifa, (adcifa_opt_t *)&adc_config_options, sysclk_get_peripheral_bus_hz((const volatile void *)AVR32_ADCIFA_ADDRESS));
adc_int_clear_sequencer();
continuous_mode=false;
///< Configure ADCIFA sequencer 1
//adcifa_configure_sequencer(adcifa, 1, &adcifa_sequence_opt, adcifa_sequencer1_conversion_opt);
adcifa_disable_interrupt(adcifa, 0xffffffff);
INTC_register_interrupt( (__int_handler) &process_data, AVR32_ADCIFA_SEQUENCER0_IRQ, AVR32_INTC_INT1);
//INTC_register_interrupt( (__int_handler) &process_data, AVR32_ADCIFA_SEQUENCER1_IRQ, AVR32_INTC_INT1);
//int32_t period_us=1000000 / samplingrate;
}
int I2C_init( void ) {
twi_options_t opt;
twi_slave_fct_t twi_slave_fct;
int status;
double total = 0;
// Initialize and enable interrupt
irq_initialize_vectors();
cpu_irq_enable();
// TWI gpio pins configuration
gpio_enable_module(TWI_GPIO_MAP, sizeof(TWI_GPIO_MAP) / sizeof(TWI_GPIO_MAP[0]));
// initialize the interrupt flag for alerting the Pi of new data (TWI = Three Wire Interface for us)
ioport_enable_pin(I2C_FLAG);
ioport_set_pin_dir(I2C_FLAG,IOPORT_DIR_OUTPUT);
ioport_set_pin_level(I2C_FLAG,false);
// options settings
opt.pba_hz = FOSC0;
opt.speed = TWI_SPEED;
opt.chip = EEPROM_ADDRESS;
// initialize TWI driver with options
twi_slave_fct.rx = &twi_slave_rx;
twi_slave_fct.tx = &twi_slave_tx;
twi_slave_fct.stop = &twi_slave_stop;
status = twi_slave_init(&AVR32_TWI, &opt, &twi_slave_fct );
return (&s_memory[0] );
}
/* \breif Initializes the resistive touch screen driver.
*
* This function initializes all peripherals required to detect a touch
* and sample its position on a resistive touch panel. Call this function
* before using any other features of this driver.
*
* The driver is disabled initially, so you must call TOUCH_Enable() before
* any touch events will be detected.
*/
void rtouch_init(void)
{
/* Start with no event handler. */
rtouch.event_handler = NULL;
#ifdef AVR32_ADCIFA
/* GPIO pin/adc-function map. */
static const gpio_map_t ADCIFA_GPIO_MAP = {
{AVR32_ADCREF0_PIN, AVR32_ADCREF0_FUNCTION},
{AVR32_ADCREFP_PIN, AVR32_ADCREFP_FUNCTION},
{AVR32_ADCREFN_PIN, AVR32_ADCREFN_FUNCTION}
};
gpio_enable_module(ADCIFA_GPIO_MAP, sizeof(ADCIFA_GPIO_MAP) /
sizeof(ADCIFA_GPIO_MAP[0]));
#endif
/* Prepare required peripherals. */
rtouch_prepare_adc();
rtouch_prepare_detect();
/* We need to lock the sleep mode, and set a non-disable state for the
* driver, since TOUCH_Disable() will unlock the sleep mode, and also
* check that the driver is not disabled already. */
/* SLEEPMGR_Lock( TOUCH_DETECT_SLEEP_MODE ); */
rtouch.state = RTOUCH_NOT_TOUCHED;
rtouch.last_event.type = RTOUCH_NO_EVENT;
rtouch_disable();
}
/*************************************************************************************************
* ethernet_task
*
* Ethernet task, manages the interface, runs only once
*/
static portTASK_FUNCTION( ethernet_task, pvParameters )
{
static const gpio_map_t MACB_GPIO_MAP =
{
{EXTPHY_MACB_MDC_PIN, EXTPHY_MACB_MDC_FUNCTION },
{EXTPHY_MACB_MDIO_PIN, EXTPHY_MACB_MDIO_FUNCTION },
{EXTPHY_MACB_RXD_0_PIN, EXTPHY_MACB_RXD_0_FUNCTION },
{EXTPHY_MACB_TXD_0_PIN, EXTPHY_MACB_TXD_0_FUNCTION },
{EXTPHY_MACB_RXD_1_PIN, EXTPHY_MACB_RXD_1_FUNCTION },
{EXTPHY_MACB_TXD_1_PIN, EXTPHY_MACB_TXD_1_FUNCTION },
{EXTPHY_MACB_TX_EN_PIN, EXTPHY_MACB_TX_EN_FUNCTION },
{EXTPHY_MACB_RX_ER_PIN, EXTPHY_MACB_RX_ER_FUNCTION },
{EXTPHY_MACB_RX_DV_PIN, EXTPHY_MACB_RX_DV_FUNCTION },
{EXTPHY_MACB_TX_CLK_PIN, EXTPHY_MACB_TX_CLK_FUNCTION}
};
gpio_enable_module(MACB_GPIO_MAP, sizeof(MACB_GPIO_MAP) / sizeof(MACB_GPIO_MAP[0]));
ethernet_init_LwIP();
httpd_init();
ssi_init();
/* Kill this task. */
vTaskDelete(NULL);
}
void board_init(void)
{
gpio_configure_pin(LED0_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH);
gpio_configure_pin(LED1_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH);
#if defined (CONF_BOARD_AT86RFX)
// AT86RFX SPI GPIO options.
static gpio_map_t AT86RFX_SPI_GPIO_MAP =
{
{AT86RFX_SPI_SCK_PIN, AT86RFX_SPI_SCK_FUNCTION },
{AT86RFX_SPI_MISO_PIN, AT86RFX_SPI_MISO_FUNCTION},
{AT86RFX_SPI_MOSI_PIN, AT86RFX_SPI_MOSI_FUNCTION},
{AT86RFX_SPI_NPCS_PIN, AT86RFX_SPI_NPCS_FUNCTION}
};
// Assign GPIO to SPI.
gpio_enable_module(AT86RFX_SPI_GPIO_MAP, sizeof(AT86RFX_SPI_GPIO_MAP) / sizeof(AT86RFX_SPI_GPIO_MAP[0]));
gpio_enable_pin_interrupt(AT86RFX_IRQ_PIN, GPIO_RISING_EDGE);
gpio_clear_pin_interrupt_flag(AT86RFX_IRQ_PIN);
gpio_configure_pin(AT86RFX_RST_PIN, GPIO_DIR_OUTPUT | GPIO_INIT_HIGH);
gpio_configure_pin(AT86RFX_SLP_PIN, GPIO_DIR_OUTPUT | GPIO_INIT_HIGH);
#endif
}
//! @{
void twis_init (void)
{
twis_slave_fct_t twis_slave_fct;
#if BOARD == UC3L_EK
/**
* \internal For UC3L devices, TWI default pins are,
* TWIMS0 -> PB05,PA21
* TWIMS1 -> PB04
* To enable TWI clock/data in another pin, these have
* to be assigned to other peripherals or as GPIO.
* \endinternal
*/
gpio_enable_gpio_pin(AVR32_PIN_PB05);
gpio_enable_gpio_pin(AVR32_PIN_PA21);
#endif
const gpio_map_t TWIS_GPIO_MAP = {
{TEST_TWIS_TWCK_PIN, TEST_TWIS_TWCK_FUNCTION},
{TEST_TWIS_TWD_PIN, TEST_TWIS_TWD_FUNCTION}
};
const twis_options_t TWIS_OPTIONS = {
.pba_hz = FPBA_HZ,
.speed = TWI_SPEED,
.chip = SLAVE_ADDRESS,
.smbus = false,
};
// Assign I/Os to SPI.
gpio_enable_module (TWIS_GPIO_MAP,
sizeof (TWIS_GPIO_MAP) / sizeof (TWIS_GPIO_MAP[0]));
// Set pointer to user specific application routines
twis_slave_fct.rx = &twis_slave_rx;
twis_slave_fct.tx = &twis_slave_tx;
twis_slave_fct.stop = &twis_slave_stop;
// Initialize as master.
twis_slave_init (TWIS, &TWIS_OPTIONS, &twis_slave_fct);
}
//! @}
/*! \brief Main function.
*/
/*! \remarks Main Function
*/
//! @{
int main (void)
{
// Configure the system clock
init_sys_clocks ();
// Init debug serial line
init_dbg_rs232 (FPBA_HZ);
// Display a header to user
print_dbg ("Slave Example\r\n");
print_dbg ("Slave Started\r\n");
// Initialize and enable interrupt
irq_initialize_vectors();
cpu_irq_enable();
// Initialize the TWIS Module
twis_init ();
while (true);
}
static void init_twi(uint32_t fpba_hz)
{
#if(DEFAULT_DACS == AUDIO_MIXER_DAC_ABDAC)
const gpio_map_t TPA6130_TWI_GPIO_MAP =
{
{TPA6130_TWI_SCL_PIN, TPA6130_TWI_SCL_FUNCTION},
{TPA6130_TWI_SDA_PIN, TPA6130_TWI_SDA_FUNCTION}
};
twi_options_t TPA6130_TWI_OPTIONS =
{
.speed = TPA6130_TWI_MASTER_SPEED,
.chip = TPA6130_TWI_ADDRESS
};
TPA6130_TWI_OPTIONS.pba_hz = fpba_hz;
// Assign I/Os to TWI.
gpio_enable_module(TPA6130_TWI_GPIO_MAP,
sizeof(TPA6130_TWI_GPIO_MAP) / sizeof(TPA6130_TWI_GPIO_MAP[0]));
// Initialize as master.
twi_master_init(TPA6130_TWI, &TPA6130_TWI_OPTIONS);
#elif(DEFAULT_DACS == AUDIO_MIXER_DAC_AIC23B)
static const gpio_map_t AIC23B_TWI_GPIO_MAP =
{
{AIC23B_TWI_SCL_PIN, AIC23B_TWI_SCL_FUNCTION},
{AIC23B_TWI_SDA_PIN, AIC23B_TWI_SDA_FUNCTION}
};
static twi_options_t AIC23B_TWI_OPTIONS =
{
.speed = AIC23B_TWI_MASTER_SPEED,
.chip = AIC23B_TWI_ADDRESS
};
AIC23B_TWI_OPTIONS.pba_hz = fpba_hz;
gpio_enable_module(AIC23B_TWI_GPIO_MAP,
sizeof(AIC23B_TWI_GPIO_MAP) / sizeof(AIC23B_TWI_GPIO_MAP[0]));
twi_master_init(AIC23B_TWI, &AIC23B_TWI_OPTIONS);
#endif
}
u16 BUFFERED_SIO_Init (void)
{
// IO mapping
static const gpio_map_t USART_GPIO_MAP = {
{BUFFERED_SIO_USART_RX_PIN, BUFFERED_SIO_USART_RX_FUNCTION},
{BUFFERED_SIO_USART_TX_PIN, BUFFERED_SIO_USART_TX_FUNCTION}
};
// USART options.
static const usart_options_t USART_OPTIONS = {
.baudrate = 57600 * 2,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
// Reset vars
BUFFERED_SIO_TxBuffer_StartPointer = 0;
BUFFERED_SIO_TxBuffer_EndPointer = 0;
BUFFERED_SIO_TxActiv_Sendbytes = 0;
BUFFERED_SIO_RxBuffer_StartPointer = 0;
BUFFERED_SIO_RxBuffer_EndPointer = 0;
#ifdef STICK_20_SEND_DEBUGINFOS_VIA_HID
BUFFERED_SIO_HID_TxBuffer_StartPointer = 0;
BUFFERED_SIO_HID_TxBuffer_EndPointer = 0;
BUFFERED_SIO_HID_TxActiv_Sendbytes = 0;
#endif
// Assign GPIO to USART.
gpio_enable_module (USART_GPIO_MAP, sizeof (USART_GPIO_MAP) / sizeof (USART_GPIO_MAP[0]));
// Initialize USART in RS232 mode.
usart_init_rs232 (BUFFERED_SIO_USART, &USART_OPTIONS, FPBA_HZ);
// Disable all interrupts.
Disable_global_interrupt ();
// Set ISR
INTC_register_interrupt (&BUFFERED_SIO_Usart_ISR, BUFFERED_SIO_USART_IRQ, AVR32_INTC_INT0);
// Enable USART Rx interrupt.
BUFFERED_SIO_USART->IER.rxrdy = 1;
// Enable USART Tx interrupt.
// BUFFERED_SIO_USART->IER.txempty = 1;
// Enable all interrupts.
Enable_global_interrupt ();
return (TRUE);
}
/*! \brief Initialize the USART in SPI mode.
*/
void SPI_Master_Init()
{
/* Assign GPIO to SPI. */
gpio_enable_module(USART_SPI_GPIO_MAP,
sizeof(USART_SPI_GPIO_MAP) /
sizeof(USART_SPI_GPIO_MAP[0]));
/* Initialize USART in SPI Master Mode. */
usart_init_spi_master(QDEBUG_SPI_USART, &USART_SPI_OPTIONS,
QDEBUG_PBA_FREQ_HZ);
}
//! this function initializes the USART module at 115200 bauds
void init_usart()
{
static const gpio_map_t USART_GPIO_MAP =
{
{EXAMPLE_USART_RX_PIN, EXAMPLE_USART_RX_FUNCTION},
{EXAMPLE_USART_TX_PIN, EXAMPLE_USART_TX_FUNCTION}
};
// Configuration structure for the USART module
static const usart_options_t USART_OPTIONS =
{
// Baudrate at 115200 bauds
.baudrate = 115200,
// 8 bits per characters
.charlength = 8,
// No parity
.paritytype = USART_NO_PARITY,
// One stop bit
.stopbits = USART_1_STOPBIT,
// Mode normal
.channelmode = USART_NORMAL_CHMODE
};
// Assign GPIO to USART.
gpio_enable_module(USART_GPIO_MAP,
sizeof(USART_GPIO_MAP) / sizeof(USART_GPIO_MAP[0]));
// Initialize USART in RS232 mode.
usart_init_rs232(EXAMPLE_USART, &USART_OPTIONS, FOSC0*2);
}
//! Read the next block
void set_new_dac_buffer(char *_next_buffer)
{
pbuffer_r = _next_buffer;
predicted_value = *((short *) &pbuffer_r[4]);
step_index = *((short *) &pbuffer_r[6]);
cur_i_read_buffer = 8;
}
/*
* Low-level initialization routine called during startup, before the main
* function.
* This version comes in replacement to the default one provided by the Newlib
* add-ons library.
* Newlib add-ons' _init_startup only calls init_exceptions, but Newlib add-ons'
* exception vectors are not compatible with the SCALL management in the current
* FreeRTOS port. More low-level initializations are besides added here.
*/
int _init_startup(void)
{
/* Import the Exception Vector Base Address. */
extern void _evba;
#if configHEAP_INIT
extern void __heap_start__;
extern void __heap_end__;
portBASE_TYPE *pxMem;
#endif
/* Load the Exception Vector Base Address in the corresponding system register. */
Set_system_register( AVR32_EVBA, ( int ) &_evba );
/* Enable exceptions. */
ENABLE_ALL_EXCEPTIONS();
/* Initialize interrupt handling. */
INTC_init_interrupts();
#if configHEAP_INIT
/* Initialize the heap used by malloc. */
for( pxMem = &__heap_start__; pxMem < ( portBASE_TYPE * )&__heap_end__; )
{
*pxMem++ = 0xA5A5A5A5;
}
#endif
/* Give the used PBA clock frequency to Newlib, so it can work properly. */
set_cpu_hz( configPBA_CLOCK_HZ );
/* Code section present if and only if the debug trace is activated. */
#if configDBG
{
static const gpio_map_t DBG_USART_GPIO_MAP =
{
{ configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
{ configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
};
/* Initialize the USART used for the debug trace with the configured parameters. */
set_usart_base( ( void * ) configDBG_USART );
gpio_enable_module( DBG_USART_GPIO_MAP,
sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
usart_init( configDBG_USART_BAUDRATE );
}
#endif
// Don't-care value for GCC.
return 1;
}
static void twim_init(void)
{
uint8_t status;
const gpio_map_t TWIM_GPIO_MAP = {
(AVR32_TWIMS0_TWCK_0_0_PIN, AVR32_TWIMS0_TWCK_0_0_FUNCTION,AVR32_TWIMS0_TWD_0_0_PIN, AVR32_TWIMS0_TWD_0_0_FUNCTION)
};
gpio_enable_module(TWIM_GPIO_MAP, sizeof(TWIM_GPIO_MAP)/sizeof(TWIM_GPIO_MAP[0]));
status = twim_master_init(TWIM, &twi_opt_GYRO);
twim_set_speed (TWIM, TWI_STD_MODE_SPEED, FPBA_HZ);
}
extern void init_spi (void) {
sysclk_enable_pba_module(SYSCLK_SPI);
static const gpio_map_t SPI_GPIO_MAP = {
{SPI_SCK_PIN, SPI_SCK_FUNCTION },
{SPI_MISO_PIN, SPI_MISO_FUNCTION},
{SPI_MOSI_PIN, SPI_MOSI_FUNCTION},
{SPI_NPCS0_PIN, SPI_NPCS0_FUNCTION },
{SPI_NPCS1_PIN, SPI_NPCS1_FUNCTION },
};
// Assign GPIO to SPI.
gpio_enable_module(SPI_GPIO_MAP, sizeof(SPI_GPIO_MAP) / sizeof(SPI_GPIO_MAP[0]));
spi_options_t spiOptions = {
.reg = DAC_SPI,
.baudrate = 4000000,
.bits = 8,
.trans_delay = 0,
.spck_delay = 0,
.stay_act = 1,
.spi_mode = 1,
.modfdis = 1
};
// Initialize as master.
spi_initMaster(SPI, &spiOptions);
// Set SPI selection mode: variable_ps, pcs_decode, delay.
spi_selectionMode(SPI, 0, 0, 0);
// Enable SPI module.
spi_enable(SPI);
// spi_setupChipReg( SPI, &spiOptions, FPBA_HZ );
spi_setupChipReg(SPI, &spiOptions, sysclk_get_pba_hz() );
// add ADC chip register
spiOptions.reg = ADC_SPI;
spiOptions.baudrate = 20000000;
spiOptions.bits = 16;
spiOptions.spi_mode = 2;
spiOptions.spck_delay = 0;
spiOptions.trans_delay = 5;
spiOptions.stay_act = 0;
spiOptions.modfdis = 0;
spi_setupChipReg( SPI, &spiOptions, FPBA_HZ );
// spi_enable(SPI);
}
/** Initialization ************************************************************/
static void qt60168_resources_init(U32 fpba_hz)
{
static const gpio_map_t QT60168_SPI_GPIO_MAP =
{
{QT60168_SPI_SCK_PIN, QT60168_SPI_SCK_FUNCTION }, // SPI Clock.
{QT60168_SPI_MISO_PIN, QT60168_SPI_MISO_FUNCTION }, // MISO.
{QT60168_SPI_MOSI_PIN, QT60168_SPI_MOSI_FUNCTION }, // MOSI.
{QT60168_SPI_NPCS0_PIN, QT60168_SPI_NPCS0_FUNCTION} // Chip Select NPCS.
};
// SPI options.
spi_options_t spiOptions =
{
.reg = QT60168_SPI_NCPS,
.baudrate = 1000000, // Defined in conf_qt60168.h.
.bits = 8, // Defined in conf_qt60168.h.
.spck_delay = 0,
.trans_delay = 0,
.stay_act = 0,
.spi_mode = 3,
.modfdis = 1
};
// Assign I/Os to SPI.
gpio_enable_module(QT60168_SPI_GPIO_MAP,
sizeof(QT60168_SPI_GPIO_MAP) / sizeof(QT60168_SPI_GPIO_MAP[0]));
// Initialize as master.
spi_initMaster(QT60168_SPI, &spiOptions);
// Set selection mode: variable_ps, pcs_decode, delay.
spi_selectionMode(QT60168_SPI, 0, 0, 0);
// Enable SPI.
spi_enable(QT60168_SPI);
// Initialize QT60168 with SPI clock Osc0.
spi_setupChipReg(QT60168_SPI, &spiOptions, 2*FOSC0);
}
void controller_init(U32 fcpu_hz, U32 fhsb_hz, U32 fpbb_hz, U32 fpba_hz) {
qt60168_resources_init(fpba_hz);
// Initialize QT60168 component.
qt60168_init(fpba_hz);
// Init timer to get key value.
rtc_init_qt();
// Invalidate the timeout already
cpu_set_timeout(0, &cpu_time_clear_wheel);
}
/*! \brief Main function.
*/
int main(void)
{
static const gpio_map_t TWI_GPIO_MAP =
{
{AVR32_TWI_SDA_0_0_PIN, AVR32_TWI_SDA_0_0_FUNCTION},
{AVR32_TWI_SCL_0_0_PIN, AVR32_TWI_SCL_0_0_FUNCTION}
};
twi_options_t opt;
twi_slave_fct_t twi_slave_fct;
int status;
// Switch to oscillator 0
pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP);
// Init debug serial line
init_dbg_rs232(FOSC0);
// Initialize and enable interrupt
irq_initialize_vectors();
cpu_irq_enable();
// Display a header to user
print_dbg("\x0C\r\nTWI Example\r\nSlave!\r\n");
// TWI gpio pins configuration
gpio_enable_module(TWI_GPIO_MAP, sizeof(TWI_GPIO_MAP) / sizeof(TWI_GPIO_MAP[0]));
// options settings
opt.pba_hz = FOSC0;
opt.speed = TWI_SPEED;
opt.chip = EEPROM_ADDRESS;
// initialize TWI driver with options
twi_slave_fct.rx = &twi_slave_rx;
twi_slave_fct.tx = &twi_slave_tx;
twi_slave_fct.stop = &twi_slave_stop;
status = twi_slave_init(&AVR32_TWI, &opt, &twi_slave_fct );
// check init result
if (status == TWI_SUCCESS)
{
// display test result to user
print_dbg("Slave start:\tPASS\r\n");
}
else
{
// display test result to user
print_dbg("slave start:\tFAIL\r\n");
}
while(1);
}
/*! \brief Initializes QT60168 resources: GPIO and SPI
*/
static void ui_buttons_enable(void)
{
static const gpio_map_t QT60168_SPI_GPIO_MAP = {
{QT60168_SPI_SCK_PIN, QT60168_SPI_SCK_FUNCTION},
{QT60168_SPI_MISO_PIN, QT60168_SPI_MISO_FUNCTION},
{QT60168_SPI_MOSI_PIN, QT60168_SPI_MOSI_FUNCTION},
{QT60168_SPI_NPCS0_PIN, QT60168_SPI_NPCS0_FUNCTION}
};
/* SPI options. */
spi_options_t spiOptions = {
.reg = QT60168_SPI_NCPS,
.baudrate = QT60168_SPI_MASTER_SPEED,
.bits = QT60168_SPI_BITS,
.spck_delay = 0,
.trans_delay = 0,
.stay_act = 0,
.spi_mode = 3,
.modfdis = 1
};
/* Assign I/Os to SPI. */
gpio_enable_module(QT60168_SPI_GPIO_MAP,
sizeof(QT60168_SPI_GPIO_MAP) /
sizeof(QT60168_SPI_GPIO_MAP[0]));
/* Initialize as master */
spi_initMaster(QT60168_SPI, &spiOptions);
/* Set selection mode: variable_ps, pcs_decode, delay */
spi_selectionMode(QT60168_SPI, 0, 0, 0);
/* Enable SPI */
spi_enable(QT60168_SPI);
/* Initialize QT60168 with SPI clock Osc0. */
spi_setupChipReg(QT60168_SPI, &spiOptions, sysclk_get_cpu_hz());
qt60168_init(sysclk_get_cpu_hz());
}
ISR(button_rtc_irq, BUTTON_RTC_IRQ_GROUP, BUTTON_RTC_IRQ_PRIORITY)
{
ui_buttons_read();
/* clear the interrupt flag */
rtc_clear_interrupt(&AVR32_RTC);
}
void board_init(void)
{
gpio_configure_pin(LED0_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH);
gpio_configure_pin(LED1_GPIO,GPIO_DIR_OUTPUT | GPIO_INIT_HIGH);
#if defined (CONF_BOARD_COM_PORT)
// USART GPIO pin configuration.
static const gpio_map_t COMPORT_GPIO_MAP =
{
{USART_RXD_PIN, USART_RXD_FUNCTION },
{USART_TXD_PIN, USART_TXD_FUNCTION }
};
gpio_enable_module(COMPORT_GPIO_MAP,
sizeof(COMPORT_GPIO_MAP) / sizeof(COMPORT_GPIO_MAP[0]));
#endif
}
void acc_init(void)
{
volatile avr32_adc_t *adc = &AVR32_ADC;
static const gpio_map_t ADC_GPIO_MAP =
{
{AVR32_ADC_AD_3_PIN, AVR32_ADC_AD_3_FUNCTION}, // ADC channel 3
{AVR32_ADC_AD_1_PIN, AVR32_ADC_AD_1_FUNCTION}, // ADC channel 1
{AVR32_ADC_AD_2_PIN, AVR32_ADC_AD_2_FUNCTION} // ADC channel 2
};
// enable GPIO pins for ADC
gpio_enable_module(ADC_GPIO_MAP,
sizeof(ADC_GPIO_MAP) / sizeof(ADC_GPIO_MAP[0]));
// configure ADC
adc_configure(adc);
}
/*! \brief create ethernet task, for ethernet management.
*
* \param uxPriority Input. priority for the task, it should be low
*
*/
portTASK_FUNCTION( vStartEthernetTask, pvParameters )
{
static const gpio_map_t MACB_GPIO_MAP =
{
{EXTPHY_MACB_MDC_PIN, EXTPHY_MACB_MDC_FUNCTION },
{EXTPHY_MACB_MDIO_PIN, EXTPHY_MACB_MDIO_FUNCTION },
{EXTPHY_MACB_RXD_0_PIN, EXTPHY_MACB_RXD_0_FUNCTION },
{EXTPHY_MACB_TXD_0_PIN, EXTPHY_MACB_TXD_0_FUNCTION },
{EXTPHY_MACB_RXD_1_PIN, EXTPHY_MACB_RXD_1_FUNCTION },
{EXTPHY_MACB_TXD_1_PIN, EXTPHY_MACB_TXD_1_FUNCTION },
{EXTPHY_MACB_TX_EN_PIN, EXTPHY_MACB_TX_EN_FUNCTION },
{EXTPHY_MACB_RX_ER_PIN, EXTPHY_MACB_RX_ER_FUNCTION },
{EXTPHY_MACB_RX_DV_PIN, EXTPHY_MACB_RX_DV_FUNCTION },
{EXTPHY_MACB_TX_CLK_PIN, EXTPHY_MACB_TX_CLK_FUNCTION}
};
// Assign GPIO to MACB
gpio_enable_module(MACB_GPIO_MAP, sizeof(MACB_GPIO_MAP) / sizeof(MACB_GPIO_MAP[0]));
/* Setup lwIP. */
prvlwIPInit();
#if (HTTP_USED == 1)
/* Create the WEB server task. This uses the lwIP RTOS abstraction layer.*/
sys_thread_new( "WEB", vBasicWEBServer, ( void * ) NULL,
lwipBASIC_WEB_SERVER_STACK_SIZE,
lwipBASIC_WEB_SERVER_PRIORITY );
#endif
#if (TFTP_USED == 1)
/* Create the TFTP server task. This uses the lwIP RTOS abstraction layer.*/
sys_thread_new( "TFTP", vBasicTFTPServer, ( void * ) NULL,
lwipBASIC_TFTP_SERVER_STACK_SIZE,
lwipBASIC_TFTP_SERVER_PRIORITY );
#endif
#if (SMTP_USED == 1)
/* Create the SMTP Client task. This uses the lwIP RTOS abstraction layer.*/
sys_thread_new( "SMTP", vBasicSMTPClient, ( void * ) NULL,
lwipBASIC_SMTP_CLIENT_STACK_SIZE,
lwipBASIC_SMTP_CLIENT_PRIORITY );
#endif
// Kill this task.
vTaskDelete(NULL);
}
static void USART_Initialize ()
{
static const gpio_map_t USART_GPIO_MAP =
{
{AVR32_USART0_RXD_0_0_PIN, AVR32_USART0_RXD_0_0_FUNCTION},
{AVR32_USART0_TXD_0_0_PIN, AVR32_USART0_TXD_0_0_FUNCTION}
};
static const usart_options_t USART_OPTIONS =
{
.baudrate = 57600,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
portENTER_CRITICAL ();
{
gpio_enable_module(USART_GPIO_MAP, sizeof(USART_GPIO_MAP) / sizeof(USART_GPIO_MAP[0]));
usart_init_rs232 (&AVR32_USART0, &USART_OPTIONS, FOSC0);
(&AVR32_USART0)->cr |= AVR32_USART_CR_RXDIS_MASK | AVR32_USART_CR_TXDIS_MASK;
//INTC_init_interrupts ();
//INTC_register_interrupt (&USART_0_Interrupt, AVR32_USART0_IRQ, AVR32_INTC_INT0);
//(&AVR32_USART0)->ier = AVR32_USART_IER_RXRDY_MASK;
(&AVR32_USART0)->cr |= AVR32_USART_CR_TXEN_MASK | AVR32_USART_CR_RXEN_MASK;
}
portEXIT_CRITICAL();
}
void USART_printf (volatile avr32_usart_t * usart, const char * format, ...)
{
//taskENTER_CRITICAL();
#define Buffer_Size 100
char Buffer[Buffer_Size] = {'\0'};
va_list args;
va_start (args, format);
vsprintf (Buffer, format, args);
va_end (args);
usart_write_line (usart, Buffer);
#undef Buffer_Size
//taskEXIT_CRITICAL();
};
/*! \brief Initializes the two-wire interface using the internal RCOSC.
*/
static void init_twi_CS2200(uint32_t fpba_hz)
{
volatile uint32_t i;
static const gpio_map_t CS2200_TWI_GPIO_MAP =
{
{CS2200_TWI_SCL_PIN, CS2200_TWI_SCL_FUNCTION},
{CS2200_TWI_SDA_PIN, CS2200_TWI_SDA_FUNCTION}
};
static twi_options_t CS2200_TWI_OPTIONS =
{
.speed = CS2200_TWI_MASTER_SPEED,
.chip = CS2200_TWI_SLAVE_ADDRESS
};
CS2200_TWI_OPTIONS.pba_hz = fpba_hz;
gpio_enable_module(CS2200_TWI_GPIO_MAP,
sizeof(CS2200_TWI_GPIO_MAP) / sizeof(CS2200_TWI_GPIO_MAP[0]));
twi_master_init(CS2200_TWI, &CS2200_TWI_OPTIONS);
}
void ms3_dac_start(U32 sample_rate_hz, U8 num_channels, U8 bits_per_sample,
bool swap_channels, void (*callback)(U32 arg), U32 callback_opt,
U32 pba_hz)
{
ms3_dac_stop();
// Enable 4.2V for MS3.
gpio_set_gpio_pin(AVR32_PIN_PA24);
// Enable SSC interface
gpio_enable_module(MS3_GPIO_MAP,
sizeof(MS3_GPIO_MAP) / sizeof(MS3_GPIO_MAP[0]));
// Interrupt is registered before we enable the PDCA. This to make sure no unhandled
// interrupt case will be met. (after a CPU reset for example).
INTC_register_interrupt(&ms3_ssc_tx_pdca_int_handler, AVR32_PDCA_IRQ_0,
AVR32_INTC_INT2);
ms3_dac_setup(sample_rate_hz, num_channels, bits_per_sample,
swap_channels, callback, callback_opt, pba_hz);
}
void can_task_init(void)
{
// Setup the generic clock for CAN
scif_gc_setup(AVR32_SCIF_GCLK_CANIF,
SCIF_GCCTRL_OSC0,
AVR32_SCIF_GC_NO_DIV_CLOCK,
0);
// Now enable the generic clock
scif_gc_enable(AVR32_SCIF_GCLK_CANIF);
static const gpio_map_t CAN_GPIO_MAP = {
{AVR32_CANIF_RXLINE_0_0_PIN, AVR32_CANIF_RXLINE_0_0_FUNCTION},
{AVR32_CANIF_TXLINE_0_0_PIN, AVR32_CANIF_TXLINE_0_0_FUNCTION},
{AVR32_CANIF_RXLINE_1_2_PIN, AVR32_CANIF_RXLINE_1_2_FUNCTION},
{AVR32_CANIF_TXLINE_1_2_PIN, AVR32_CANIF_TXLINE_1_2_FUNCTION}
};
// Assign GPIO to CAN.
gpio_enable_module(CAN_GPIO_MAP,
sizeof(CAN_GPIO_MAP) / sizeof(CAN_GPIO_MAP[0]));
can_example_prepare_data_to_receive();
can_example_prepare_data_to_send();
}
