static void __init omap3beagle_flash_init(void)
{
u8 cs = 0;
u8 nandcs = GPMC_CS_NUM + 1;
/* find out the chip-select on which NAND exists */
while (cs < GPMC_CS_NUM) {
u32 ret = 0;
ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
if ((ret & 0xC00) == 0x800) {
printk(KERN_INFO "Found NAND on CS%d\n", cs);
if (nandcs > GPMC_CS_NUM)
nandcs = cs;
}
cs++;
}
if (nandcs > GPMC_CS_NUM) {
printk(KERN_INFO "NAND: Unable to find configuration "
"in GPMC\n ");
return;
}
if (nandcs < GPMC_CS_NUM) {
omap3beagle_nand_data.cs = nandcs;
printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
if (gpmc_nand_init(&omap3beagle_nand_data) < 0)
printk(KERN_ERR "Unable to register NAND device\n");
}
}
static void __init omap3pandora_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_hsmmc_init(omap3pandora_mmc);
omap3pandora_i2c_init();
pandora_wl1251_init();
platform_add_devices(omap3pandora_devices,
ARRAY_SIZE(omap3pandora_devices));
omap_display_init(&pandora_dss_data);
omap_serial_init();
omap_sdrc_init(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
spi_register_board_info(omap3pandora_spi_board_info,
ARRAY_SIZE(omap3pandora_spi_board_info));
omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
usbhs_init(&usbhs_bdata);
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
usb_musb_init(NULL);
gpmc_nand_init(&pandora_nand_data, NULL);
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
}
void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
int nr_parts)
{
u8 cs = 0;
u8 nandcs = GPMC_CS_NUM + 1;
/* find out the chip-select on which NAND exists */
while (cs < GPMC_CS_NUM) {
u32 ret = 0;
ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
if ((ret & 0xC00) == 0x800) {
printk(KERN_INFO "Found NAND on CS%d\n", cs);
if (nandcs > GPMC_CS_NUM)
nandcs = cs;
}
cs++;
}
if (nandcs > GPMC_CS_NUM) {
pr_info("NAND: Unable to find configuration in GPMC\n");
return;
}
if (nandcs < GPMC_CS_NUM) {
nand_data.cs = nandcs;
nand_data.parts = parts;
nand_data.nr_parts = nr_parts;
nand_data.devsize = options;
printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
if (gpmc_nand_init(&nand_data) < 0)
printk(KERN_ERR "Unable to register NAND device\n");
}
}
static void __init omap3pandora_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap3pandora_i2c_init();
pandora_wl1251_init();
platform_add_devices(omap3pandora_devices,
ARRAY_SIZE(omap3pandora_devices));
omap_serial_init();
spi_register_board_info(omap3pandora_spi_board_info,
ARRAY_SIZE(omap3pandora_spi_board_info));
omap3pandora_ads7846_init();
usb_ehci_init(&ehci_pdata);
usb_musb_init(&musb_board_data);
gpmc_nand_init(&pandora_nand_data);
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
}
static void __init omap3pandora_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_hsmmc_init(omap3pandora_mmc);
omap3pandora_i2c_init();
pandora_wl1251_init();
platform_add_devices(omap3pandora_devices,
ARRAY_SIZE(omap3pandora_devices));
omap_display_init(&pandora_dss_data);
omap_serial_init();
omap_sdrc_init(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params);
spi_register_board_info(omap3pandora_spi_board_info,
ARRAY_SIZE(omap3pandora_spi_board_info));
omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
usbhs_init(&usbhs_bdata);
usb_musb_init(NULL);
gpmc_nand_init(&pandora_nand_data);
omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
}
static void __init cm_t3517_init_nand(void)
{
if (gpmc_nand_init(&cm_t3517_nand_data) < 0)
pr_err("CM-T3517: NAND initialization failed\n");
}
static void __init cm_t35_init_nand(void)
{
if (gpmc_nand_init(&cm_t35_nand_data) < 0)
pr_err("CM-T35: Unable to register NAND device\n");
}
static void __init nand_init(void)
{
gpmc_nand_init(&safir_nand_data);
}
static void __init omap_fidji_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
print_board_rev();
if (fidji_board_rev() < 7)
panic("hardware not supported");
peripherals_init();
parrot_omap_gpmc_nand_config(&fidji_nand_data);
gpmc_nand_init(&fidji_nand_data);
display_init();
sr_class3_init();
parrot_omap_voltage_init();
platform_add_devices(fidji_devices, ARRAY_SIZE(fidji_devices));
/* config BT */
/* PCM */
omap_mux_init_signal("mcbsp1_dx.mcbsp3_dx",
OMAP_PIN_OUTPUT);
omap_mux_init_signal("mcbsp1_dr.mcbsp3_dr",
OMAP_PIN_INPUT);
omap_mux_init_signal("mcbsp1_fsx.mcbsp3_fsx",
OMAP_PIN_INPUT);
omap_mux_init_signal("mcbsp1_clkx.mcbsp3_clkx",
OMAP_PIN_INPUT);
/* UART */
omap_mux_init_signal("uart1_tx.uart1_tx",
OMAP_PIN_OUTPUT);
omap_mux_init_signal("uart1_rx.uart1_rx",
OMAP_PIN_INPUT);
omap_mux_init_signal("uart1_rts.uart1_rts",
OMAP_PIN_OUTPUT);
omap_mux_init_signal("uart1_cts.uart1_cts",
OMAP_PIN_INPUT);
/* reset */
parrot_gpio_user_out_init(GPIO_BTWIFI_RESET, 1, "bt-rst");
/* config GPS */
/* UART */
omap_mux_init_signal("mcbsp3_clkx.uart2_tx",
OMAP_PIN_OUTPUT);
omap_mux_init_signal("mcbsp3_fsx.uart2_rx",
OMAP_PIN_INPUT);
/* ON/OFF - RESET */
parrot_gpio_out_init(GPIO_GPS_ONOFF, 0);
if (fidji_board_rev() < 9) {
mdelay(20);
gpio_set_value(GPIO_GPS_ONOFF, 1);
omap_mux_init_gpio(GPIO_GPS_RESET, OMAP_PIN_INPUT);
parrot_gpio_out_init(GPIO_GPS_RESET, 0);
}
else {
// Hardware 09+
omap_mux_init_gpio(GPIO_GPS_UPDATE, OMAP_PIN_INPUT);
parrot_gpio_out_init(GPIO_GPS_UPDATE, 0);
}
/* config SPI-RF */
/* SDN_RF*/
parrot_gpio_user_out_init(GPIO_RF_SDN, 0, "rf-sdn");
/* IRQ from the rf device */
omap_mux_init_gpio(GPIO_RF_IRQ, OMAP_PIN_INPUT|OMAP_PIN_OFF_WAKEUPENABLE);
/* SPI pin configuration */
omap_mux_init_signal("mcspi2_clk.mcspi2_clk",
OMAP_PIN_INPUT);
omap_mux_init_signal("mcspi2_simo.mcspi2_simo",
OMAP_PIN_INPUT);
omap_mux_init_signal("mcspi2_somi.mcspi2_somi",
OMAP_PIN_INPUT);
omap_mux_init_signal("mcspi2_cs0.mcspi2_cs0",
OMAP_PIN_INPUT);
/* level shifter */
parrot_gpio_out_init(GPIO_RF_LSH, 0);
/* IPOD chip */
/* level shifter */
parrot_gpio_out_init(GPIO_IPOD_LEV_SH, 1);
/* reset */
parrot_gpio_user_out_init(GPIO_IPOD_RESET, 1, "ipod-rst");
/* put in safe mode unused pins */
omap_mux_init_signal("gpmc_clk.safe_mode", OMAP_PIN_INPUT);
omap_mux_init_signal("gpmc_nbe1.safe_mode", OMAP_PIN_INPUT);
omap_mux_init_signal("gpmc_wait2.safe_mode", OMAP_PIN_INPUT);
omap_mux_init_signal("gpmc_wait3.safe_mode", OMAP_PIN_INPUT);
omap_mux_init_signal("i2c4_scl.safe_mode", OMAP_PIN_INPUT);
omap_mux_init_signal("i2c4_sda.safe_mode", OMAP_PIN_INPUT);
omap_mux_init_signal("sdmmc2_dat7.safe_mode", OMAP_PIN_INPUT);
omap_mux_init_signal("mcbsp3_dx.safe_mode", OMAP_PIN_INPUT);
omap_mux_init_signal("mcbsp3_dr.safe_mode", OMAP_PIN_INPUT);
pm_power_off = omap_fidji_power_off;
}
