void Init_cc1100(void)
{
int i;
//ENCC1101;
POWER_UP_RESET_CC1100(); //上电复位
delayms(20);
WriteRfSettings(); //写入配置
// Set RX FIFO threshold
halRfWriteReg(CC_FIFOTHR, FIFO_THRESHOLD);
halRfWriteReg(CC_MCSM1, 0x33); /* TX完成后保持RX状态,(RESET:0x30) */
// Set GDO0 to be RX FIFO threshold signal
halRfWriteReg(CC_IOCFG0, 0x00);
// Set up interrupt on GDO0
//halDigioIntSetEdge(&pinGDO0, HAL_DIGIO_INT_RISING_EDGE);
//halDigioIntConnect(&pinGDO0, &Rx_fifo_half_full);
//halDigioIntEnable(&pinGDO0);
// Set GDO2 to be packet received signal
halRfWriteReg(CC_IOCFG2, 0x06);
// Set up interrupt on GDO2
//halDigioIntSetEdge(&pinGDO2, HAL_DIGIO_INT_FALLING_EDGE);
//halDigioIntConnect(&pinGDO2, &Rx_packet_recvd);
//halDigioIntEnable(&pinGDO2);
delayms(10);
Spi_Write_Burst(CC_PATABLE,PaTabel,8); //功率配置
Spi_Write_Strobe(CC_SCAL);
for(i=0; i<100; i++) Spi_Write_Strobe(CC_SNOP);
Spi_Write_Strobe(CC_SIDLE); //进入空闲
Spi_Write_Strobe(CC_SFRX); //清空接受区
Spi_Write_Strobe(CC_SRX); //进入接收
rf_data.rf_state = RX_STATE_RX;
_timer_rx_timeout = TIME_OUT;
_flag_rx_timeout = FALSE;
// Spi_Write_Strobe(CC_SPWD); //进入接收
//CSN_H; //上电拉高
}
//----------------------------------------------------------------------------------
// void halRfConfig(const lpw_config_t *rfConfig, const uint8* rfPaTable, uint8 rfPaTableLen)
//
// DESCRIPTION:
// Used to configure the CC1100/CC2500 registers with exported register
// settings from SmartRF Studio.
//
// ARGUMENTS:
// rfConfig - register settings (as exported from SmartRF Studio)
// rfPaTable - array of PA table values (from SmartRF Studio)
// rfPaTableLen - length of PA table
//
//----------------------------------------------------------------------------------
void halRfConfig(const lpw_config_t *rfConfig, const uint8_t *rfPaTable, uint8_t rfPaTableLen)
{
halRfWriteReg(CC2500_FSCTRL1, rfConfig->fsctrl1); // Frequency synthesizer control.
halRfWriteReg(CC2500_FSCTRL0, rfConfig->fsctrl0); // Frequency synthesizer control.
halRfWriteReg(CC2500_FREQ2, rfConfig->freq2); // Frequency control word, high byte.
halRfWriteReg(CC2500_FREQ1, rfConfig->freq1); // Frequency control word, middle byte.
halRfWriteReg(CC2500_FREQ0, rfConfig->freq0); // Frequency control word, low byte.
halRfWriteReg(CC2500_MDMCFG4, rfConfig->mdmcfg4); // Modem configuration.
halRfWriteReg(CC2500_MDMCFG3, rfConfig->mdmcfg3); // Modem configuration.
halRfWriteReg(CC2500_MDMCFG2, rfConfig->mdmcfg2); // Modem configuration.
halRfWriteReg(CC2500_MDMCFG1, rfConfig->mdmcfg1); // Modem configuration.
halRfWriteReg(CC2500_MDMCFG0, rfConfig->mdmcfg0); // Modem configuration.
halRfWriteReg(CC2500_CHANNR, rfConfig->channr); // Channel number.
halRfWriteReg(CC2500_DEVIATN, rfConfig->deviatn); // Modem deviation setting (when FSK modulation is enabled).
halRfWriteReg(CC2500_FREND1, rfConfig->frend1); // Front end RX configuration.
halRfWriteReg(CC2500_FREND0, rfConfig->frend0); // Front end RX configuration.
halRfWriteReg(CC2500_MCSM0, rfConfig->mcsm0); // Main Radio Control State Machine configuration.
halRfWriteReg(CC2500_FOCCFG, rfConfig->foccfg); // Frequency Offset Compensation Configuration.
halRfWriteReg(CC2500_BSCFG, rfConfig->bscfg); // Bit synchronization Configuration.
halRfWriteReg(CC2500_AGCCTRL2, rfConfig->agcctrl2); // AGC control.
halRfWriteReg(CC2500_AGCCTRL1, rfConfig->agcctrl1); // AGC control.
halRfWriteReg(CC2500_AGCCTRL0, rfConfig->agcctrl0); // AGC control.
halRfWriteReg(CC2500_FSCAL3, rfConfig->fscal3); // Frequency synthesizer calibration.
halRfWriteReg(CC2500_FSCAL2, rfConfig->fscal2); // Frequency synthesizer calibration.
halRfWriteReg(CC2500_FSCAL1, rfConfig->fscal1); // Frequency synthesizer calibration.
halRfWriteReg(CC2500_FSCAL0, rfConfig->fscal0); // Frequency synthesizer calibration.
halRfWriteReg(CC2500_FSTEST, rfConfig->fstest); // Frequency synthesizer calibration.
halRfWriteReg(CC2500_TEST2, rfConfig->test2); // Various test settings.
halRfWriteReg(CC2500_TEST1, rfConfig->test1); // Various test settings.
halRfWriteReg(CC2500_TEST0, rfConfig->test0); // Various test settings.
halRfWriteReg(CC2500_IOCFG2, rfConfig->iocfg2); // GDO2 output pin configuration.
halRfWriteReg(CC2500_IOCFG0, rfConfig->iocfg0); // GDO0 output pin configuration.
halRfWriteReg(CC2500_PKTCTRL1, rfConfig->pktctrl1); // Packet automation control.
halRfWriteReg(CC2500_PKTCTRL0, rfConfig->pktctrl0); // Packet automation control.
halRfWriteReg(CC2500_ADDR, rfConfig->addr); // Device address.
halRfWriteReg(CC2500_PKTLEN, rfConfig->pktlen); // Packet length.
spi_send(CC2500_PATABLE | CC2500_WRITE_BURST, rfPaTable, rfPaTableLen);
}
