static void brd_peri_init(void)
{
int i;
int gpcfg_num = sizeof(brd_gpio_table) / sizeof(brd_gpio_table[0]);
for (i = 0; i < gpcfg_num; ++i) {
hal_gpio_init(&brd_gpio_table[i]);
}
hal_i2c_init(&brd_i2c1_dev);
hal_i2c_init(&brd_i2c2_dev);
}
int vfs_i2c_open(inode_t *inode, file_t *fp)
{
int ret = -1; /* return value */
i2c_dev_t *i2c_dev = NULL; /* device pointer */
/* check empty pointer. */
if ((fp != NULL) && (fp->node != NULL)) {
/* Initialize if the device is first opened. */
if (fp->node->refs == 1) {
/* get the device pointer. */
i2c_dev = (i2c_dev_t *)(fp->node->i_arg);
/* init i2c device. */
ret = hal_i2c_init(i2c_dev);
} else {
ret = VFS_SUCCESS;
}
} else {
ret = -EINVAL;
}
return ret;
}
/*e2prom read */
int i2c_eeprom_read(struct i2c_dev_info_s *dev, void *data, int offset, int size)
{
int fd = 0, len, ret;
char *buf = (char*)data;
printf("%s:%d slotid = %d\n", __func__, __LINE__, slot);
halI2CLock();
fd = hal_i2c_init(dev->i2c_controler);
if(fd < 0)
{
ret = ERROR;
goto out;
}
i2c_channel_switch(dev, fd);
while(size)
{
if(size > EEPROM_PAGE_WRITE_SIZE)
len = EEPROM_PAGE_WRITE_SIZE;
else
len = size;
ret = hal_i2c_read(fd, i2c_dev->dev_addr[offset >> 8], offset&0xff, buf, len);
if(ret < 0)
goto out;
buf += len;
offset += len;
size -= len;
}
out:
if(fd > 0)
hal_i2c_close(fd);
halI2CUnLock();
return ret;
}
void
hal_bsp_init(void)
{
int rc;
(void)rc;
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &hal_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
hal_timer_init(0, TIM9);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, &i2c_cfg0);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_SLAVE)
rc = hal_spi_init(0, (void *)&os_bsp_spi0s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
}
static hal_result_t s_switch_micrel_init(int32_t id, void* param)
{
// i2c3 must be initted.
hal_i2c_init((hal_i2c_t)ks8893_config.i2cid, NULL);
hl_result_t r = hl_chip_micrel_ks8893_init((const hl_chip_micrel_ks8893_cfg_t*)param);
return((hal_result_t)r);
}
/*e2prom write */
int i2c_eeprom_write(struct i2c_dev_info_s *dev, void *data, int offset, int size)
{
int fd = 0, len, ret;
char *buf = (char*)data;
halI2CLock();
fd = hal_i2c_init(i2c_dev->i2c_controler);
if(fd < 0)
{
ret = ERROR;
goto out;
}
i2c_channel_switch(dev, fd);
while(size)
{
if(size > EEPROM_PAGE_WRITE_SIZE)
len = EEPROM_PAGE_WRITE_SIZE;
else
len = size;
ret = hal_i2c_write(fd, i2c_dev->dev_addr[offset >> 8], offset&0xff, buf, len);
if(ret < 0)
goto out;
buf += len;
offset += len;
size -= len;
usleep(10*1000);
}
out:
if(fd > 0)
hal_i2c_close(fd);
halI2CUnLock();
return ret;
}
void
hal_bsp_init(void)
{
int rc;
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_1)
rc = hal_timer_init(1, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_2)
rc = hal_timer_init(2, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_3)
rc = hal_timer_init(3, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_4)
rc = hal_timer_init(4, NULL);
assert(rc == 0);
#endif
/* Set cputime to count at 1 usec increments */
rc = os_cputime_init(MYNEWT_VAL(CLOCK_FREQ));
assert(rc == 0);
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, (void *)&hal_i2c_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_SLAVE)
rc = hal_spi_init(0, (void *)&os_bsp_spi0s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&os_bsp_uart0_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_1)
rc = os_dev_create((struct os_dev *) &os_bsp_bitbang_uart1, "uart1",
OS_DEV_INIT_PRIMARY, 0, uart_bitbang_init, (void *)&os_bsp_uart1_cfg);
assert(rc == 0);
#endif
}
void
hal_bsp_init(void)
{
int rc;
(void)rc;
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_SLAVE)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &hal_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg0);
assert(rc == 0);
#endif
#if MYNEWT_VAL(ADC_1)
rc = os_dev_create((struct os_dev *) &my_dev_adc1, "adc1",
OS_DEV_INIT_KERNEL, OS_DEV_INIT_PRIO_DEFAULT,
stm32f4_adc_dev_init, &adc1_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(ADC_2)
rc = os_dev_create((struct os_dev *) &my_dev_adc2, "adc2",
OS_DEV_INIT_KERNEL, OS_DEV_INIT_PRIO_DEFAULT,
stm32f4_adc_dev_init, &adc2_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(ADC_3)
rc = os_dev_create((struct os_dev *) &my_dev_adc3, "adc3",
OS_DEV_INIT_KERNEL, OS_DEV_INIT_PRIO_DEFAULT,
stm32f4_adc_dev_init, &adc3_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, &i2c_cfg0);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
hal_timer_init(0, TIM9);
#endif
#if MYNEWT_VAL(ETH_0)
rc = stm32_eth_init(ð_cfg);
assert(rc == 0);
#endif
}
void system_init(void)
{
hal_sys_init();
hal_i2c_init();
usb_uart_init();
tmp245_init();
/* initialize system lock */
syslock = xSemaphoreCreateMutex();
set_configuration(ADC_INPUT_VOLTAGE_DC, ADC_RANGE_300,
ADC_INTEGRATION_50HZ, ADC_CHANNEL_0, 1, 0, ADC_RESOLUTION_5_5);
}
static be_jse_symbol_t *i2c_open(void)
{
int32_t len = -1;
char *data = NULL;
int8_t ret = -1;
int8_t result = -1;
item_handle_t i2c_handle;
i2c_handle.handle = 0xFFFFFFFF;
be_jse_symbol_t *arg0 = NULL;
i2c_dev_t *i2c_device = NULL;
be_jse_handle_function(0, &arg0, NULL, NULL, NULL);
if (!arg0 || !symbol_is_string(arg0)) {
goto out;
}
len = symbol_str_len(arg0);
data = calloc(1, sizeof(char) * (len + 1));
if (NULL == data) {
goto out;
}
symbol_to_str(arg0, data, len);
ret = board_attach_item(MODULE_I2C, data, &i2c_handle);
if (0 != ret) {
be_error("i2c", "board_attach_item fail!\n");
goto out;
}
be_debug("i2c", "i2c handle:%u\n", i2c_handle.handle);
i2c_device = board_get_node_by_handle(MODULE_I2C, &i2c_handle);
if (NULL == i2c_device) {
be_error("i2c", "board_get_node_by_handle fail!\n");
goto out;
}
ret = hal_i2c_init(i2c_device);
if (0 != ret) {
be_error("i2c", "hal_i2c_init fail!\n");
goto out;
}
result = 0;
out:
if (NULL != data) {
free(data);
data = NULL;
}
symbol_unlock(arg0);
if (0 != result) {
board_disattach_item(MODULE_I2C, &i2c_handle);
return new_int_symbol(-1);
}
return new_int_symbol(i2c_handle.handle);
}
void
hal_bsp_init(void)
{
int rc;
(void)rc;
clock_config();
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &hal_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
hal_timer_init(0, TIM9);
#endif
#if MYNEWT_VAL(TIMER_1)
hal_timer_init(1, TIM10);
#endif
#if MYNEWT_VAL(TIMER_2)
hal_timer_init(2, TIM11);
#endif
#if MYNEWT_VAL(SPI_1_MASTER)
rc = hal_spi_init(1, &spi1_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_SLAVE)
rc = hal_spi_init(1, &spi1_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, &i2c_cfg0);
assert(rc == 0);
#endif
}
/*common write */
int i2c_common_write(struct i2c_dev_info_s *dev, void *data, int offset, int size)
{
int fd = 0, write_len, ret;
halI2CLock();
fd = hal_i2c_init(i2c_dev->i2c_controler);
if(fd < 0)
{
ret = ERROR;
goto out;
}
i2c_channel_switch(dev, fd);
ret = hal_i2c_write(fd, i2c_dev->dev_addr[0], offset, buf, size);
if(ret < 0)
goto out;
out:
if(fd > 0)
i2c_close(fd);
halI2CUnLock();
return ret;
}
void hal_dev_mma8451_init(void)
{
hal_i2c_init(I2C0_B);
}
ATCA_STATUS hal_i2c_discover_devices(int busNum, ATCAIfaceCfg cfg[], int *found )
{
ATCAIfaceCfg *head = cfg;
uint8_t slaveAddress = 0x01;
ATCADevice device;
ATCAIface discoverIface;
ATCACommand command;
ATCAPacket packet;
uint32_t execution_time;
ATCA_STATUS status;
uint8_t revs508[1][4] = { { 0x00, 0x00, 0x50, 0x00 } };
uint8_t revs108[1][4] = { { 0x80, 0x00, 0x10, 0x01 } };
uint8_t revs204[2][4] = { { 0x00, 0x02, 0x00, 0x08 },
{ 0x00, 0x04, 0x05, 0x00 } };
int i;
/** \brief default configuration, to be reused during discovery process */
ATCAIfaceCfg discoverCfg = {
.iface_type = ATCA_I2C_IFACE,
.devtype = ATECC508A,
.atcai2c.slave_address = 0x07,
.atcai2c.bus = busNum,
.atcai2c.baud = 400000,
.wake_delay = 800,
.rx_retries = 3
};
ATCAHAL_t hal;
uint8_t address;
if ( busNum < 0 )
return ATCA_COMM_FAIL;
hal_i2c_init( &hal, &discoverCfg );
device = newATCADevice( &discoverCfg );
discoverIface = atGetIFace( device );
command = atGetCommands( device );
// iterate through all addresses on given i2c bus
// all valid 7-bit addresses go from 0x07 to 0x78
for ( slaveAddress = 0x07; slaveAddress <= 0x78; slaveAddress++ ) {
discoverCfg.atcai2c.slave_address = slaveAddress << 1; // turn it into an 8-bit address which is what the rest of the i2c HAL is expecting when a packet is sent
// wake up device
// If it wakes, send it a dev rev command. Based on that response, determine the device type
// BTW - this will wake every cryptoauth device living on the same bus (ecc508a, sha204a)
if ( hal_i2c_wake( discoverIface ) == ATCA_SUCCESS ) {
(*found)++;
memcpy( (uint8_t*)head, (uint8_t*)&discoverCfg, sizeof(ATCAIfaceCfg));
memset( packet.data, 0x00, sizeof(packet.data));
// get devrev info and set device type accordingly
atInfo( command, &packet );
execution_time = atGetExecTime(command, CMD_INFO) + 1;
// send the command
if ( (status = atsend( discoverIface, (uint8_t*)&packet, packet.txsize )) != ATCA_SUCCESS ) {
printf("packet send error\r\n");
continue;
}
// delay the appropriate amount of time for command to execute
atca_delay_ms(execution_time);
// receive the response
if ( (status = atreceive( discoverIface, &(packet.data[0]), &(packet.rxsize) )) != ATCA_SUCCESS )
continue;
if ( (status = isATCAError(packet.data)) != ATCA_SUCCESS )
continue;
// determine device type from common info and dev rev response byte strings
for ( i = 0; i < (int)sizeof(revs508) / 4; i++ ) {
if ( memcmp( &packet.data[1], &revs508[i], 4) == 0 ) {
discoverCfg.devtype = ATECC508A;
break;
}
}
for ( i = 0; i < (int)sizeof(revs204) / 4; i++ ) {
if ( memcmp( &packet.data[1], &revs204[i], 4) == 0 ) {
discoverCfg.devtype = ATSHA204A;
break;
}
}
for ( i = 0; i < (int)sizeof(revs108) / 4; i++ ) {
if ( memcmp( &packet.data[1], &revs108[i], 4) == 0 ) {
discoverCfg.devtype = ATECC108A;
break;
}
}
atca_delay_ms(15);
// now the device type is known, so update the caller's cfg array element with it
head->devtype = discoverCfg.devtype;
head++;
}
hal_i2c_idle(discoverIface);
}
// hal_i2c_release(&hal);
return ATCA_SUCCESS;
}
/** \brief
- this HAL implementation assumes you've included the ASF Twi libraries in your project, otherwise,
the HAL layer will not compile because the ASF TWI drivers are a dependency *
*/
/** \brief hal_i2c_init manages requests to initialize a physical interface. it manages use counts so when an interface
* has released the physical layer, it will disable the interface for some other use.
* You can have multiple ATCAIFace instances using the same bus, and you can have multiple ATCAIFace instances on
* multiple i2c buses, so hal_i2c_init manages these things and ATCAIFace is abstracted from the physical details.
*/
/** \brief initialize an I2C interface using given config
* \param[in] hal - opaque ptr to HAL data
* \param[in] cfg - interface configuration
*/
ATCA_STATUS hal_i2c_init(void *hal, ATCAIfaceCfg *cfg)
{
int bus = cfg->atcai2c.bus; // 0-based logical bus number
ATCAHAL_t *phal = (ATCAHAL_t*)hal;
twihs_options_t twiOptions;
if ( i2c_bus_ref_ct == 0 ) // power up state, no i2c buses will have been used
for ( int i = 0; i < MAX_I2C_BUSES; i++ )
i2c_hal_data[i] = NULL;
i2c_bus_ref_ct++; // total across buses
if ( bus >= 0 && bus < MAX_I2C_BUSES ) {
// if this is the first time this bus and interface has been created, do the physical work of enabling it
if ( i2c_hal_data[bus] == NULL ) {
i2c_hal_data[bus] = malloc( sizeof(ATCAI2CMaster_t) );
i2c_hal_data[bus]->ref_ct = 1; // buses are shared, this is the first instance
/* Configure the options of TWI driver */
twiOptions.master_clk = sysclk_get_cpu_hz() / CONFIG_SYSCLK_DIV;
twiOptions.speed = cfg->atcai2c.baud;
switch ( bus ) {
case 0: /* Enable the peripheral clock for TWI */
pmc_enable_periph_clk(ID_TWIHS0);
if (twihs_master_init(TWIHS0, &twiOptions) != TWIHS_SUCCESS)
return ATCA_COMM_FAIL;
i2c_hal_data[bus]->twi_module = TWIHS0;
break;
case 1: /* Enable the peripheral clock for TWI */
pmc_enable_periph_clk(ID_TWIHS1);
if (twihs_master_init(TWIHS1, &twiOptions) != TWIHS_SUCCESS)
return ATCA_COMM_FAIL;
i2c_hal_data[bus]->twi_module = TWIHS1;
break;
case 2: /* Enable the peripheral clock for TWI */
pmc_enable_periph_clk(ID_TWIHS2);
if (twihs_master_init(TWIHS2, &twiOptions) != TWIHS_SUCCESS)
return ATCA_COMM_FAIL;
i2c_hal_data[bus]->twi_module = TWIHS2;
break;
}
// store this for use during the release phase
i2c_hal_data[bus]->bus_index = bus;
} else{
// otherwise, another interface already initialized the bus, so this interface will share it and any different
// cfg parameters will be ignored...first one to initialize this sets the configuration
i2c_hal_data[bus]->ref_ct++;
}
phal->hal_data = i2c_hal_data[bus];
return ATCA_SUCCESS;
}
return ATCA_COMM_FAIL;
}
void
hal_bsp_init(void)
{
int rc;
(void)rc;
/* Make sure system clocks have started */
hal_system_clock_start();
#if MYNEWT_VAL(ADC_0)
rc = os_dev_create((struct os_dev *) &os_bsp_adc0, "adc0",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf51_adc_dev_init,
&os_bsp_adc0_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&os_bsp_uart0_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_1)
rc = hal_timer_init(1, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_2)
rc = hal_timer_init(2, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_3)
rc = hal_timer_init(3, NULL);
assert(rc == 0);
#endif
#if (MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0)
rc = os_cputime_init(MYNEWT_VAL(OS_CPUTIME_FREQ));
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_SLAVE)
rc = hal_spi_init(1, (void *)&os_bsp_spi1s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, (void *)&hal_i2c_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_1)
rc = hal_i2c_init(1, (void *)&hal_i2c1_cfg);
assert(rc == 0);
#endif
}
void
hal_bsp_init(void)
{
int rc;
#if MYNEWT_VAL(SOFT_PWM)
int idx;
#endif
(void)rc;
/* Make sure system clocks have started */
hal_system_clock_start();
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_1)
rc = hal_timer_init(1, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_2)
rc = hal_timer_init(2, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_3)
rc = hal_timer_init(3, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_4)
rc = hal_timer_init(4, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_5)
rc = hal_timer_init(5, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(ADC_0)
rc = os_dev_create((struct os_dev *) &os_bsp_adc0,
"adc0",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_adc_dev_init,
&os_bsp_adc0_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_0)
pwm0_idx = 0;
rc = os_dev_create((struct os_dev *) &os_bsp_pwm0,
"pwm0",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_pwm_dev_init,
&pwm0_idx);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_1)
pwm1_idx = 1;
rc = os_dev_create((struct os_dev *) &os_bsp_pwm1,
"pwm1",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_pwm_dev_init,
&pwm1_idx);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_2)
pwm2_idx = 2;
rc = os_dev_create((struct os_dev *) &os_bsp_pwm2,
"pwm2",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_pwm_dev_init,
&pwm2_idx);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SOFT_PWM)
for (idx = 0; idx < MYNEWT_VAL(SOFT_PWM_DEVS); idx++)
{
spwm_name[idx] = "spwm0";
spwm_name[idx][4] = '0' + idx;
spwm_idx[idx] = idx;
rc = os_dev_create((struct os_dev *) &os_bsp_spwm[idx],
spwm_name[idx],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
soft_pwm_dev_init,
&spwm_idx[idx]);
assert(rc == 0);
}
#endif
#if (MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0)
rc = os_cputime_init(MYNEWT_VAL(OS_CPUTIME_FREQ));
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, (void *)&hal_i2c_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_MASTER)
rc = hal_spi_init(1, (void *)&os_bsp_spi1m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_SLAVE)
rc = hal_spi_init(1, (void *)&os_bsp_spi1s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&os_bsp_uart0_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_1)
rc = os_dev_create((struct os_dev *) &os_bsp_bitbang_uart1, "uart1",
OS_DEV_INIT_PRIMARY, 0, uart_bitbang_init, (void *)&os_bsp_uart1_cfg);
assert(rc == 0);
#endif
}
void
hal_bsp_init(void)
{
int rc;
(void)rc;
hal_system_clock_start();
#if MYNEWT_VAL(TRNG)
rc = os_dev_create(&os_bsp_trng.dev, "trng", OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT, stm32_trng_dev_init, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &hal_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_SLAVE)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, &i2c_cfg0);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
hal_timer_init(0, TIM9);
#endif
#if MYNEWT_VAL(TIMER_1)
hal_timer_init(1, TIM10);
#endif
#if MYNEWT_VAL(TIMER_2)
hal_timer_init(2, TIM11);
#endif
#if (MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0)
rc = os_cputime_init(MYNEWT_VAL(OS_CPUTIME_FREQ));
assert(rc == 0);
#endif
#if MYNEWT_VAL(ETH_0)
stm32_eth_init(ð_cfg);
#endif
#if MYNEWT_VAL(PWM_0)
rc = os_dev_create((struct os_dev *) &stm32_pwm_dev_driver[PWM_0_DEV_ID],
(char*)stm32_pwm_dev_name[PWM_0_DEV_ID],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
stm32_pwm_dev_init,
&stm32_pwm_config[PWM_0_DEV_ID]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_1)
rc = os_dev_create((struct os_dev *) &stm32_pwm_dev_driver[PWM_1_DEV_ID],
(char*)stm32_pwm_dev_name[PWM_1_DEV_ID],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
stm32_pwm_dev_init,
&stm32_pwm_config[PWM_1_DEV_ID]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_2)
rc = os_dev_create((struct os_dev *) &stm32_pwm_dev_driver[PWM_2_DEV_ID],
(char*)stm32_pwm_dev_name[PWM_2_DEV_ID],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
stm32_pwm_dev_init,
&stm32_pwm_config[PWM_2_DEV_ID]);
assert(rc == 0);
#endif
}
