int hi_ssp_lcd_init_cfg(void)
{
unsigned char framemode = 0;
unsigned char spo = 1;
unsigned char sph = 1;
unsigned char datawidth = 9;
#ifdef HI_FPGA
unsigned char scr = 1;
unsigned char cpsdvsr = 2;
#else
unsigned char scr = 8;
unsigned char cpsdvsr = 8;
#endif
spi_disable();
hi_ssp_set_frameform(framemode, spo, sph, datawidth);
hi_ssp_set_serialclock(scr, cpsdvsr);
hi_ssp_alt_mode_set(1);
hi_ssp_enable();
return 0;
}
int kcom_hi_ssp_set_serialclock(unsigned char scr,unsigned char cpsdvsr)
{
return hi_ssp_set_serialclock(scr,cpsdvsr);
}
void lcd_ili9342c_init_horizontal_all(void)
{
/*spi_9bit_setting*/
unsigned char framemode = 0;
unsigned char spo = 1;
unsigned char sph = 1;
unsigned char datawidth = 9;
#ifdef HI_FPGA
unsigned char scr = 1;
unsigned char cpsdvsr = 2;
#else
unsigned char scr = 8;
unsigned char cpsdvsr = 8;
#endif
spi_disable();
hi_ssp_set_frameform(framemode, spo, sph, datawidth);
hi_ssp_set_serialclock(scr, cpsdvsr);
hi_ssp_alt_mode_set(1);
hi_ssp_enable();
ssp_write_cmd(0xC8); //Set EXTC
ssp_write_dat(0xFF);
ssp_write_dat(0x93);
ssp_write_dat(0x42);
ssp_write_cmd(0xB6);
ssp_write_dat(0x0a);
ssp_write_dat(0xE0);//SS GS
ssp_write_cmd(0x36); //Memory Access Control
ssp_write_dat(0xc8); //MY,MX,MV,ML,BGR,MH c8
ssp_write_cmd(0xC0); //Power Control 1
ssp_write_dat(0x12); //VRH[5:0]
ssp_write_dat(0x10); //VC[3:0]
ssp_write_cmd(0xC1); //Power Control 2
ssp_write_dat(0x35); //SAP[2:0],BT[3:0]
ssp_write_cmd(0xC5); //VCOM
ssp_write_dat(0XE8); //C8++
ssp_write_cmd(0xB1);
ssp_write_dat(0x00);
ssp_write_dat(0x1C);
ssp_write_cmd(0xB4);
ssp_write_dat(0x02);
//*****************GAMMA*****************
ssp_write_cmd(0xE0);
ssp_write_dat(0x00);
ssp_write_dat(0x05);
ssp_write_dat(0x05);
ssp_write_dat(0x05);
ssp_write_dat(0x13);
ssp_write_dat(0x0A);
ssp_write_dat(0x30);
ssp_write_dat(0x9A);
ssp_write_dat(0x43);
ssp_write_dat(0x08);
ssp_write_dat(0x0F);
ssp_write_dat(0x0B);
ssp_write_dat(0x16);
ssp_write_dat(0x1A);
ssp_write_dat(0x0F);
ssp_write_cmd(0xE1);
ssp_write_dat(0x00);
ssp_write_dat(0x25);
ssp_write_dat(0x29);
ssp_write_dat(0x04);
ssp_write_dat(0x11);
ssp_write_dat(0x07);
ssp_write_dat(0x3D);
ssp_write_dat(0x57);
ssp_write_dat(0x4F);
ssp_write_dat(0x05);
ssp_write_dat(0x0C);
ssp_write_dat(0x0A);
ssp_write_dat(0x3A);
ssp_write_dat(0x3A);
ssp_write_dat(0x0F);
//*************RGB interface set**************
ssp_write_cmd(0x3A); //Pixel Format Set
ssp_write_dat(0x66); //18BIT 55 16bit
ssp_write_cmd(0xB0); //set DEN, DOCLK, HSYNC, VSYNC, adjust according to IC
ssp_write_dat(0xEC);//40,42,60,62,
ssp_write_cmd(0x0c);
ssp_write_dat(0x00);
ssp_write_dat(0xd5);
ssp_write_cmd(0xF6);//set RGB mode or VSYNC mode interface, 16 or 18BIT .
ssp_write_dat(0x01);//01
ssp_write_dat(0x10);
ssp_write_dat(0x07);//08
ssp_write_cmd(0xB5);
ssp_write_dat(0x02);
ssp_write_dat(0x02);
ssp_write_dat(0x0a);
ssp_write_dat(0x12);//HBP
//********Window****************
ssp_write_cmd(0x2A); //320
ssp_write_dat(0x00);
ssp_write_dat(0x00);
ssp_write_dat(0x01);
ssp_write_dat(0x3F);
ssp_write_cmd(0x2B); //240
ssp_write_dat(0x00);
ssp_write_dat(0x00);
ssp_write_dat(0x00);
ssp_write_dat(0xEF);
//******************************
ssp_write_cmd(0x11);//Exit Sleep
msleep(120);
ssp_write_cmd(0x29);//Display On
ssp_write_cmd(0x2c);
}
