unsigned long
rtc_time_m48t37(paddr_t base, unsigned reg_shift, int mmap, int cent_reg) {
struct tm tm;
int cent = 0;
//Tell Neutrino what kind of chip for 'rtc' utility
hwi_add_rtc("m48t37", base, reg_shift, 0x8000, mmap, cent_reg);
chip_access(base, reg_shift, mmap, 0x8000);
do {
tm.tm_sec = rdcmos(M48T37_TIME_REGS + 0x9);
tm.tm_min = rdcmos(M48T37_TIME_REGS + 0xa);
tm.tm_hour = rdcmos(M48T37_TIME_REGS + 0xb);
tm.tm_mday = rdcmos(M48T37_TIME_REGS + 0xd);
tm.tm_mon = rdcmos(M48T37_TIME_REGS + 0xe);
tm.tm_year = rdcmos(M48T37_TIME_REGS + 0xf);
if(cent_reg >= 0)
cent = rdcmos(M48T37_TIME_REGS + cent_reg);
//Loop while time inconsistent
} while(tm.tm_sec != rdcmos(M48T37_TIME_REGS + 0x9));
chip_done();
tm.tm_sec &= ~0x80;
tm.tm_sec = bcd2bin(tm.tm_sec);
tm.tm_min = bcd2bin(tm.tm_min);
tm.tm_hour = bcd2bin(tm.tm_hour);
tm.tm_mday = bcd2bin(tm.tm_mday);
tm.tm_mon = bcd2bin(tm.tm_mon);
tm.tm_year = bcd2bin(tm.tm_year);
tm.tm_mon -= 1;
if(cent_reg >= 0) {
if(cent > 19) tm.tm_year += (bcd2bin(cent)-19) * 100;
} else if(tm.tm_year < 70) {
tm.tm_year += 100; //21st century.
}
return(calc_time_t(&tm));
}
unsigned long
rtc_time_ds1743(paddr_t base, unsigned reg_shift, int mmap, int cent_reg) {
struct tm tm;
unsigned cent;
unsigned reg;
//Tell Neutrino what kind of chip for 'rtc' utility
hwi_add_rtc("ds1743", base, reg_shift, DS1743_YEAR+1, mmap, -1);
chip_access(base, reg_shift, mmap, DS1743_YEAR+1);
// Stop the chip from updating
chip_write8(DS1743_CONTROL, chip_read8(DS1743_CONTROL) | DS1743_CONTROL_R);
reg = chip_read8(DS1743_SECONDS);
if(reg & DS1743_SECONDS_OSC) {
// clock oscillator not running
chip_write8(DS1743_SECONDS, reg & ~DS1743_SECONDS_OSC);
}
reg = chip_read8(DS1743_DAY);
if(reg & DS1743_DAY_FT) {
// need to turn off frequency test mode
chip_write8(DS1743_DAY, reg & ~DS1743_DAY_FT);
}
// convert BCD to binary
tm.tm_sec = bcd2bin(chip_read8(DS1743_SECONDS) & DS1743_SECONDS_MASK);
tm.tm_min = bcd2bin(chip_read8(DS1743_MINUTES) & DS1743_MINUTES_MASK);
tm.tm_hour = bcd2bin(chip_read8(DS1743_HOUR) & DS1743_HOUR_MASK);
tm.tm_mday = bcd2bin(chip_read8(DS1743_DATE) & DS1743_DATE_MASK);
tm.tm_mon = bcd2bin(chip_read8(DS1743_MONTH) & DS1743_MONTH_MASK) - 1;
tm.tm_year = bcd2bin(chip_read8(DS1743_YEAR));
cent = bcd2bin(chip_read8(DS1743_CONTROL) & DS1743_CONTROL_CENT_MASK);
// Start the chip updating again
chip_write8(DS1743_CONTROL, chip_read8(DS1743_CONTROL) & ~DS1743_CONTROL_R);
tm.tm_year += (cent-19) * 100;
chip_done();
return(calc_time_t(&tm));
}
unsigned long
rtc_time_mc146818(paddr_t base, unsigned reg_shift, int mmap, int cent_reg) {
struct tm tm;
unsigned save_hour;
unsigned reg_b;
unsigned cent;
unsigned char sra;
//Tell Neutrino what kind of chip for 'rtc' utility
hwi_add_rtc("mc146818", base, reg_shift, 2, mmap, cent_reg);
chip_access(base, reg_shift, mmap, 2);
// bail if the clock is not running.
sra = rdcmos(MC146818_SRA);
if ((sra & 0x60) != 0x20) {
chip_write8 (1, (sra | 0x60)); //Check for ATI IXP200 RTC - these bits are reserved
if ((rdcmos(MC146818_SRA) & 0x60) != 0) {
chip_write8 (1, sra); //restore old value
return(0L);
}
}
reg_b = rdcmos(MC146818_SRB);
do {
tm.tm_sec = rdcmos(0);
tm.tm_min = rdcmos(2);
tm.tm_hour = rdcmos(4);
tm.tm_mday = rdcmos(7);
tm.tm_mon = rdcmos(8);
tm.tm_year = rdcmos(9);
//Loop while time inconsistent
} while(tm.tm_sec != rdcmos(0));
chip_done();
save_hour = tm.tm_hour;
tm.tm_hour &= ~0x80;
if(!(reg_b & MC146818_SRB_DM)) {
tm.tm_sec = bcd2bin(tm.tm_sec);
tm.tm_min = bcd2bin(tm.tm_min);
tm.tm_hour = bcd2bin(tm.tm_hour);
tm.tm_mday = bcd2bin(tm.tm_mday);
tm.tm_mon = bcd2bin(tm.tm_mon);
tm.tm_year = bcd2bin(tm.tm_year);
}
if(!(reg_b & MC146818_SRB_24_12) && (save_hour & 0x80)) {
//12 hour format & past 12pm
tm.tm_hour += 12;
}
tm.tm_mon -= 1;
if(cent_reg >= 0) {
cent = rdcmos(cent_reg); //century
if(!(reg_b & MC146818_SRB_DM)) {
cent = bcd2bin(cent_reg);
}
if(cent == 20) tm.tm_year += 100;
} else if(tm.tm_year < 70) {
tm.tm_year += 100; //21st century.
}
return(calc_time_t(&tm));
}
