static int i2c_resume_device_from_suspend(struct device *dev)
{
struct i2c_qmsi_driver_data *drv_data = GET_DRIVER_DATA(dev);
qm_i2c_restore_context(GET_CONTROLLER_INSTANCE(dev),
&drv_data->i2c_ctx);
i2c_qmsi_set_power_state(dev, DEVICE_PM_ACTIVE_STATE);
return 0;
}
static int i2c_qmsi_init(struct device *dev)
{
struct i2c_qmsi_driver_data *driver_data = GET_DRIVER_DATA(dev);
const struct i2c_qmsi_config_info *config = dev->config->config_info;
qm_i2c_t instance = GET_CONTROLLER_INSTANCE(dev);
u32_t bitrate_cfg;
int err;
k_sem_init(&driver_data->device_sync_sem, 0, UINT_MAX);
k_sem_init(&driver_data->sem, 1, UINT_MAX);
switch (instance) {
case QM_I2C_0:
/* Register interrupt handler, unmask IRQ and route it
* to Lakemont core.
*/
IRQ_CONNECT(CONFIG_I2C_0_IRQ,
CONFIG_I2C_0_IRQ_PRI, qm_i2c_0_irq_isr, NULL,
CONFIG_I2C_0_IRQ_FLAGS);
irq_enable(CONFIG_I2C_0_IRQ);
QM_IR_UNMASK_INTERRUPTS(
QM_INTERRUPT_ROUTER->i2c_master_0_int_mask);
break;
#ifdef CONFIG_I2C_1
case QM_I2C_1:
IRQ_CONNECT(CONFIG_I2C_1_IRQ,
CONFIG_I2C_1_IRQ_PRI, qm_i2c_1_irq_isr, NULL,
CONFIG_I2C_1_IRQ_FLAGS);
irq_enable(CONFIG_I2C_1_IRQ);
QM_IR_UNMASK_INTERRUPTS(
QM_INTERRUPT_ROUTER->i2c_master_1_int_mask);
break;
#endif /* CONFIG_I2C_1 */
default:
return -EIO;
}
clk_periph_enable(config->clock_gate);
bitrate_cfg = _i2c_map_dt_bitrate(config->bitrate);
err = i2c_qmsi_configure(dev, I2C_MODE_MASTER | bitrate_cfg);
if (err < 0) {
return err;
}
dev->driver_api = &api;
i2c_qmsi_set_power_state(dev, DEVICE_PM_ACTIVE_STATE);
return 0;
}
static int i2c_suspend_device(struct device *dev)
{
if (device_busy_check(dev)) {
return -EBUSY;
}
struct i2c_qmsi_driver_data *drv_data = GET_DRIVER_DATA(dev);
qm_i2c_save_context(GET_CONTROLLER_INSTANCE(dev), &drv_data->i2c_ctx);
i2c_qmsi_set_power_state(dev, DEVICE_PM_SUSPEND_STATE);
return 0;
}
