static void lpc_init(struct device *dev) { printk(BIOS_DEBUG, "pch: lpc_init\n"); /* Set the value for PCI command register. */ pci_write_config16(dev, PCI_COMMAND, 0x000f); /* IO APIC initialization. */ pch_enable_ioapic(dev); pch_enable_serial_irqs(dev); /* Setup the PIRQ. */ pch_pirq_init(dev); /* Setup power options. */ pch_power_options(dev); /* Initialize power management */ switch (pch_silicon_type()) { case PCH_TYPE_CPT: /* CougarPoint */ cpt_pm_init(dev); break; case PCH_TYPE_PPT: /* PantherPoint */ ppt_pm_init(dev); break; default: printk(BIOS_ERR, "Unknown Chipset: 0x%04x\n", dev->device); } /* Set the state of the GPIO lines. */ //gpio_init(dev); /* Initialize the real time clock. */ pch_rtc_init(dev); /* Initialize ISA DMA. */ isa_dma_init(); /* Initialize the High Precision Event Timers, if present. */ enable_hpet(); /* Initialize Clock Gating */ enable_clock_gating(dev); setup_i8259(); /* The OS should do this? */ /* Interrupt 9 should be level triggered (SCI) */ i8259_configure_irq_trigger(9, 1); pch_disable_smm_only_flashing(dev); #if CONFIG_HAVE_SMI_HANDLER pch_lock_smm(dev); #endif pch_fixups(dev); }
static void lpc_init(struct device *dev) { printk(BIOS_DEBUG, "i82801gx: lpc_init\n"); /* Set the value for PCI command register. */ pci_write_config16(dev, PCI_COMMAND, 0x000f); /* IO APIC initialization. */ i82801gx_enable_ioapic(dev); i82801gx_enable_serial_irqs(dev); /* Setup the PIRQ. */ i82801gx_pirq_init(dev); /* Setup power options. */ i82801gx_power_options(dev); /* Configure Cx state registers */ i82801gx_configure_cstates(dev); /* Set the state of the GPIO lines. */ //gpio_init(dev); /* Initialize the real time clock. */ i82801gx_rtc_init(dev); /* Initialize ISA DMA. */ isa_dma_init(); /* Initialize the High Precision Event Timers, if present. */ enable_hpet(); /* Initialize Clock Gating */ enable_clock_gating(); setup_i8259(); /* The OS should do this? */ /* Interrupt 9 should be level triggered (SCI) */ i8259_configure_irq_trigger(9, 1); #if CONFIG_HAVE_SMI_HANDLER i82801gx_lock_smm(dev); #endif i82801gx_spi_init(); i82801gx_fixups(dev); }
void lpc_soc_init(struct device *dev) { /* Legacy initialization */ isa_dma_init(); pch_misc_init(); /* Enable CLKRUN_EN for power gating LPC */ lpc_enable_pci_clk_cntl(); /* Set LPC Serial IRQ mode */ if (IS_ENABLED(CONFIG_SERIRQ_CONTINUOUS_MODE)) lpc_set_serirq_mode(SERIRQ_CONTINUOUS); else lpc_set_serirq_mode(SERIRQ_QUIET); /* Interrupt configuration */ pch_enable_ioapic(dev); soc_pch_pirq_init(dev); setup_i8259(); i8259_configure_irq_trigger(9, 1); clock_gate_8254(dev); soc_mirror_dmi_pcr_io_dec(); }