/*
* Handler for command with PIO data-in phase (Read/Read Multiple).
*/
static ide_startstop_t task_in_intr(ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
struct request *rq = hwif->rq;
u8 stat = hwif->tp_ops->read_status(hwif);
/* Error? */
if (stat & ATA_ERR)
return task_error(drive, rq, __func__, stat);
/* Didn't want any data? Odd. */
if ((stat & ATA_DRQ) == 0)
return task_in_unexpected(drive, rq, stat);
ide_pio_datablock(drive, rq, 0);
/* Are we done? Check status and finish transfer. */
if (!hwif->nleft) {
stat = wait_drive_not_busy(drive);
if (!OK_STAT(stat, 0, BAD_STAT))
return task_error(drive, rq, __func__, stat);
task_end_request(drive, rq, stat);
return ide_stopped;
}
/* Still data left to transfer. */
ide_set_handler(drive, &task_in_intr, WAIT_WORSTCASE, NULL);
return ide_started;
}
/*
* atapi_reset_pollfunc() gets invoked to poll the interface for completion
* every 50ms during an atapi drive reset operation. If the drive has not yet
* responded, and we have not yet hit our maximum waiting time, then the timer
* is restarted for another 50ms.
*/
static ide_startstop_t atapi_reset_pollfunc(ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
const struct ide_tp_ops *tp_ops = hwif->tp_ops;
u8 stat;
tp_ops->dev_select(drive);
udelay(10);
stat = tp_ops->read_status(hwif);
if (OK_STAT(stat, 0, ATA_BUSY))
printk(KERN_INFO "%s: ATAPI reset complete\n", drive->name);
else {
if (time_before(jiffies, hwif->poll_timeout)) {
ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20);
/* continue polling */
return ide_started;
}
/* end of polling */
hwif->polling = 0;
printk(KERN_ERR "%s: ATAPI reset timed-out, status=0x%02x\n",
drive->name, stat);
/* do it the old fashioned way */
return do_reset1(drive, 1);
}
/* done polling */
hwif->polling = 0;
ide_complete_drive_reset(drive, 0);
return ide_stopped;
}
/*
* atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
* during an atapi drive reset operation. If the drive has not yet responded,
* and we have not yet hit our maximum waiting time, then the timer is restarted
* for another 50ms.
*/
static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
{
ide_hwgroup_t *hwgroup = HWGROUP(drive);
ide_hwif_t *hwif = HWIF(drive);
u8 stat;
SELECT_DRIVE(drive);
udelay (10);
if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
printk("%s: ATAPI reset complete\n", drive->name);
} else {
if (time_before(jiffies, hwgroup->poll_timeout)) {
if (HWGROUP(drive)->handler != NULL)
BUG();
ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
/* continue polling */
return ide_started;
}
/* end of polling */
hwgroup->poll_timeout = 0;
printk("%s: ATAPI reset timed-out, status=0x%02x\n",
drive->name, stat);
/* do it the old fashioned way */
return do_reset1(drive, 1);
}
/* done polling */
hwgroup->poll_timeout = 0;
return ide_stopped;
}
/*
* reset_pollfunc() gets invoked to poll the interface for completion every 50ms
* during an ide reset operation. If the drives have not yet responded,
* and we have not yet hit our maximum waiting time, then the timer is restarted
* for another 50ms.
*/
static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
{
ide_hwgroup_t *hwgroup = HWGROUP(drive);
ide_hwif_t *hwif = HWIF(drive);
u8 tmp;
if (hwif->reset_poll != NULL) {
if (hwif->reset_poll(drive)) {
printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
hwif->name, drive->name);
return ide_stopped;
}
}
if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
if (time_before(jiffies, hwgroup->poll_timeout)) {
if (HWGROUP(drive)->handler != NULL)
BUG();
ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
/* continue polling */
return ide_started;
}
printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
drive->failures++;
} else {
printk("%s: reset: ", hwif->name);
if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
printk("success\n");
drive->failures = 0;
} else {
drive->failures++;
#if FANCY_STATUS_DUMPS
printk("master: ");
switch (tmp & 0x7f) {
case 1: printk("passed");
break;
case 2: printk("formatter device error");
break;
case 3: printk("sector buffer error");
break;
case 4: printk("ECC circuitry error");
break;
case 5: printk("controlling MPU error");
break;
default:printk("error (0x%02x?)", tmp);
}
if (tmp & 0x80)
printk("; slave: failed");
printk("\n");
#else
printk("failed\n");
#endif /* FANCY_STATUS_DUMPS */
}
}
hwgroup->poll_timeout = 0; /* done polling */
return ide_stopped;
}
/*
* We got an interrupt on a task_in case, but no errors and no DRQ.
*
* It might be a spurious irq (shared irq), but it might be a
* command that had no output.
*/
static ide_startstop_t task_in_unexpected(ide_drive_t *drive, struct request *rq, u8 stat)
{
/* Command all done? */
if (OK_STAT(stat, ATA_DRDY, ATA_BUSY)) {
task_end_request(drive, rq, stat);
return ide_stopped;
}
/* Assume it was a spurious irq */
ide_set_handler(drive, &task_in_intr, WAIT_WORSTCASE, NULL);
return ide_started;
}
/*
* Handler for commands without a data phase
*/
static ide_startstop_t task_no_data_intr(ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
ide_task_t *task = &hwif->task;
struct ide_taskfile *tf = &task->tf;
int custom = (task->tf_flags & IDE_TFLAG_CUSTOM_HANDLER) ? 1 : 0;
int retries = (custom && tf->command == ATA_CMD_INIT_DEV_PARAMS) ? 5 : 1;
u8 stat;
local_irq_enable_in_hardirq();
while (1) {
stat = hwif->tp_ops->read_status(hwif);
if ((stat & ATA_BUSY) == 0 || retries-- == 0)
break;
udelay(10);
};
if (!OK_STAT(stat, ATA_DRDY, BAD_STAT)) {
if (custom && tf->command == ATA_CMD_SET_MULTI) {
drive->mult_req = drive->mult_count = 0;
drive->special.b.recalibrate = 1;
(void)ide_dump_status(drive, __func__, stat);
return ide_stopped;
} else if (custom && tf->command == ATA_CMD_INIT_DEV_PARAMS) {
if ((stat & (ATA_ERR | ATA_DRQ)) == 0) {
ide_set_handler(drive, &task_no_data_intr,
WAIT_WORSTCASE, NULL);
return ide_started;
}
}
return ide_error(drive, "task_no_data_intr", stat);
/* calls ide_end_drive_cmd */
}
if (!custom)
ide_end_drive_cmd(drive, stat, ide_read_error(drive));
else if (tf->command == ATA_CMD_IDLEIMMEDIATE) {
hwif->tp_ops->tf_read(drive, task);
if (tf->lbal != 0xc4) {
printk(KERN_ERR "%s: head unload failed!\n",
drive->name);
ide_tf_dump(drive->name, tf);
} else
drive->dev_flags |= IDE_DFLAG_PARKED;
ide_end_drive_cmd(drive, stat, ide_read_error(drive));
} else if (tf->command == ATA_CMD_SET_MULTI)
drive->mult_count = drive->mult_req;
return ide_stopped;
}
/*
* promise_read_intr() is the handler for disk read/multread interrupts
*/
static ide_startstop_t promise_read_intr (ide_drive_t *drive)
{
byte stat;
int i;
unsigned int sectors_left, sectors_avail, nsect;
struct request *rq;
if (!OK_STAT(stat=GET_STAT(),DATA_READY,BAD_R_STAT)) {
return ide_error(drive, "promise_read_intr", stat);
}
read_again:
do {
sectors_left = IN_BYTE(IDE_NSECTOR_REG);
IN_BYTE(IDE_SECTOR_REG);
} while (IN_BYTE(IDE_NSECTOR_REG) != sectors_left);
rq = HWGROUP(drive)->rq;
sectors_avail = rq->nr_sectors - sectors_left;
read_next:
rq = HWGROUP(drive)->rq;
if ((nsect = rq->current_nr_sectors) > sectors_avail)
nsect = sectors_avail;
sectors_avail -= nsect;
ide_input_data(drive, rq->buffer, nsect * SECTOR_WORDS);
#ifdef DEBUG
printk("%s: promise_read: sectors(%ld-%ld), buffer=0x%08lx, "
"remaining=%ld\n", drive->name, rq->sector, rq->sector+nsect-1,
(unsigned long) rq->buffer+(nsect<<9), rq->nr_sectors-nsect);
#endif
rq->sector += nsect;
rq->buffer += nsect<<9;
rq->errors = 0;
i = (rq->nr_sectors -= nsect);
if ((rq->current_nr_sectors -= nsect) <= 0)
ide_end_request(1, HWGROUP(drive));
if (i > 0) {
if (sectors_avail)
goto read_next;
stat = GET_STAT();
if(stat & DRQ_STAT)
goto read_again;
if(stat & BUSY_STAT) {
ide_set_handler (drive, &promise_read_intr, WAIT_CMD, NULL);
return ide_started;
}
printk("Ah! promise read intr: sectors left !DRQ !BUSY\n");
return ide_error(drive, "promise read intr", stat);
}
return ide_stopped;
}
int pmac_ide_dmaproc(ide_dma_action_t func, ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
int ix, dstat;
volatile struct dbdma_regs *dma;
/* Can we stuff a pointer to our intf structure in config_data
* or select_data in hwif ?
*/
ix = pmac_ide_find(drive);
if (ix < 0)
return 0;
dma = pmac_ide[ix].dma_regs;
switch (func) {
case ide_dma_on:
case ide_dma_off:
case ide_dma_off_quietly:
pmac_ide_dma_onoff(drive, (func == ide_dma_on));
break;
case ide_dma_check:
if (hwif->autodma)
pmac_ide_dma_onoff(drive, 1);
break;
case ide_dma_read:
case ide_dma_write:
if (!pmac_ide_build_dmatable(drive, ix, func==ide_dma_write))
return 1;
drive->waiting_for_dma = 1;
if (drive->media != ide_disk)
return 0;
ide_set_handler(drive, &ide_dma_intr, WAIT_CMD, NULL);
OUT_BYTE(func==ide_dma_write? WIN_WRITEDMA: WIN_READDMA,
IDE_COMMAND_REG);
case ide_dma_begin:
out_le32(&dma->control, (RUN << 16) | RUN);
break;
case ide_dma_end:
drive->waiting_for_dma = 0;
dstat = in_le32(&dma->status);
out_le32(&dma->control, ((RUN|WAKE|DEAD) << 16));
/* verify good dma status */
return (dstat & (RUN|DEAD|ACTIVE)) != RUN;
case ide_dma_test_irq:
return (in_le32(&dma->status) & (RUN|ACTIVE)) == RUN;
default:
printk(KERN_ERR "pmac_ide_dmaproc: bad func %d\n", func);
}
return 0;
}
static ide_startstop_t task_no_data_intr(ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
struct ide_cmd *cmd = &hwif->cmd;
struct ide_taskfile *tf = &cmd->tf;
int custom = (cmd->tf_flags & IDE_TFLAG_CUSTOM_HANDLER) ? 1 : 0;
int retries = (custom && tf->command == ATA_CMD_INIT_DEV_PARAMS) ? 5 : 1;
u8 stat;
local_irq_enable_in_hardirq();
while (1) {
stat = hwif->tp_ops->read_status(hwif);
if ((stat & ATA_BUSY) == 0 || retries-- == 0)
break;
udelay(10);
};
if (!OK_STAT(stat, ATA_DRDY, BAD_STAT)) {
if (custom && tf->command == ATA_CMD_SET_MULTI) {
drive->mult_req = drive->mult_count = 0;
drive->special_flags |= IDE_SFLAG_RECALIBRATE;
(void)ide_dump_status(drive, __func__, stat);
return ide_stopped;
} else if (custom && tf->command == ATA_CMD_INIT_DEV_PARAMS) {
if ((stat & (ATA_ERR | ATA_DRQ)) == 0) {
ide_set_handler(drive, &task_no_data_intr,
WAIT_WORSTCASE);
return ide_started;
}
}
return ide_error(drive, "task_no_data_intr", stat);
}
if (custom && tf->command == ATA_CMD_SET_MULTI)
drive->mult_count = drive->mult_req;
if (custom == 0 || tf->command == ATA_CMD_IDLEIMMEDIATE ||
tf->command == ATA_CMD_CHK_POWER) {
struct request *rq = hwif->rq;
if (blk_pm_request(rq))
ide_complete_pm_rq(drive, rq);
else
ide_finish_cmd(drive, cmd, stat);
}
return ide_stopped;
}
/*
* do_pdc4030_io() is called from do_rw_disk, having had the block number
* already set up. It issues a READ or WRITE command to the Promise
* controller, assuming LBA has been used to set up the block number.
*/
ide_startstop_t do_pdc4030_io (ide_drive_t *drive, struct request *rq)
{
unsigned long timeout;
byte stat;
if (rq->cmd == READ) {
ide_set_handler(drive, &promise_read_intr, WAIT_CMD, NULL);
OUT_BYTE(PROMISE_READ, IDE_COMMAND_REG);
/* The card's behaviour is odd at this point. If the data is
available, DRQ will be true, and no interrupt will be
generated by the card. If this is the case, we need to simulate
an interrupt. Ugh! Otherwise, if an interrupt will occur, bit0
of the SELECT register will be high, so we can just return and
be interrupted.*/
timeout = jiffies + HZ/20; /* 50ms wait */
do {
stat=GET_STAT();
if(stat & DRQ_STAT) {
disable_irq(HWIF(drive)->irq);
ide_intr(HWIF(drive)->irq,HWGROUP(drive),NULL);
enable_irq(HWIF(drive)->irq);
return ide_stopped;
}
if(IN_BYTE(IDE_SELECT_REG) & 0x01)
return ide_started;
udelay(1);
} while (time_before(jiffies, timeout));
printk("%s: reading: No DRQ and not waiting - Odd!\n",
drive->name);
return ide_started;
}
if (rq->cmd == WRITE) {
ide_startstop_t startstop;
OUT_BYTE(PROMISE_WRITE, IDE_COMMAND_REG);
if (ide_wait_stat(&startstop, drive, DATA_READY, drive->bad_wstat, WAIT_DRQ)) {
printk("%s: no DRQ after issuing PROMISE_WRITE\n", drive->name);
return startstop;
}
if (!drive->unmask)
__cli(); /* local CPU only */
HWGROUP(drive)->wrq = *rq; /* scratchpad */
return promise_write(drive);
}
printk("%s: bad command: %d\n", drive->name, rq->cmd);
ide_end_request(0, HWGROUP(drive));
return ide_stopped;
}
/*
* reset_pollfunc() gets invoked to poll the interface for completion every 50ms
* during an ide reset operation. If the drives have not yet responded,
* and we have not yet hit our maximum waiting time, then the timer is restarted
* for another 50ms.
*/
static ide_startstop_t reset_pollfunc(ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
const struct ide_port_ops *port_ops = hwif->port_ops;
u8 tmp;
int err = 0;
if (port_ops && port_ops->reset_poll) {
err = port_ops->reset_poll(drive);
if (err) {
printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
hwif->name, drive->name);
goto out;
}
}
tmp = hwif->tp_ops->read_status(hwif);
if (!OK_STAT(tmp, 0, ATA_BUSY)) {
if (time_before(jiffies, hwif->poll_timeout)) {
ide_set_handler(drive, &reset_pollfunc, HZ/20);
/* continue polling */
return ide_started;
}
printk(KERN_ERR "%s: reset timed-out, status=0x%02x\n",
hwif->name, tmp);
drive->failures++;
err = -EIO;
} else {
tmp = ide_read_error(drive);
if (tmp == 1) {
printk(KERN_INFO "%s: reset: success\n", hwif->name);
drive->failures = 0;
} else {
ide_reset_report_error(hwif, tmp);
drive->failures++;
err = -EIO;
}
}
out:
hwif->polling = 0; /* done polling */
ide_complete_drive_reset(drive, err);
return ide_stopped;
}
/*
* set_geometry_intr() is invoked on completion of a WIN_SPECIFY cmd.
*/
static ide_startstop_t set_geometry_intr(ide_drive_t *drive)
{
int retries = 5;
u8 stat;
while (((stat = ide_read_status(drive)) & BUSY_STAT) && retries--)
udelay(10);
if (OK_STAT(stat, READY_STAT, BAD_STAT))
return ide_stopped;
if (stat & (ERR_STAT|DRQ_STAT))
return ide_error(drive, "set_geometry_intr", stat);
BUG_ON(HWGROUP(drive)->handler != NULL);
ide_set_handler(drive, &set_geometry_intr, WAIT_WORSTCASE, NULL);
return ide_started;
}
/*
* triton_dmaproc() initiates/aborts DMA read/write operations on a drive.
*
* The caller is assumed to have selected the drive and programmed the drive's
* sector address using CHS or LBA. All that remains is to prepare for DMA
* and then issue the actual read/write DMA/PIO command to the drive.
*
* For ATAPI devices, we just prepare for DMA and return. The caller should
* then issue the packet command to the drive and call us again with
* ide_dma_begin afterwards.
*
* Returns 0 if all went well.
* Returns 1 if DMA read/write could not be started, in which case
* the caller should revert to PIO for the current request.
*/
static int triton_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
{
unsigned long dma_base = HWIF(drive)->dma_base;
unsigned int reading = (1 << 3);
switch (func) {
case ide_dma_abort:
outb(inb(dma_base)&~1, dma_base); /* stop DMA */
return 0;
case ide_dma_check:
return config_drive_for_dma (drive);
case ide_dma_write:
reading = 0;
case ide_dma_read:
break;
case ide_dma_status_bad:
return ((inb(dma_base+2) & 7) != 4); /* verify good DMA status */
case ide_dma_transferred:
#if 0
return (number of bytes actually transferred);
#else
return (0);
#endif
case ide_dma_begin:
outb(inb(dma_base)|1, dma_base); /* begin DMA */
return 0;
default:
printk("triton_dmaproc: unsupported func: %d\n", func);
return 1;
}
if (build_dmatable (drive))
return 1;
outl(virt_to_bus (HWIF(drive)->dmatable), dma_base + 4); /* PRD table */
outb(reading, dma_base); /* specify r/w */
outb(0x26, dma_base+2); /* clear status bits */
#ifdef CONFIG_BLK_DEV_IDEATAPI
if (drive->media != ide_disk)
return 0;
#endif /* CONFIG_BLK_DEV_IDEATAPI */
ide_set_handler(drive, &dma_intr, WAIT_CMD); /* issue cmd to drive */
OUT_BYTE(reading ? WIN_READDMA : WIN_WRITEDMA, IDE_COMMAND_REG);
outb(inb(dma_base)|1, dma_base); /* begin DMA */
return 0;
}
static ide_startstop_t pre_task_out_intr(ide_drive_t *drive, struct request *rq)
{
ide_startstop_t startstop;
if (ide_wait_stat(&startstop, drive, ATA_DRQ,
drive->bad_wstat, WAIT_DRQ)) {
printk(KERN_ERR "%s: no DRQ after issuing %sWRITE%s\n",
drive->name, drive->hwif->data_phase ? "MULT" : "",
(drive->dev_flags & IDE_DFLAG_LBA48) ? "_EXT" : "");
return startstop;
}
if ((drive->dev_flags & IDE_DFLAG_UNMASK) == 0)
local_irq_disable();
ide_set_handler(drive, &task_out_intr, WAIT_WORSTCASE, NULL);
ide_pio_datablock(drive, rq, 1);
return ide_started;
}
static ide_startstop_t pre_task_out_intr(ide_drive_t *drive, struct request *rq)
{
ide_startstop_t startstop;
if (ide_wait_stat(&startstop, drive, DRQ_STAT,
drive->bad_wstat, WAIT_DRQ)) {
printk(KERN_ERR "%s: no DRQ after issuing %sWRITE%s\n",
drive->name,
drive->hwif->data_phase ? "MULT" : "",
drive->addressing ? "_EXT" : "");
return startstop;
}
if (!drive->unmask)
local_irq_disable();
ide_set_handler(drive, &task_out_intr, WAIT_WORSTCASE, NULL);
ide_pio_datablock(drive, rq, 1);
return ide_started;
}
/*
* promise_write() transfers a block of one or more sectors of data to a
* drive as part of a disk write operation. All but 4 sectors are transfered
* in the first attempt, then the interface is polled (nicely!) for completion
* before the final 4 sectors are transfered. Don't ask me why, but this is
* how it's done in the drivers for other O/Ses. There is no interrupt
* generated on writes, which is why we have to do it like this.
*/
static ide_startstop_t promise_write (ide_drive_t *drive)
{
ide_hwgroup_t *hwgroup = HWGROUP(drive);
struct request *rq = &hwgroup->wrq;
int i;
if (rq->nr_sectors > 4) {
if (ide_multwrite(drive, rq->nr_sectors - 4))
return ide_stopped;
hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
ide_set_handler (drive, &promise_write_pollfunc, 1, NULL);
return ide_started;
} else {
if (ide_multwrite(drive, rq->nr_sectors))
return ide_stopped;
rq = hwgroup->rq;
for (i = rq->nr_sectors; i > 0;) {
i -= rq->current_nr_sectors;
ide_end_request(1, hwgroup);
}
}
return ide_stopped;
}
/*
* promise_write_pollfunc() is the handler for disk write completion polling.
*/
static ide_startstop_t promise_write_pollfunc (ide_drive_t *drive)
{
int i;
ide_hwgroup_t *hwgroup = HWGROUP(drive);
struct request *rq;
if (IN_BYTE(IDE_NSECTOR_REG) != 0) {
if (time_before(jiffies, hwgroup->poll_timeout)) {
ide_set_handler (drive, &promise_write_pollfunc, 1, NULL);
return ide_started; /* continue polling... */
}
printk("%s: write timed-out!\n",drive->name);
return ide_error (drive, "write timeout", GET_STAT());
}
if (ide_multwrite(drive, 4))
return ide_stopped;
rq = hwgroup->rq;
for (i = rq->nr_sectors; i > 0;) {
i -= rq->current_nr_sectors;
ide_end_request(1, hwgroup);
}
return ide_stopped;
}
/*
* set_geometry_intr() is invoked on completion of a WIN_SPECIFY cmd.
*/
static ide_startstop_t set_geometry_intr(ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
int retries = 5;
u8 stat;
local_irq_enable_in_hardirq();
while (1) {
stat = hwif->tp_ops->read_status(hwif);
if ((stat & BUSY_STAT) == 0 || retries-- == 0)
break;
udelay(10);
};
if (OK_STAT(stat, READY_STAT, BAD_STAT))
return ide_stopped;
if (stat & (ERR_STAT|DRQ_STAT))
return ide_error(drive, "set_geometry_intr", stat);
ide_set_handler(drive, &set_geometry_intr, WAIT_WORSTCASE, NULL);
return ide_started;
}
/*
* Handler for command with PIO data-out phase (Write/Write Multiple).
*/
static ide_startstop_t task_out_intr (ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
struct request *rq = hwif->rq;
u8 stat = hwif->tp_ops->read_status(hwif);
if (!OK_STAT(stat, DRIVE_READY, drive->bad_wstat))
return task_error(drive, rq, __func__, stat);
/* Deal with unexpected ATA data phase. */
if (((stat & ATA_DRQ) == 0) ^ !hwif->nleft)
return task_error(drive, rq, __func__, stat);
if (!hwif->nleft) {
task_end_request(drive, rq, stat);
return ide_stopped;
}
/* Still data left to transfer. */
ide_pio_datablock(drive, rq, 1);
ide_set_handler(drive, &task_out_intr, WAIT_WORSTCASE, NULL);
return ide_started;
}
int pmac_ide_dmaproc(ide_dma_action_t func, ide_drive_t *drive)
{
int ix, dstat, i;
volatile struct dbdma_regs *dma;
/* Can we stuff a pointer to our intf structure in config_data
* or select_data in hwif ?
*/
ix = pmac_ide_find(drive);
if (ix < 0)
return 0;
dma = pmac_ide[ix].dma_regs;
switch (func) {
case ide_dma_off:
printk(KERN_INFO "%s: DMA disabled\n", drive->name);
case ide_dma_off_quietly:
drive->using_dma = 0;
break;
case ide_dma_on:
case ide_dma_check:
pmac_ide_check_dma(drive);
break;
case ide_dma_read:
case ide_dma_write:
if (!pmac_ide_build_dmatable(drive, ix, func==ide_dma_write))
return 1;
drive->waiting_for_dma = 1;
if (drive->media != ide_disk)
return 0;
ide_set_handler(drive, &ide_dma_intr, WAIT_CMD, NULL);
OUT_BYTE(func==ide_dma_write? WIN_WRITEDMA: WIN_READDMA,
IDE_COMMAND_REG);
case ide_dma_begin:
out_le32(&dma->control, (RUN << 16) | RUN);
break;
case ide_dma_end:
drive->waiting_for_dma = 0;
dstat = in_le32(&dma->status);
out_le32(&dma->control, ((RUN|WAKE|DEAD) << 16));
/* verify good dma status */
return (dstat & (RUN|DEAD|ACTIVE)) != RUN;
case ide_dma_test_irq:
if ((in_le32(&dma->status) & (RUN|ACTIVE)) == RUN)
return 1;
/* That's a bit ugly and dangerous, but works in our case
* to workaround a problem with the channel status staying
* active if the drive returns an error
*/
if (IDE_CONTROL_REG) {
byte stat;
stat = GET_ALTSTAT();
if (stat & ERR_STAT)
return 1;
}
/* In some edge cases, some datas may still be in the dbdma
* engine fifo, we wait a bit for dbdma to complete
*/
while ((in_le32(&dma->status) & (RUN|ACTIVE)) != RUN) {
if (++i > 100)
return 0;
udelay(1);
}
return 1;
/* Let's implement tose just in case someone wants them */
case ide_dma_bad_drive:
case ide_dma_good_drive:
return check_drive_lists(drive, (func == ide_dma_good_drive));
case ide_dma_verbose:
return report_drive_dmaing(drive);
case ide_dma_retune:
case ide_dma_lostirq:
case ide_dma_timeout:
printk(KERN_WARNING "ide_pmac_dmaproc: chipset supported %s func only: %d\n", ide_dmafunc_verbose(func), func);
return 1;
default:
printk(KERN_WARNING "ide_pmac_dmaproc: unsupported %s func: %d\n", ide_dmafunc_verbose(func), func);
return 1;
}
return 0;
}
static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
struct ide_cmd *cmd = &hwif->cmd;
struct request *rq = hwif->rq;
ide_expiry_t *expiry = NULL;
int dma_error = 0, dma, stat, thislen, uptodate = 0;
int write = (rq_data_dir(rq) == WRITE) ? 1 : 0, rc, nsectors;
int sense = blk_sense_request(rq);
unsigned int timeout;
u16 len;
u8 ireason;
ide_debug_log(IDE_DBG_PC, "cmd[0]: 0x%x, write: 0x%x",
rq->cmd[0], write);
/* check for errors */
dma = drive->dma;
if (dma) {
drive->dma = 0;
drive->waiting_for_dma = 0;
dma_error = hwif->dma_ops->dma_end(drive);
ide_dma_unmap_sg(drive, cmd);
if (dma_error) {
printk(KERN_ERR PFX "%s: DMA %s error\n", drive->name,
write ? "write" : "read");
ide_dma_off(drive);
}
}
rc = cdrom_decode_status(drive, 0, &stat);
if (rc) {
if (rc == 2)
goto out_end;
return ide_stopped;
}
/* using dma, transfer is complete now */
if (dma) {
if (dma_error)
return ide_error(drive, "dma error", stat);
uptodate = 1;
goto out_end;
}
ide_read_bcount_and_ireason(drive, &len, &ireason);
thislen = blk_fs_request(rq) ? len : cmd->nleft;
if (thislen > len)
thislen = len;
ide_debug_log(IDE_DBG_PC, "DRQ: stat: 0x%x, thislen: %d",
stat, thislen);
/* If DRQ is clear, the command has completed. */
if ((stat & ATA_DRQ) == 0) {
if (blk_fs_request(rq)) {
/*
* If we're not done reading/writing, complain.
* Otherwise, complete the command normally.
*/
uptodate = 1;
if (cmd->nleft > 0) {
printk(KERN_ERR PFX "%s: %s: data underrun "
"(%u bytes)\n", drive->name, __func__,
cmd->nleft);
if (!write)
rq->cmd_flags |= REQ_FAILED;
uptodate = 0;
}
} else if (!blk_pc_request(rq)) {
ide_cd_request_sense_fixup(drive, cmd);
/* complain if we still have data left to transfer */
uptodate = cmd->nleft ? 0 : 1;
if (uptodate == 0)
rq->cmd_flags |= REQ_FAILED;
}
goto out_end;
}
/* check which way to transfer data */
rc = ide_cd_check_ireason(drive, rq, len, ireason, write);
if (rc)
goto out_end;
cmd->last_xfer_len = 0;
ide_debug_log(IDE_DBG_PC, "data transfer, rq->cmd_type: 0x%x, "
"ireason: 0x%x",
rq->cmd_type, ireason);
/* transfer data */
while (thislen > 0) {
int blen = min_t(int, thislen, cmd->nleft);
if (cmd->nleft == 0)
break;
ide_pio_bytes(drive, cmd, write, blen);
cmd->last_xfer_len += blen;
thislen -= blen;
len -= blen;
if (sense && write == 0)
rq->sense_len += blen;
}
/* pad, if necessary */
if (len > 0) {
if (blk_fs_request(rq) == 0 || write == 0)
ide_pad_transfer(drive, write, len);
else {
printk(KERN_ERR PFX "%s: confused, missing data\n",
drive->name);
blk_dump_rq_flags(rq, "cdrom_newpc_intr");
}
}
if (blk_pc_request(rq)) {
timeout = rq->timeout;
} else {
timeout = ATAPI_WAIT_PC;
if (!blk_fs_request(rq))
expiry = ide_cd_expiry;
}
hwif->expiry = expiry;
ide_set_handler(drive, cdrom_newpc_intr, timeout);
return ide_started;
out_end:
if (blk_pc_request(rq) && rc == 0) {
unsigned int dlen = rq->data_len;
rq->data_len = 0;
if (blk_end_request(rq, 0, dlen))
BUG();
hwif->rq = NULL;
} else {
if (sense && uptodate)
ide_cd_complete_failed_rq(drive, rq);
if (blk_fs_request(rq)) {
if (cmd->nleft == 0)
uptodate = 1;
} else {
if (uptodate <= 0 && rq->errors == 0)
rq->errors = -EIO;
}
if (uptodate == 0)
ide_cd_error_cmd(drive, cmd);
/* make sure it's fully ended */
if (blk_pc_request(rq))
nsectors = (rq->data_len + 511) >> 9;
else
nsectors = rq->hard_nr_sectors;
if (nsectors == 0)
nsectors = 1;
if (blk_fs_request(rq) == 0) {
rq->data_len -= (cmd->nbytes - cmd->nleft);
if (uptodate == 0 && (cmd->tf_flags & IDE_TFLAG_WRITE))
rq->data_len += cmd->last_xfer_len;
}
ide_complete_rq(drive, uptodate ? 0 : -EIO, nsectors << 9);
if (sense && rc == 2)
ide_error(drive, "request sense failure", stat);
}
static int ps2_ide_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
struct ps2_dmatable *t = (struct ps2_dmatable *)hwif->dmatable;
struct ata_dma_request *req = &t->ata_dma_request;
int ret;
#if !defined(GATHER_WRITE_DATA)
ps2sif_dmadata_t *sdd;
int cnt, i;
#endif /* !GATHER_WRITE_DATA */
DPRINT("ps2_ide_dmaproc: %s\n", procfunc[func]);
switch (func) {
case ide_dma_off:
printk("%s: DMA disabled\n", drive->name);
case ide_dma_off_quietly:
case ide_dma_on:
drive->using_dma = (func == ide_dma_on);
return 0;
case ide_dma_check:
/* only ide-disk DMA works... */
drive->using_dma = hwif->autodma && drive->media == ide_disk;
/* TODO: always UltraDMA mode 4 */
if (drive->using_dma) {
int ide_config_drive_speed (ide_drive_t *drive, byte speed);
ide_config_drive_speed(drive, XFER_UDMA_4);
}
return 0;
case ide_dma_read:
#ifdef NO_DMA_READ
return 1;
#endif
if (drive->media != ide_disk)
return 0;
if (!ps2_ide_build_dmatable(0, drive))
return 1; /* try PIO instead of DMA */
req->command = WIN_READDMA;
req->devctrl = drive->ctl;
drive->waiting_for_dma = 1;
ide_set_handler(drive, &ide_dma_intr, WAIT_CMD);
/* set nIEN for disable ATA interrupt */
/* (ATA interrupt is enabled in RPC handler) */
OUT_BYTE(drive->ctl|2, hwif->io_ports[IDE_CONTROL_OFFSET]);
flush_cache_all();
do {
ret = ps2sif_callrpc(&t->cd_ata, SIFNUM_DmaRead,
SIF_RPCM_NOWAIT, (void *)req,
sizeof(int) * 4 + sizeof(ps2sif_dmadata_t) * req->count,
NULL, 0, NULL, NULL);
switch (ret) {
case 0:
break;
case -SIF_RPCE_SENDP:
break;
default:
/* restore nIEN */
OUT_BYTE(drive->ctl, hwif->io_ports[IDE_CONTROL_OFFSET]);
printk("ps2_ide_dmaproc(read): callrpc failed, result=%d\n", ret);
drive->waiting_for_dma = 0;
return 1;
}
} while (ret < 0);
return 0;
case ide_dma_write:
#ifdef NO_DMA_WRITE
return 1;
#endif
if (drive->media != ide_disk)
return 0;
if (!ps2_ide_build_dmatable(1, drive))
return 1; /* try PIO instead of DMA */
req->command = WIN_WRITEDMA;
drive->waiting_for_dma = 1;
ide_set_handler(drive, &ide_dma_intr, WAIT_CMD);
flush_cache_all();
#if !defined(GATHER_WRITE_DATA)
sdd = req->sdd;
for (cnt = 0; cnt < req->count; cnt++) {
while (ps2sif_setdma(sdd, 1) == 0) {
i = 0x010000;
while (i--)
;
}
sdd++;
}
#else /* GATHER_WRITE_DATA */
req->sdd[0].data = t->dma_buffer;
req->sdd[0].addr = t->ata_iop_buffer;
req->sdd[0].size = req->size;
req->sdd[0].mode = 0;
while (ps2sif_setdma(req->sdd, 1) == 0) {
i = 0x010000;
while (i--)
;
}
#endif
do {
ret = ps2sif_callrpc(&t->cd_ata, SIFNUM_DmaWrite,
SIF_RPCM_NOWAIT, (void *)req,
sizeof(int) * 4,
NULL, 0, NULL, NULL);
switch (ret) {
case 0:
break;
case -SIF_RPCE_SENDP:
break;
default:
printk("ps2_ide_dmaproc(write): callrpc failed, result=%d\n", ret);
drive->waiting_for_dma = 0;
return 1;
}
} while (ret < 0);
return 0;
case ide_dma_begin:
/* TODO */
return 0;
case ide_dma_end: /* returns 1 on error, 0 otherwise */
/* disable DMA transfer */
*SPD_R_XFR_CTRL = 0;
*SPD_R_IF_CTRL = *SPD_R_IF_CTRL & ~IFC_DMA_EN;
/* force break DMA */
if (!(*SPD_R_INTR_STAT & 0x0001)) {
unsigned char if_ctrl;
if_ctrl = *SPD_R_IF_CTRL;
*SPD_R_IF_CTRL = IFC_ATA_RST;
udelay(100);
*SPD_R_IF_CTRL = if_ctrl;
do {
ret = ps2sif_callrpc(&t->cd_ata_end, 0, SIF_RPCM_NOWAIT, NULL, 0, NULL, 0, NULL, NULL);
switch (ret) {
case 0:
break;
case -SIF_RPCE_SENDP:
break;
default:
printk("ps2_ide_dmaproc(end): callrpc failed, result=%d\n", ret);
break;
}
} while (ret == -SIF_RPCE_SENDP);
}
drive->waiting_for_dma = 0;
return 0;
case ide_dma_test_irq: /* returns 1 if dma irq issued, 0 otherwise */
return (*SPD_R_INTR_STAT & 0x0001) ? 1 : 0;
default:
printk("ps2_ide_dmaproc: unsupported func: %d\n", func);
return 1;
}
}
