/*
This is the main routine for the NativeOS Kernel. It will start the
system and jump to user mode so that the init process can run.
At the moment no information is gathered from multiboot but I expect
this to change in the near future.
Multiboot will provide two arguments here: one is the magic number,
which must be 0x2BADB002, and the other one is the data structure with
information that might be required for some things.
*/
void kmain(unsigned int magic_number, multiboot_info_t *multiboot_ptr)
{
gdt_init();
idt_init();
int i;
for (i = 0; i < 16; i++)
idt_set_handler(i, &bsod);
/* Set up the core drivers. */
VGACon_Init();
keyboard_init();
timer_init();
/* Check that the magic code is valid. */
if (magic_number != 0x2BADB002) {
kpanic(0x88, "Wrong magic number");
}
unsigned int memory_amount = count_memory(multiboot_ptr);
frames_init(memory_amount);
printk("Starting NativeOS...\n");
for(;;);
}
int pic_disable_irq(int i)
{
i8259a_disable_irq(i);
idt_set_handler(i + 32, null);
return 0;
}
int pic_enable_irq(int i, void (*h)(void))
{
idt_set_handler(i + 32, h);
i8259a_enable_irq(i);
return 0;
}
sextant_ret_t idt_setup()
{
struct x86_idt_register idtr;
int i;
for (i = 0 ;
i < IDTE_NUM ;
i++)
{
struct x86_idt_entry *idte = idt + i;
/* Setup an empty IDTE interrupt gate, see figure 5-2 in Intel
x86 doc, vol 3 */
// idte->seg_sel = BUILD_SEGMENT_REG_VALUE(0, false, SEG_KCODE);
idte->seg_sel = 0x08; // numéro segment de code définit par défaut par Grub lors de l'initailiasation flat mode de la GDT
idte->reserved = 0;
idte->flags = 0;
// idte->type = 0x6; /* Interrupt gate (110b) 16 bits */
idte->type = 0xE; /* Interrupt gate (110b) */
idte->op_size = 1; /* 32bits instructions */
idte->zero = 0;
/* Disable this IDT entry for the moment */
idt_set_handler(i, (vaddr_t)NULL1, 0/* Don't care */);
}
/*
* Setup the IDT register, see Intel x86 doc vol 3, section 5.8.
*/
/* Address of the IDT */
idtr.base_addr = (ui32_t) idt;
/* The limit is the maximum offset in bytes from the base address of
the IDT */
idtr.limit = sizeof(idt) - 1;
/* Commit the IDT into the CPU */
asm volatile ("lidt %0\n"::"m"(idtr):"memory");
return SEXTANT_OK;
}
int exception_set_routine(uint8_t exception_id, exception_handler_t routine)
{
uint32_t flags;
if (exception_id >= EXCEPTION_NUM) {
return -1;
}
// arrêter les autres interruptions et exceptions et sauvegarde les flags
asm volatile("pushfl ; popl %0":"=g"(flags)::"memory");
asm("cli\n");
exception_handler_array[exception_id] = routine;
idt_set_handler(EXCEPTION_BASE + exception_id, (paddr_t)exception_wrapper_array[exception_id], 0);
// reenable irqs (restore flags)
asm volatile("push %0; popfl"::"g"(flags):"memory");
return 0;
}
/* Initialize the timer. */
void timer_init()
{
timer_ticks = 0;
idt_set_handler(0x20, &timer_int_handler);
}
void syscall_arch_init(void) {
idt_set_handler(INT_SYSCALL, &syscall_interrupt);
}
