static inline void reset_ppe(void) { #ifdef MODULE // reset PPE ifx_rcu_rst(IFX_RCU_DOMAIN_DSLDFE, IFX_RCU_MODULE_ATM); udelay(1000); ifx_rcu_rst(IFX_RCU_DOMAIN_DSLTC, IFX_RCU_MODULE_ATM); udelay(1000); ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); udelay(1000); *PP32_SRST &= ~0x000303CF; udelay(1000); *PP32_SRST |= 0x000303CF; udelay(1000); #endif }
static inline void reset_ppe(void) { #if 0 //MODULE unsigned int etop_cfg; unsigned int etop_mdio_cfg; unsigned int etop_ig_plen_ctrl; unsigned int enet_mac_cfg; etop_cfg = *IFX_PP32_ETOP_CFG; etop_mdio_cfg = *IFX_PP32_ETOP_MDIO_CFG; etop_ig_plen_ctrl = *IFX_PP32_ETOP_IG_PLEN_CTRL; enet_mac_cfg = *IFX_PP32_ENET_MAC_CFG; *IFX_PP32_ETOP_CFG = (*IFX_PP32_ETOP_CFG & ~0x03C0) | 0x0001; // reset PPE ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM); *IFX_PP32_ETOP_MDIO_CFG = etop_mdio_cfg; *IFX_PP32_ETOP_IG_PLEN_CTRL = etop_ig_plen_ctrl; *IFX_PP32_ENET_MAC_CFG = enet_mac_cfg; *IFX_PP32_ETOP_CFG = etop_cfg; #endif }