/*!
* Board specific initialization.
*/
static void __init mx6_board_init(void)
{
int i;
int ret;
iomux_v3_cfg_t *common_pads = NULL;
iomux_v3_cfg_t *can0_pads = NULL;
iomux_v3_cfg_t *can1_pads = NULL;
iomux_v3_cfg_t *mipi_sensor_pads = NULL;
iomux_v3_cfg_t *i2c3_pads = NULL;
iomux_v3_cfg_t *tuner_pads = NULL;
iomux_v3_cfg_t *spinor_pads = NULL;
iomux_v3_cfg_t *weimnor_pads = NULL;
iomux_v3_cfg_t *extra_pads = NULL;
int common_pads_cnt;
int can0_pads_cnt;
int can1_pads_cnt;
int mipi_sensor_pads_cnt;
int i2c3_pads_cnt;
int tuner_pads_cnt;
int spinor_pads_cnt;
int weimnor_pads_cnt;
int extra_pads_cnt;
if (cpu_is_mx6q()) {
common_pads = mx6q_sabreauto_pads;
can0_pads = mx6q_sabreauto_can0_pads;
can1_pads = mx6q_sabreauto_can1_pads;
mipi_sensor_pads = mx6q_sabreauto_mipi_sensor_pads;
tuner_pads = mx6q_tuner_pads;
spinor_pads = mx6q_spinor_pads;
weimnor_pads = mx6q_weimnor_pads;
common_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_pads);
can0_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_can0_pads);
can1_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_can1_pads);
mipi_sensor_pads_cnt = ARRAY_SIZE(mx6q_sabreauto_mipi_sensor_pads);
tuner_pads_cnt = ARRAY_SIZE(mx6q_tuner_pads);
spinor_pads_cnt = ARRAY_SIZE(mx6q_spinor_pads);
weimnor_pads_cnt = ARRAY_SIZE(mx6q_weimnor_pads);
if (board_is_mx6_reva()) {
i2c3_pads = mx6q_i2c3_pads_rev_a;
i2c3_pads_cnt = ARRAY_SIZE(mx6q_i2c3_pads_rev_a);
mxc_iomux_v3_setup_multiple_pads(i2c3_pads,
i2c3_pads_cnt);
} else {
i2c3_pads = mx6q_i2c3_pads_rev_b;
i2c3_pads_cnt = ARRAY_SIZE(mx6q_i2c3_pads_rev_b);
extra_pads = mx6q_extra_pads_rev_b;
extra_pads_cnt = ARRAY_SIZE(mx6q_extra_pads_rev_b);
mxc_iomux_v3_setup_multiple_pads(extra_pads,
extra_pads_cnt);
}
} else if (cpu_is_mx6dl()) {
common_pads = mx6dl_sabreauto_pads;
can0_pads = mx6dl_sabreauto_can0_pads;
can1_pads = mx6dl_sabreauto_can1_pads;
mipi_sensor_pads = mx6dl_sabreauto_mipi_sensor_pads;
tuner_pads = mx6dl_tuner_pads;
spinor_pads = mx6dl_spinor_pads;
weimnor_pads = mx6dl_weimnor_pads;
common_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_pads);
can0_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_can0_pads);
can1_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_can1_pads);
mipi_sensor_pads_cnt = ARRAY_SIZE(mx6dl_sabreauto_mipi_sensor_pads);
tuner_pads_cnt = ARRAY_SIZE(mx6dl_tuner_pads);
spinor_pads_cnt = ARRAY_SIZE(mx6dl_spinor_pads);
weimnor_pads_cnt = ARRAY_SIZE(mx6dl_weimnor_pads);
if (board_is_mx6_reva()) {
i2c3_pads = mx6dl_i2c3_pads_rev_a;
i2c3_pads_cnt = ARRAY_SIZE(mx6dl_i2c3_pads_rev_a);
mxc_iomux_v3_setup_multiple_pads(i2c3_pads,
i2c3_pads_cnt);
} else {
i2c3_pads = mx6dl_i2c3_pads_rev_b;
i2c3_pads_cnt = ARRAY_SIZE(mx6dl_i2c3_pads_rev_b);
extra_pads = mx6dl_extra_pads_rev_b;
extra_pads_cnt = ARRAY_SIZE(mx6dl_extra_pads_rev_b);
mxc_iomux_v3_setup_multiple_pads(extra_pads,
extra_pads_cnt);
}
}
BUG_ON(!common_pads);
mxc_iomux_v3_setup_multiple_pads(common_pads, common_pads_cnt);
/*If at least one NOR memory is selected we don't
* configure IC23 PADS for rev B */
if (spinor_en) {
BUG_ON(!spinor_pads);
mxc_iomux_v3_setup_multiple_pads(spinor_pads, spinor_pads_cnt);
} else if (weimnor_en) {
BUG_ON(!weimnor_pads);
mxc_iomux_v3_setup_multiple_pads(weimnor_pads,
weimnor_pads_cnt);
} else {
if (!board_is_mx6_reva()) {
BUG_ON(!i2c3_pads);
mxc_iomux_v3_setup_multiple_pads(i2c3_pads,
i2c3_pads_cnt);
}
}
if (can0_enable) {
BUG_ON(!can0_pads);
mxc_iomux_v3_setup_multiple_pads(can0_pads,
can0_pads_cnt);
}
BUG_ON(!can1_pads);
mxc_iomux_v3_setup_multiple_pads(can1_pads, can1_pads_cnt);
if (tuner_en) {
BUG_ON(!tuner_pads);
mxc_iomux_v3_setup_multiple_pads(tuner_pads,
tuner_pads_cnt);
}
/* assert i2c-rst */
gpio_request(SABREAUTO_I2C_EXP_RST, "i2c-rst");
gpio_direction_output(SABREAUTO_I2C_EXP_RST, 1);
if (!board_is_mx6_reva()) {
/* enable either EIM_D18 or i2c3_sda route path */
gpio_request(SABREAUTO_I2C3_STEER, "i2c3-steer");
if (spinor_en)
gpio_direction_output(SABREAUTO_I2C3_STEER, 0);
else if (weimnor_en) {
/*Put DISP0_DAT8 in ALT5 mode to prevent WDOG1 of
resetting WEIM NOR*/
gpio_direction_output(SABREAUTO_I2C3_STEER, 0);
gpio_request(SABREAUTO_WEIM_NOR_WDOG1, "nor-reset");
gpio_direction_output(SABREAUTO_WEIM_NOR_WDOG1, 1);
} else
gpio_direction_output(SABREAUTO_I2C3_STEER, 1);
/* Set GPIO_16 input for IEEE-1588 ts_clk and
* RMII reference clk
* For MX6 GPR1 bit21 meaning:
* Bit21: 0 - GPIO_16 pad output
* 1 - GPIO_16 pad input
*/
mxc_iomux_set_gpr_register(1, 21, 1, 1);
}
if (mipi_sensor) {
BUG_ON(!mipi_sensor_pads);
mxc_iomux_v3_setup_multiple_pads(mipi_sensor_pads,
mipi_sensor_pads_cnt);
}
gp_reg_id = sabreauto_dvfscore_data.reg_id;
soc_reg_id = sabreauto_dvfscore_data.soc_id;
pu_reg_id = sabreauto_dvfscore_data.pu_id;
mx6q_sabreauto_init_uart();
imx6q_add_mipi_csi2(&mipi_csi2_pdata);
if (cpu_is_mx6dl()) {
mipi_dsi_pdata.ipu_id = 0;
mipi_dsi_pdata.disp_id = 1;
ldb_data.ipu_id = 0;
ldb_data.disp_id = 0;
ldb_data.sec_ipu_id = 0;
ldb_data.sec_disp_id = 1;
hdmi_core_data.disp_id = 1;
}
imx6q_add_mxc_hdmi_core(&hdmi_core_data);
imx6q_add_ipuv3(0, &ipu_data[0]);
if (cpu_is_mx6q()) {
imx6q_add_ipuv3(1, &ipu_data[1]);
for (i = 0; i < ARRAY_SIZE(sabr_fb_data); i++)
imx6q_add_ipuv3fb(i, &sabr_fb_data[i]);
} else if (cpu_is_mx6dl())
for (i = 0; i < (ARRAY_SIZE(sabr_fb_data) + 1) / 2; i++)
imx6q_add_ipuv3fb(i, &sabr_fb_data[i]);
imx6q_add_vdoa();
imx6q_add_mipi_dsi(&mipi_dsi_pdata);
imx6q_add_lcdif(&lcdif_data);
imx6q_add_ldb(&ldb_data);
imx6q_add_v4l2_output(0);
imx6q_add_v4l2_capture(0, &capture_data[0]);
imx6q_add_v4l2_capture(1, &capture_data[1]);
imx6q_add_android_device_buttons();
imx6q_add_imx_snvs_rtc();
imx6q_add_imx_caam();
imx6q_add_imx_i2c(1, &mx6q_sabreauto_i2c1_data);
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
imx6q_add_imx_i2c(2, &mx6q_sabreauto_i2c2_data);
i2c_register_board_info(2, mxc_i2c2_board_info,
ARRAY_SIZE(mxc_i2c2_board_info));
ret = gpio_request(SABREAUTO_PMIC_INT, "pFUZE-int");
if (ret) {
printk(KERN_ERR"request pFUZE-int error!!\n");
return;
} else {
gpio_direction_input(SABREAUTO_PMIC_INT);
mx6q_sabreauto_init_pfuze100(SABREAUTO_PMIC_INT);
}
/* SPI */
imx6q_add_ecspi(0, &mx6q_sabreauto_spi_data);
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
spi_device_init();
#else
mx6q_setup_weimcs();
platform_device_register(&physmap_flash_device);
#endif
imx6q_add_mxc_hdmi(&hdmi_data);
imx6q_add_anatop_thermal_imx(1, &mx6q_sabreauto_anatop_thermal_data);
if (!can0_enable)
imx6_init_fec(fec_data);
imx6q_add_pm_imx(0, &mx6q_sabreauto_pm_data);
imx6q_add_sdhci_usdhc_imx(2, &mx6q_sabreauto_sd3_data);
imx6q_add_sdhci_usdhc_imx(0, &mx6q_sabreauto_sd1_data);
imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
imx6q_sabreauto_init_usb();
if (cpu_is_mx6q())
imx6q_add_ahci(0, &mx6q_sabreauto_sata_data);
imx6q_add_vpu();
imx6q_init_audio();
platform_device_register(&sabreauto_vmmc_reg_devices);
mx6_cpu_regulator_init();
imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
imx6q_add_asrc(&imx_asrc_data);
if (!mipi_sensor)
mx6q_csi0_io_init();
/* DISP0 Detect */
gpio_request(SABREAUTO_DISP0_DET_INT, "disp0-detect");
gpio_direction_input(SABREAUTO_DISP0_DET_INT);
/* DISP0 Reset - Assert for i2c disabled mode */
gpio_request(SABREAUTO_DISP0_RESET, "disp0-reset");
gpio_direction_output(SABREAUTO_DISP0_RESET, 0);
/* DISP0 I2C enable */
gpio_request(SABREAUTO_DISP0_I2C_EN, "disp0-i2c");
gpio_direction_output(SABREAUTO_DISP0_I2C_EN, 0);
gpio_request(SABREAUTO_DISP0_PWR, "disp0-pwr");
gpio_direction_output(SABREAUTO_DISP0_PWR, 1);
gpio_request(SABREAUTO_LDB_BACKLIGHT3, "ldb-backlight3");
gpio_direction_output(SABREAUTO_LDB_BACKLIGHT3, 1);
gpio_request(SABREAUTO_LDB_BACKLIGHT4, "ldb-backlight4");
gpio_direction_output(SABREAUTO_LDB_BACKLIGHT4, 1);
imx6q_add_otp();
imx6q_add_viim();
imx6q_add_imx2_wdt(0, NULL);
imx6q_add_dma();
if (!uart3_en)
imx6q_add_gpmi(&mx6q_gpmi_nand_platform_data);
imx6q_add_dvfs_core(&sabreauto_dvfscore_data);
imx6q_add_mxc_pwm(2);
imx6q_add_mxc_pwm(3);
imx6q_add_mxc_pwm_backlight(2, &mx6_arm2_pwm_backlight_data3);
imx6q_add_mxc_pwm_backlight(3, &mx6_arm2_pwm_backlight_data4);
mxc_spdif_data.spdif_core_clk = clk_get_sys("mxc_spdif.0", NULL);
clk_put(mxc_spdif_data.spdif_core_clk);
imx6q_add_spdif(&mxc_spdif_data);
imx6q_add_spdif_dai();
imx6q_add_spdif_audio_device();
if (can0_enable)
imx6q_add_flexcan0(&mx6q_sabreauto_flexcan_pdata[0]);
imx6q_add_flexcan1(&mx6q_sabreauto_flexcan_pdata[1]);
imx6q_add_hdmi_soc();
imx6q_add_hdmi_soc_dai();
imx6q_add_mlb150(&mx6_sabreauto_mlb150_data);
/* Tuner audio interface */
imx6q_add_imx_ssi(1, &mx6_sabreauto_ssi1_pdata);
mxc_register_device(&si4763_codec_device, NULL);
mxc_register_device(&mxc_si4763_audio_device, &si4763_audio_data);
imx6q_add_busfreq();
/* Add PCIe RC interface support */
imx6q_add_pcie(&mx6_sabreauto_pcie_data);
imx6q_add_perfmon(0);
imx6q_add_perfmon(1);
imx6q_add_perfmon(2);
}
/*!
* Board specific initialization.
*/
static void __init mx6_hdmidongle_board_init(void)
{
int i;
if (cpu_is_mx6q()) {
if (board_is_mx6_revb() || board_is_mx6_revc())
mxc_iomux_v3_setup_multiple_pads(mx6q_hdmidongle_rev_b_pads,
ARRAY_SIZE(mx6q_hdmidongle_rev_b_pads));
else
mxc_iomux_v3_setup_multiple_pads(mx6q_hdmidongle_rev_a_pads,
ARRAY_SIZE(mx6q_hdmidongle_rev_a_pads));
} else if (cpu_is_mx6dl()) {
if (board_is_mx6_revb() || board_is_mx6_revc())
mxc_iomux_v3_setup_multiple_pads(mx6dl_hdmidongle_rev_b_pads,
ARRAY_SIZE(mx6dl_hdmidongle_rev_b_pads));
else
mxc_iomux_v3_setup_multiple_pads(mx6dl_hdmidongle_rev_a_pads,
ARRAY_SIZE(mx6dl_hdmidongle_rev_a_pads));
}
gp_reg_id = hdmidongle_dvfscore_data.reg_id;
soc_reg_id = hdmidongle_dvfscore_data.soc_id;
mx6q_hdmidongle_init_uart();
/*
* MX6DL/Solo only supports single IPU
* The following codes are used to change ipu id
* and display id information for MX6DL/Solo. Then
* register 1 IPU device and up to 2 displays for
* MX6DL/Solo
*/
if (cpu_is_mx6dl())
hdmi_core_data.disp_id = 0;
imx6q_add_mxc_hdmi_core(&hdmi_core_data);
imx6q_add_ipuv3(0, &ipu_data[0]);
if (cpu_is_mx6q())
imx6q_add_ipuv3(1, &ipu_data[1]);
for (i = 0; i < ARRAY_SIZE(hdmidongle_fb_data); i++)
imx6q_add_ipuv3fb(i, &hdmidongle_fb_data[i]);
imx6q_add_vdoa();
imx6q_add_v4l2_output(0);
imx6q_add_imx_snvs_rtc();
imx6q_add_imx_i2c(1, &mx6q_hdmidongle_i2c_data);
imx6q_add_imx_i2c(2, &mx6q_hdmidongle_i2c_data);
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
mx6q_hdmidongle_init_wm8326();
imx6q_add_mxc_hdmi(&hdmi_data);
imx6q_add_anatop_thermal_imx(1, &mx6q_hdmidongle_anatop_thermal_data);
imx6q_add_pm_imx(0, &mx6q_hdmidongle_pm_data);
/* Move sd3 to first because sd3 connect to emmc.
Mfgtools want emmc is mmcblk0 and other sd card is mmcblk1.
*/
if (board_is_mx6_revc())
imx6q_add_sdhci_usdhc_imx(2, &mx6q_hdmidongle_revc_sd3_data);
else
imx6q_add_sdhci_usdhc_imx(2, &mx6q_hdmidongle_sd3_data);
imx6q_add_sdhci_usdhc_imx(1, &mx6q_hdmidongle_sd2_data);
if (board_is_mx6_reva())
imx6q_add_sdhci_usdhc_imx(0, &mx6q_hdmidongle_sd1_data);
imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
imx6q_hdmidongle_init_usb();
imx6q_add_vpu();
platform_device_register(&hdmidongle_vmmc_reg_devices);
imx6q_add_otp();
imx6q_add_viim();
imx6q_add_imx2_wdt(0, NULL);
imx6q_add_dma();
if (board_is_mx6_revb() || board_is_mx6_revc())
imx6q_add_gpmi(&mx6_gpmi_nand_platform_data);
imx6q_add_dvfs_core(&hdmidongle_dvfscore_data);
#ifndef CONFIG_MX6_INTER_LDO_BYPASS
mx6_cpu_regulator_init();
#endif
imx6q_add_ion(0, &imx_ion_data,
sizeof(imx_ion_data) + sizeof(struct ion_platform_heap));
imx6q_add_device_buttons();
imx6q_add_hdmi_soc();
imx6q_add_hdmi_soc_dai();
if (board_is_mx6_reva()) {
gpio_request(HDMIDONGLE_BT_RST, "bt_reset");
gpio_direction_output(HDMIDONGLE_BT_RST, 1);
gpio_set_value(HDMIDONGLE_BT_RST, 1);
mdelay(1000);
gpio_request(HDMIDONGLE_BT_EN, "bt_en");
gpio_direction_output(HDMIDONGLE_BT_EN, 1);
gpio_set_value(HDMIDONGLE_BT_EN, 1);
mdelay(1000);
gpio_request(HDMIDONGLE_WL_EN, "wl_en");
gpio_direction_output(HDMIDONGLE_WL_EN, 1);
gpio_set_value(HDMIDONGLE_WL_EN, 1);
mdelay(1000);
#ifdef CONFIG_IMX_PCIE
} else if (board_is_mx6_revb() || board_is_mx6_revc()) {
/* Add PCIe RC interface support */
imx6q_add_pcie(&mx6_hdmidongle_pcie_data);
#endif
}
pm_power_off = mx6_snvs_poweroff;
imx6q_add_busfreq();
}
